i965/vs: Set LOD to 0 for ordinary texture() calls.

Previously it was left undefined, causing us to select a random LOD.

NOTE: This is a candidate for stable branches.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
(cherry picked from commit aeff9a0d9889c4583e4f7fc89539380c1e6d043c)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index e95a5a1..ed04c8f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1856,6 +1856,10 @@ vec4_visitor::visit(ir_texture *ir)
    const glsl_type *lod_type;
    src_reg lod, dPdx, dPdy;
    switch (ir->op) {
+   case ir_tex:
+      lod = src_reg(0.0f);
+      lod_type = glsl_type::float_type;
+      break;
    case ir_txf:
    case ir_txl:
    case ir_txs:
@@ -1872,7 +1876,6 @@ vec4_visitor::visit(ir_texture *ir)
 
       lod_type = ir->lod_info.grad.dPdx->type;
       break;
-   case ir_tex:
    case ir_txb:
       break;
    }
@@ -1955,7 +1958,7 @@ vec4_visitor::visit(ir_texture *ir)
       }
 
       /* Load the LOD info */
-      if (ir->op == ir_txl) {
+      if (ir->op == ir_tex || ir->op == ir_txl) {
         int mrf, writemask;
         if (intel->gen >= 5) {
            mrf = param_base + 1;