x86: Move P2SB from Apollo Lake to a more generic location
authorWolfgang Wallner <wolfgang.wallner@br-automation.com>
Tue, 4 Feb 2020 08:04:56 +0000 (09:04 +0100)
committerBin Meng <bmeng.cn@gmail.com>
Fri, 7 Feb 2020 14:41:24 +0000 (22:41 +0800)
The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/Kconfig
arch/x86/cpu/apollolake/Kconfig
arch/x86/cpu/apollolake/Makefile
arch/x86/cpu/intel_common/Makefile
arch/x86/cpu/intel_common/p2sb.c [moved from arch/x86/cpu/apollolake/p2sb.c with 100% similarity]

index b733d22..b3fbf30 100644 (file)
@@ -715,6 +715,13 @@ config HAVE_ITSS
          Select this to include the driver for the Interrupt Timer
          Subsystem (ITSS) which is found on several Intel devices.
 
+config HAVE_P2SB
+       bool "Enable P2SB"
+       help
+         Select this to include the driver for the Primary to
+         Sideband Bridge (P2SB) which is found on several Intel
+         devices.
+
 menu "System tables"
        depends on !EFI && !SYS_COREBOOT
 
index a760e0a..145b8cb 100644 (file)
@@ -40,6 +40,7 @@ config INTEL_APOLLOLAKE
        imply INTEL_GPIO
        imply SMP
        imply HAVE_ITSS
+       imply HAVE_P2SB
 
 if INTEL_APOLLOLAKE
 
index f99f2c6..578e15c 100644 (file)
@@ -20,7 +20,6 @@ endif
 
 obj-y += hostbridge.o
 obj-y += lpc.o
-obj-y += p2sb.o
 obj-y += pch.o
 obj-y += pmc.o
 obj-y += uart.o
index e22c707..1736bd2 100644 (file)
@@ -28,6 +28,7 @@ endif
 endif
 obj-y += pch.o
 obj-$(CONFIG_HAVE_ITSS) += itss.o
+obj-$(CONFIG_HAVE_P2SB) += p2sb.o
 
 ifdef CONFIG_SPL
 ifndef CONFIG_SPL_BUILD