memcpy(&db->max_sample, &db->cur_sample,
sizeof(struct ddr_bandwidth_sample));
}
+ /* update min sample */
+ if (db->cur_sample.total_bandwidth < db->min_sample.total_bandwidth) {
+ memcpy(&db->min_sample, &db->cur_sample,
+ sizeof(struct ddr_bandwidth_sample));
+ }
/* update usage statistics */
db->usage_stat[db->cur_sample.total_usage / 1000]++;
/* clear flag and start statistics */
spin_lock_irqsave(&aml_db->lock, flags);
memset(&aml_db->max_sample, 0, sizeof(struct ddr_bandwidth_sample));
+ memset(&aml_db->min_sample, 0, sizeof(struct ddr_bandwidth_sample));
memset(aml_db->usage_stat, 0, 10 * sizeof(int));
memset(&aml_db->avg, 0, sizeof(struct ddr_avg_bandwidth));
+ aml_db->min_sample.total_bandwidth = 0xffffffff;
spin_unlock_irqrestore(&aml_db->lock, flags);
return count;
}
unsigned long total_count = 0;
struct ddr_avg_bandwidth tmp;
#define MAX_PREFIX "MAX bandwidth: %8d KB/s, usage: %2d.%02d%%"
+#define MIN_PREFIX "MIN bandwidth: %8d KB/s, usage: %2d.%02d%%"
#define AVG_PREFIX "AVG bandwidth: %8lld KB/s, usage: %2d.%02d%%"
if (aml_db->mode != MODE_ENABLE)
aml_db->max_sample.bandwidth[i]);
}
+ /* show for min bandwidth */
+ percent = aml_db->min_sample.total_usage / 100;
+ rem = aml_db->min_sample.total_usage % 100;
+ tick = aml_db->min_sample.tick;
+ do_div(tick, 1000);
+ s += sprintf(buf + s, MIN_PREFIX", tick:%lld us\n",
+ aml_db->min_sample.total_bandwidth,
+ percent, rem, tick);
+ for (i = 0; i < aml_db->channels; i++) {
+ s += sprintf(buf + s, "ch:%d port:%16llx: %8d KB/s\n",
+ i, aml_db->port[i],
+ aml_db->min_sample.bandwidth[i]);
+ }
+
/* show for average bandwidth */
if (aml_db->avg.sample_count) {
memcpy(&tmp, &aml_db->avg, sizeof(tmp));
if (!aml_db)
return -ENOMEM;
+ aml_db->min_sample.total_bandwidth = 0xffffffff;
aml_db->cpu_type = get_meson_cpu_version(0);
pr_info("chip type:0x%x\n", aml_db->cpu_type);
if (aml_db->cpu_type < MESON_CPU_MAJOR_ID_M8B) {