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rs6000.md (eq<mode>_compare): Only enable when optimizing for size.
authorDavid Edelsohn <edelsohn@gnu.org>
Fri, 26 Aug 2005 14:24:20 +0000 (14:24 +0000)
committerDavid Edelsohn <dje@gcc.gnu.org>
Fri, 26 Aug 2005 14:24:20 +0000 (10:24 -0400)
* config/rs6000/rs6000.md (eq<mode>_compare): Only enable when
optimizing for size.
(plus_eqsi): Same.
(compare_plus_eqsi): Same.
(plus_eqsi_compare): Same.
(neg_eq0<mode>): Same.
(neg_eq<mode>): Same.

* config/rs6000/aix52.h (PROCESSOR_DEFAULT): Change to
PROCESSOR_POWER4.

From-SVN: r103522

gcc/ChangeLog patch | blob | history
gcc/config/rs6000/aix52.h patch | blob | history
gcc/config/rs6000/rs6000.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 72e78c4..30a8369 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2005-08-26  David Edelsohn  <edelsohn@gnu.org>
+
+       * config/rs6000/rs6000.md (eq<mode>_compare): Only enable when
+       optimizing for size.
+       (plus_eqsi): Same.
+       (compare_plus_eqsi): Same.
+       (plus_eqsi_compare): Same.
+       (neg_eq0<mode>): Same.
+       (neg_eq<mode>): Same.
+
+       * config/rs6000/aix52.h (PROCESSOR_DEFAULT): Change to
+       PROCESSOR_POWER4.
+
 2005-08-26  Nick Clifton  <nickc@redhat.com>
 
        * config/v850/v850.c (ep_memory_operand): Return FALSE if
diff --git a/gcc/config/rs6000/aix52.h b/gcc/config/rs6000/aix52.h
index 3f3dbf6..d793d64 100644 (file)
--- a/gcc/config/rs6000/aix52.h
+++ b/gcc/config/rs6000/aix52.h
@@ -106,7 +106,7 @@ do {                                                                        \
 #define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
 
 #undef  PROCESSOR_DEFAULT
-#define PROCESSOR_DEFAULT PROCESSOR_PPC630
+#define PROCESSOR_DEFAULT PROCESSOR_POWER4
 #undef  PROCESSOR_DEFAULT64
 #define PROCESSOR_DEFAULT64 PROCESSOR_POWER4
 
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 397473c..329b3f4 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -11176,9 +11176,9 @@
         (const_int 0)))
    (set (match_operand:P 0 "gpc_reg_operand" "=r")
        (eq:P (match_dup 1) (match_dup 2)))]
-  ""
+  "optimize_size"
   "#"
-  ""
+  "optimize_size"
   [(set (match_dup 0)
        (clz:P (match_dup 4)))
    (parallel [(set (match_dup 3)
@@ -11223,12 +11223,12 @@
    (set (match_dup 2) (plus:SI (match_op_dup 1 [(match_dup 2) (match_dup 3)])
                               (match_dup 4)))])
 
-(define_insn ""
+(define_insn "*plus_eqsi"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r")
        (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
                        (match_operand:SI 2 "scc_eq_operand" "r,O,K,L,I"))
                 (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r")))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && optimize_size"
   "@
    xor %0,%1,%2\;{sfi|subfic} %0,%0,0\;{aze|addze} %0,%3
    {sfi|subfic} %0,%1,0\;{aze|addze} %0,%3
@@ -11238,7 +11238,7 @@
   [(set_attr "type" "three,two,three,three,three")
    (set_attr "length" "12,8,12,12,12")])
 
-(define_insn ""
+(define_insn "*compare_plus_eqsi"
   [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,x,x,x,?y,?y,?y,?y,?y")
        (compare:CC
         (plus:SI
@@ -11247,7 +11247,7 @@
          (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r,r,r,r,r,r"))
         (const_int 0)))
    (clobber (match_scratch:SI 4 "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r"))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && optimize_size"
   "@
    xor %4,%1,%2\;{sfi|subfic} %4,%4,0\;{aze.|addze.} %4,%3
    {sfi|subfic} %4,%1,0\;{aze.|addze.} %4,%3
@@ -11271,7 +11271,7 @@
          (match_operand:SI 3 "gpc_reg_operand" ""))
         (const_int 0)))
    (clobber (match_scratch:SI 4 ""))]
-  "TARGET_32BIT && reload_completed"
+  "TARGET_32BIT && optimize_size && reload_completed"
   [(set (match_dup 4)
        (plus:SI (eq:SI (match_dup 1)
                 (match_dup 2))
@@ -11281,7 +11281,7 @@
                    (const_int 0)))]
   "")
 
-(define_insn ""
+(define_insn "*plus_eqsi_compare"
   [(set (match_operand:CC 4 "cc_reg_operand" "=x,x,x,x,x,?y,?y,?y,?y,?y")
        (compare:CC
         (plus:SI
@@ -11291,7 +11291,7 @@
         (const_int 0)))
    (set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r")
        (plus:SI (eq:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && optimize_size"
   "@
    xor %0,%1,%2\;{sfi|subfic} %0,%0,0\;{aze.|addze.} %0,%3
    {sfi|subfic} %0,%1,0\;{aze.|addze.} %0,%3
@@ -11316,7 +11316,7 @@
         (const_int 0)))
    (set (match_operand:SI 0 "gpc_reg_operand" "")
        (plus:SI (eq:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
-  "TARGET_32BIT && reload_completed"
+  "TARGET_32BIT && optimize_size && reload_completed"
   [(set (match_dup 0)
        (plus:SI (eq:SI (match_dup 1) (match_dup 2)) (match_dup 3)))
    (set (match_dup 4)
@@ -11328,7 +11328,7 @@
   [(set (match_operand:P 0 "gpc_reg_operand" "=r")
        (neg:P (eq:P (match_operand:P 1 "gpc_reg_operand" "r")
                     (const_int 0))))]
-  ""
+  "optimize_size"
   "{ai|addic} %0,%1,-1\;{sfe|subfe} %0,%0,%0"
   [(set_attr "type" "two")
    (set_attr "length" "8")])
@@ -11337,9 +11337,9 @@
   [(set (match_operand:P 0 "gpc_reg_operand" "=r")
        (neg:P (eq:P (match_operand:P 1 "gpc_reg_operand" "%r")
                     (match_operand:P 2 "scc_eq_operand" "<scc_eq_op2>"))))]
-  ""
+  "optimize_size"
   "#"
-  ""
+  "optimize_size"
   [(set (match_dup 0) (neg:P (eq:P (match_dup 3) (const_int 0))))]
   {
     if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) != 0)
@@ -11384,7 +11384,7 @@
    (set_attr "length" "8")])
 
 ;; This is what (plus (ne X (const_int 0)) Y) looks like.
-(define_insn ""
+(define_insn "*plus_ne0si"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
        (plus:SI (lshiftrt:SI
                  (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))
@@ -11396,7 +11396,7 @@
   [(set_attr "type" "two")
    (set_attr "length" "8")])
 
-(define_insn ""
+(define_insn "*plus_ne0di"
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
        (plus:DI (lshiftrt:DI
                  (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r")))
@@ -11408,7 +11408,7 @@
   [(set_attr "type" "two")
    (set_attr "length" "8")])
 
-(define_insn ""
+(define_insn "*compare_plus_ne0si"
   [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
        (compare:CC
         (plus:SI (lshiftrt:SI
@@ -11446,7 +11446,7 @@
                    (const_int 0)))]
   "")
 
-(define_insn ""
+(define_insn "*compare_plus_ne0di"
   [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
        (compare:CC
         (plus:DI (lshiftrt:DI
@@ -11481,7 +11481,7 @@
                    (const_int 0)))]
   "")
 
-(define_insn ""
+(define_insn "*plus_ne0si_compare"
   [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
        (compare:CC
         (plus:SI (lshiftrt:SI
@@ -11522,7 +11522,7 @@
                    (const_int 0)))]
   "")
 
-(define_insn ""
+(define_insn "*plus_ne0di_compare"
   [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
        (compare:CC
         (plus:DI (lshiftrt:DI
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