MAINTAINERS: Add entry for RISC-V PMU drivers
authorAtish Patra <atish.patra@wdc.com>
Wed, 8 Sep 2021 20:01:07 +0000 (13:01 -0700)
committerminda.chen <minda.chen@starfivetech.com>
Tue, 3 Jan 2023 06:26:18 +0000 (14:26 +0800)
Add myself and Anup as maintainer for RISC-V PMU drivers.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
MAINTAINERS

index 3ef811fc5819dc741de3cf463da256c45112f5cb..3815c47584a3d306d650ddfda4352561bcd7cd74 100644 (file)
@@ -16094,6 +16094,15 @@ S:     Maintained
 F:     drivers/mtd/nand/raw/r852.c
 F:     drivers/mtd/nand/raw/r852.h
 
+RISC-V PMU DRIVERS
+M:     Atish Patra <atishp@atishpatra.org>
+R:     Anup Patel <anup@brainfault.org>
+L:     linux-riscv@lists.infradead.org
+S:     Supported
+F:     drivers/perf/riscv_pmu.c
+F:     drivers/perf/riscv_pmu_legacy.c
+F:     drivers/perf/riscv_pmu_sbi.c
+
 RISC-V ARCHITECTURE
 M:     Paul Walmsley <paul.walmsley@sifive.com>
 M:     Palmer Dabbelt <palmer@dabbelt.com>