offset =
offsetof(struct dxil_spirv_compute_runtime_data, group_count_x);
break;
+ case nir_intrinsic_load_base_workgroup_id:
+ offset =
+ offsetof(struct dxil_spirv_compute_runtime_data, base_group_x);
+ break;
case nir_intrinsic_load_first_vertex:
offset = offsetof(struct dxil_spirv_vertex_runtime_data, first_vertex);
break;
NIR_PASS_V(nir, nir_lower_system_values);
+ nir_lower_compute_system_values_options compute_options = {
+ .has_base_workgroup_id = !conf->zero_based_compute_workgroup_id,
+ };
+ NIR_PASS_V(nir, nir_lower_compute_system_values, &compute_options);
NIR_PASS_V(nir, dxil_nir_lower_subgroup_id);
NIR_PASS_V(nir, dxil_nir_lower_num_subgroups);
uint32_t group_count_x;
uint32_t group_count_y;
uint32_t group_count_z;
+ uint32_t padding0;
+ /* Base */
+ uint32_t base_group_x;
+ uint32_t base_group_y;
+ uint32_t base_group_z;
};
#define DXIL_SPIRV_Y_FLIP_MASK BITFIELD_MASK(DXIL_SPIRV_MAX_VIEWPORT)
// Set true if vertex and instance ids have already been converted to
// zero-based. Otherwise, runtime_data will be required to lower them.
bool zero_based_vertex_instance_id;
+ // Set true if workgroup base is known to be zero
+ bool zero_based_compute_workgroup_id;
struct {
// mode != DXIL_SPIRV_YZ_FLIP_NONE only valid on vertex/geometry stages.