drm/msm: Pass the MMU domain index in struct msm_file_private
authorJordan Crouse <jcrouse@codeaurora.org>
Tue, 7 May 2019 18:02:07 +0000 (12:02 -0600)
committerRob Clark <robdclark@chromium.org>
Tue, 18 Jun 2019 20:46:43 +0000 (13:46 -0700)
Pass the index of the MMU domain in struct msm_file_private instead
of assuming gpu->id throughout the submit path. This clears the way
to change ctx->aspace to a per-instance pagetable.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/msm_drv.c
drivers/gpu/drm/msm/msm_drv.h
drivers/gpu/drm/msm/msm_gem.h
drivers/gpu/drm/msm/msm_gem_submit.c
drivers/gpu/drm/msm/msm_gpu.c

index 31deb87..4c51063 100644 (file)
@@ -611,6 +611,7 @@ static void load_gpu(struct drm_device *dev)
 
 static int context_init(struct drm_device *dev, struct drm_file *file)
 {
+       struct msm_drm_private *priv = dev->dev_private;
        struct msm_file_private *ctx;
 
        ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
@@ -619,6 +620,7 @@ static int context_init(struct drm_device *dev, struct drm_file *file)
 
        msm_submitqueue_init(dev, ctx);
 
+       ctx->aspace = priv->gpu->aspace;
        file->driver_priv = ctx;
 
        return 0;
index e20e6b4..d9aa7ba 100644 (file)
@@ -68,6 +68,7 @@ struct msm_file_private {
        rwlock_t queuelock;
        struct list_head submitqueues;
        int queueid;
+       struct msm_gem_address_space *aspace;
 };
 
 enum msm_mdp_plane_property {
index 812d1b1..36aeb58 100644 (file)
@@ -141,6 +141,7 @@ void msm_gem_free_work(struct work_struct *work);
 struct msm_gem_submit {
        struct drm_device *dev;
        struct msm_gpu *gpu;
+       struct msm_gem_address_space *aspace;
        struct list_head node;   /* node in ring submit list */
        struct list_head bo_list;
        struct ww_acquire_ctx ticket;
index 1b68130..d3801bf 100644 (file)
@@ -32,8 +32,9 @@
 #define BO_PINNED   0x2000
 
 static struct msm_gem_submit *submit_create(struct drm_device *dev,
-               struct msm_gpu *gpu, struct msm_gpu_submitqueue *queue,
-               uint32_t nr_bos, uint32_t nr_cmds)
+               struct msm_gpu *gpu, struct msm_gem_address_space *aspace,
+               struct msm_gpu_submitqueue *queue, uint32_t nr_bos,
+               uint32_t nr_cmds)
 {
        struct msm_gem_submit *submit;
        uint64_t sz = sizeof(*submit) + ((u64)nr_bos * sizeof(submit->bos[0])) +
@@ -47,6 +48,7 @@ static struct msm_gem_submit *submit_create(struct drm_device *dev,
                return NULL;
 
        submit->dev = dev;
+       submit->aspace = aspace;
        submit->gpu = gpu;
        submit->fence = NULL;
        submit->cmd = (void *)&submit->bos[nr_bos];
@@ -160,7 +162,7 @@ static void submit_unlock_unpin_bo(struct msm_gem_submit *submit,
        struct msm_gem_object *msm_obj = submit->bos[i].obj;
 
        if (submit->bos[i].flags & BO_PINNED)
-               msm_gem_unpin_iova(&msm_obj->base, submit->gpu->aspace);
+               msm_gem_unpin_iova(&msm_obj->base, submit->aspace);
 
        if (submit->bos[i].flags & BO_LOCKED)
                ww_mutex_unlock(&msm_obj->base.resv->lock);
@@ -264,7 +266,7 @@ static int submit_pin_objects(struct msm_gem_submit *submit)
 
                /* if locking succeeded, pin bo: */
                ret = msm_gem_get_and_pin_iova(&msm_obj->base,
-                               submit->gpu->aspace, &iova);
+                               submit->aspace, &iova);
 
                if (ret)
                        break;
@@ -477,7 +479,8 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
                }
        }
 
-       submit = submit_create(dev, gpu, queue, args->nr_bos, args->nr_cmds);
+       submit = submit_create(dev, gpu, ctx->aspace, queue, args->nr_bos,
+               args->nr_cmds);
        if (!submit) {
                ret = -ENOMEM;
                goto out_unlock;
index bf4ee27..0a4c77f 100644 (file)
@@ -684,7 +684,7 @@ static void retire_submit(struct msm_gpu *gpu, struct msm_ringbuffer *ring,
                struct msm_gem_object *msm_obj = submit->bos[i].obj;
                /* move to inactive: */
                msm_gem_move_to_inactive(&msm_obj->base);
-               msm_gem_unpin_iova(&msm_obj->base, gpu->aspace);
+               msm_gem_unpin_iova(&msm_obj->base, submit->aspace);
                drm_gem_object_put(&msm_obj->base);
        }
 
@@ -768,8 +768,7 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
 
                /* submit takes a reference to the bo and iova until retired: */
                drm_gem_object_get(&msm_obj->base);
-               msm_gem_get_and_pin_iova(&msm_obj->base,
-                               submit->gpu->aspace, &iova);
+               msm_gem_get_and_pin_iova(&msm_obj->base, submit->aspace, &iova);
 
                if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE)
                        msm_gem_move_to_active(&msm_obj->base, gpu, true, submit->fence);