ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in
the Amlogic's Meson-AXG SoC, also describe the ethernet
pinctrl & clock information here.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 2eac8c71a4022352347b7d02842339608540f54d..a80632641b39f8cb5dc8554aa2b2e85b6551e0ea 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -178,6 +178,19 @@
                        };
                };
 
+               ethmac: ethernet@ff3f0000 {
+                       compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
+                       reg = <0x0 0xff3f0000 0x0 0x10000
+                               0x0 0xff634540 0x0 0x8>;
+                       interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "macirq";
+                       clocks = <&clkc CLKID_ETH>,
+                                <&clkc CLKID_FCLK_DIV2>,
+                                <&clkc CLKID_MPLL2>;
+                       clock-names = "stmmaceth", "clkin0", "clkin1";
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@ffc01000 {
                        compatible = "arm,gic-400";
                        reg = <0x0 0xffc01000 0 0x1000>,
@@ -238,6 +251,46 @@
                                        gpio-ranges = <&pinctrl_periphs 0 0 86>;
                                };
 
+                               eth_rgmii_x_pins: eth-x-rgmii {
+                                       mux {
+                                               groups = "eth_mdio_x",
+                                                      "eth_mdc_x",
+                                                      "eth_rgmii_rx_clk_x",
+                                                      "eth_rx_dv_x",
+                                                      "eth_rxd0_x",
+                                                      "eth_rxd1_x",
+                                                      "eth_rxd2_rgmii",
+                                                      "eth_rxd3_rgmii",
+                                                      "eth_rgmii_tx_clk",
+                                                      "eth_txen_x",
+                                                      "eth_txd0_x",
+                                                      "eth_txd1_x",
+                                                      "eth_txd2_rgmii",
+                                                      "eth_txd3_rgmii";
+                                               function = "eth";
+                                       };
+                               };
+
+                               eth_rgmii_y_pins: eth-y-rgmii {
+                                       mux {
+                                               groups = "eth_mdio_y",
+                                                      "eth_mdc_y",
+                                                      "eth_rgmii_rx_clk_y",
+                                                      "eth_rx_dv_y",
+                                                      "eth_rxd0_y",
+                                                      "eth_rxd1_y",
+                                                      "eth_rxd2_rgmii",
+                                                      "eth_rxd3_rgmii",
+                                                      "eth_rgmii_tx_clk",
+                                                      "eth_txen_y",
+                                                      "eth_txd0_y",
+                                                      "eth_txd1_y",
+                                                      "eth_txd2_rgmii",
+                                                      "eth_txd3_rgmii";
+                                               function = "eth";
+                                       };
+                               };
+
                                pwm_a_a_pins: pwm_a_a {
                                        mux {
                                                groups = "pwm_a_a";