drm/i915: Pass enum pipe to intel_set_pch_fifo_underrun_reporting()
authorMatthias Kaehlcke <mka@chromium.org>
Wed, 19 Jul 2017 17:39:28 +0000 (10:39 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 20 Jul 2017 08:27:14 +0000 (10:27 +0200)
Commit a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
transcoders") misses some pieces, due to a problem with the patch
format, this patch adds the remaining bits.

Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH
transcoders")

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20170719173928.186638-1-mka@chromium.org
drivers/gpu/drm/i915/intel_display.c

index 560be6e..5979e44 100644 (file)
@@ -5347,8 +5347,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
                return;
 
        if (intel_crtc->config->has_pch_encoder)
-               intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
-                                                     false);
+               intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
 
        intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
 
@@ -5433,8 +5432,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
                intel_wait_for_vblank(dev_priv, pipe);
                intel_wait_for_vblank(dev_priv, pipe);
                intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
-               intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
-                                                     true);
+               intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
        }
 
        /* If we change the relative order between pipe/planes enabling, we need
@@ -5531,8 +5529,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
        enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
 
        if (intel_crtc->config->has_pch_encoder)
-               intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
-                                                     false);
+               intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
 
        intel_encoders_disable(crtc, old_crtc_state, old_state);
 
@@ -5560,8 +5557,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
        intel_encoders_post_disable(crtc, old_crtc_state, old_state);
 
        if (old_crtc_state->has_pch_encoder)
-               intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
-                                                     true);
+               intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
 }
 
 static void i9xx_pfit_enable(struct intel_crtc *crtc)