"Has Memory Aperture Base and Size Registers"
>;
+def FeatureMadMixInsts : SubtargetFeature<"mad-mix-insts",
+ "HasMadMixInsts",
+ "true",
+ "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"
+>;
+
// XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support
// XNACK. The current default kernel driver setting is:
// - graphics ring: XNACK disabled
def FeatureISAVersion9_0_0 : SubtargetFeatureISAVersion <9,0,0,
[FeatureGFX9,
- FeatureLDSBankCount32]>;
+ FeatureMadMixInsts,
+ FeatureLDSBankCount32
+ ]>;
def FeatureISAVersion9_0_1 : SubtargetFeatureISAVersion <9,0,1,
[FeatureGFX9,
+ FeatureMadMixInsts,
FeatureLDSBankCount32,
FeatureXNACK]>;
def FeatureISAVersion9_0_2 : SubtargetFeatureISAVersion <9,0,2,
[FeatureGFX9,
- FeatureLDSBankCount32]>;
+ FeatureMadMixInsts,
+ FeatureLDSBankCount32
+ ]>;
def FeatureISAVersion9_0_3 : SubtargetFeatureISAVersion <9,0,3,
[FeatureGFX9,
+ FeatureMadMixInsts,
FeatureLDSBankCount32,
FeatureXNACK]>;
def HasIntClamp : Predicate<"Subtarget->hasIntClamp()">,
AssemblerPredicate<"FeatureIntClamp">;
-def HasMadMix : Predicate<"Subtarget->hasMadMixInsts()">,
- AssemblerPredicate<"FeatureGFX9Insts">;
+def HasMadMixInsts : Predicate<"Subtarget->hasMadMixInsts()">,
+ AssemblerPredicate<"FeatureMadMixInsts">;
def EnableLateCFGStructurize : Predicate<
"EnableLateStructurizeCFG">;
def V_PK_ASHRREV_I16 : VOP3PInst<"v_pk_ashrrev_i16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, ashr_rev>;
def V_PK_LSHRREV_B16 : VOP3PInst<"v_pk_lshrrev_b16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, lshr_rev>;
+
+let SubtargetPredicate = HasMadMixInsts in {
// These are VOP3a-like opcodes which accept no omod.
// Size of src arguments (16/32) is controlled by op_sel.
// For 16-bit src arguments their location (hi/lo) are controlled by op_sel_hi.
}
}
-let OtherPredicates = [HasMadMix] in {
-
def : GCNPat <
(f16 (fpround (fmad (f32 (VOP3PMadMixMods f16:$src0, i32:$src0_modifiers)),
(f32 (VOP3PMadMixMods f16:$src1, i32:$src1_modifiers)),
(i32 (IMPLICIT_DEF)))))
>;
-} // End Predicates = [HasMadMix]
+} // End SubtargetPredicate = [HasMadMixInsts]
multiclass VOP3P_Real_vi<bits<10> op> {
def _vi : VOP3P_Real<!cast<VOP3P_Pseudo>(NAME), SIEncodingFamily.VI>,