/* tc-arm.c -- Assemble for the ARM
- Copyright (C) 1994, 95, 96, 97, 98, 1999, 2000 Free Software Foundation, Inc.
+ Copyright (C) 1994, 95, 96, 97, 98, 1999, 2000
+ Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
Modified by David Taylor (dtaylor@armltd.co.uk)
#define NO_RELOC 0
#include "as.h"
-/* need TARGET_CPU */
+/* Need TARGET_CPU. */
#include "config.h"
#include "subsegs.h"
#include "obstack.h"
#define ARM_3 0x00000004
#define ARM_250 ARM_3
#define ARM_6 0x00000008
-#define ARM_7 ARM_6 /* same core instruction set */
-#define ARM_8 ARM_6 /* same core instruction set */
-#define ARM_9 ARM_6 /* same core instruction set */
+#define ARM_7 ARM_6 /* Same core instruction set. */
+#define ARM_8 ARM_6 /* Same core instruction set. */
+#define ARM_9 ARM_6 /* Same core instruction set. */
#define ARM_CPU_MASK 0x0000000f
-/* The following bitmasks control CPU extensions (ARM7 onwards): */
-#define ARM_LONGMUL 0x00000010 /* allow long multiplies */
-#define ARM_HALFWORD 0x00000020 /* allow half word loads */
-#define ARM_THUMB 0x00000040 /* allow BX instruction */
-#define ARM_EXT_V5 0x00000080 /* allow CLZ etc */
+/* The following bitmasks control CPU extensions (ARM7 onwards): */
+#define ARM_LONGMUL 0x00000010 /* Allow long multiplies. */
+#define ARM_HALFWORD 0x00000020 /* Allow half word loads. */
+#define ARM_THUMB 0x00000040 /* Allow BX instruction. */
+#define ARM_EXT_V5 0x00000080 /* Allow CLZ, etc. */
/* Architectures are the sum of the base and extensions. */
#define ARM_ARCH_V4 (ARM_7 | ARM_LONGMUL | ARM_HALFWORD)
/* Some useful combinations: */
#define ARM_ANY 0x00ffffff
#define ARM_2UP (ARM_ANY - ARM_1)
-#define ARM_ALL ARM_2UP /* Not arm1 only */
+#define ARM_ALL ARM_2UP /* Not arm1 only. */
#define ARM_3UP 0x00fffffc
-#define ARM_6UP 0x00fffff8 /* Includes ARM7 */
+#define ARM_6UP 0x00fffff8 /* Includes ARM7. */
#define FPU_CORE 0x80000000
#define FPU_FPA10 0x40000000
#define FPU_FPA11 0x40000000
#define FPU_NONE 0
-/* Some useful combinations */
-#define FPU_ALL 0xff000000 /* Note this is ~ARM_ANY */
-#define FPU_MEMMULTI 0x7f000000 /* Not fpu_core */
+/* Some useful combinations. */
+#define FPU_ALL 0xff000000 /* Note this is ~ARM_ANY. */
+#define FPU_MEMMULTI 0x7f000000 /* Not fpu_core. */
-
#ifndef CPU_DEFAULT
#if defined __thumb__
#define CPU_DEFAULT (ARM_ARCH_V4 | ARM_THUMB)
#endif
#define streq(a, b) (strcmp (a, b) == 0)
-#define skip_whitespace(str) while (* (str) == ' ') ++ (str)
+#define skip_whitespace(str) while (*(str) == ' ') ++(str)
-static unsigned long cpu_variant = CPU_DEFAULT | FPU_DEFAULT;
+static unsigned long cpu_variant = CPU_DEFAULT | FPU_DEFAULT;
static int target_oabi = 0;
#if defined OBJ_COFF || defined OBJ_ELF
-/* Flags stored in private area of BFD structure */
-static boolean uses_apcs_26 = false;
-static boolean support_interwork = false;
-static boolean uses_apcs_float = false;
-static boolean pic_code = false;
+/* Flags stored in private area of BFD structure. */
+static boolean uses_apcs_26 = false;
+static boolean support_interwork = false;
+static boolean uses_apcs_float = false;
+static boolean pic_code = false;
#endif
/* This array holds the chars that always start a comment. If the
from exp in floating point numbers. */
CONST char EXP_CHARS[] = "eE";
-/* Chars that mean this number is a floating point constant */
-/* As in 0f12.456 */
-/* or 0d1.2345e12 */
+/* Chars that mean this number is a floating point constant. */
+/* As in 0f12.456 */
+/* or 0d1.2345e12 */
CONST char FLT_CHARS[] = "rRsSfFdDxXeEpP";
#define is_immediate_prefix(C) ((C) == '#' || (C) == '$')
#ifdef OBJ_ELF
-symbolS * GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
+/* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
+symbolS *GOT_symbol;
#endif
-CONST int md_reloc_size = 8; /* Size of relocation record */
+/* Size of relocation record. */
+CONST int md_reloc_size = 8;
+
+/* 0: assemble for ARM,
+ 1: assemble for Thumb,
+ 2: assemble for Thumb even though target CPU does not support thumb
+ instructions. */
+static int thumb_mode = 0;
-static int thumb_mode = 0; /* 0: assemble for ARM, 1: assemble for Thumb,
- 2: assemble for Thumb even though target cpu
- does not support thumb instructions. */
typedef struct arm_fix
{
int thumb_mode;
struct arm_it
{
- CONST char * error;
+ CONST char *error;
unsigned long instruction;
- int suffix;
- int size;
+ int suffix;
+ int size;
struct
- {
- bfd_reloc_code_real_type type;
- expressionS exp;
- int pc_rel;
- } reloc;
+ {
+ bfd_reloc_code_real_type type;
+ expressionS exp;
+ int pc_rel;
+ } reloc;
};
struct arm_it inst;
struct asm_shift
{
- CONST char * template;
+ CONST char *template;
unsigned long value;
};
#define NUM_FLOAT_VALS 8
-CONST char * fp_const[] =
+CONST char *fp_const[] =
{
"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0", 0
};
struct asm_cond
{
- CONST char * template;
+ CONST char *template;
unsigned long value;
};
/* This is to save a hash look-up in the common case. */
#define COND_ALWAYS 0xe0000000
-static CONST struct asm_cond conds[] =
+static CONST struct asm_cond conds[] =
{
{"eq", 0x00000000},
{"ne", 0x10000000},
the set_bits: */
struct asm_flg
{
- CONST char * template; /* Basic flag string */
- unsigned long set_bits; /* Bits to set */
+ /* Basic flag string. */
+ CONST char *template;
+
+ /* Bits to set. */
+ unsigned long set_bits;
};
static CONST struct asm_flg s_flag[] =
struct asm_psr
{
- CONST char * template;
- boolean cpsr;
+ CONST char *template;
+ boolean cpsr;
unsigned long field;
};
-#define SPSR_BIT (1 << 22) /* The bit that distnguishes CPSR and SPSR. */
-#define PSR_SHIFT 16 /* How many bits to shift the PSR_xxx bits up by. */
+/* The bit that distnguishes CPSR and SPSR. */
+#define SPSR_BIT (1 << 22)
+
+/* How many bits to shift the PSR_xxx bits up by. */
+#define PSR_SHIFT 16
#define PSR_c (1 << 0)
#define PSR_x (1 << 1)
{"CPSR_flg", true, PSR_f},
{"CPSR_f", true, PSR_f},
{"SPSR_flg", false, PSR_f},
- {"SPSR_f", false, PSR_f},
+ {"SPSR_f", false, PSR_f},
{"CPSR_c", true, PSR_c},
{"CPSR_ctl", true, PSR_c},
{"SPSR_c", false, PSR_c},
{"cpsr_flg", true, PSR_f},
{"cpsr_f", true, PSR_f},
{"spsr_flg", false, PSR_f},
- {"spsr_f", false, PSR_f},
+ {"spsr_f", false, PSR_f},
{"cpsr_c", true, PSR_c},
{"cpsr_ctl", true, PSR_c},
{"spsr_c", false, PSR_c},
};
/* Functions called by parser. */
-/* ARM instructions */
+/* ARM instructions. */
static void do_arit PARAMS ((char *, unsigned long));
static void do_cmp PARAMS ((char *, unsigned long));
static void do_mov PARAMS ((char *, unsigned long));
static void do_ldmstm PARAMS ((char *, unsigned long));
static void do_branch PARAMS ((char *, unsigned long));
static void do_swi PARAMS ((char *, unsigned long));
-/* Pseudo Op codes */
+/* Pseudo Op codes. */
static void do_adr PARAMS ((char *, unsigned long));
static void do_adrl PARAMS ((char *, unsigned long));
static void do_nop PARAMS ((char *, unsigned long));
-/* ARM 2 */
+/* ARM 2. */
static void do_mul PARAMS ((char *, unsigned long));
static void do_mla PARAMS ((char *, unsigned long));
-/* ARM 3 */
+/* ARM 3. */
static void do_swap PARAMS ((char *, unsigned long));
-/* ARM 6 */
+/* ARM 6. */
static void do_msr PARAMS ((char *, unsigned long));
static void do_mrs PARAMS ((char *, unsigned long));
-/* ARM 7M */
+/* ARM 7M. */
static void do_mull PARAMS ((char *, unsigned long));
-/* ARM THUMB */
+/* ARM THUMB. */
static void do_bx PARAMS ((char *, unsigned long));
-
-/* Coprocessor Instructions */
+/* Coprocessor Instructions. */
static void do_cdp PARAMS ((char *, unsigned long));
static void do_lstc PARAMS ((char *, unsigned long));
static void do_co_reg PARAMS ((char *, unsigned long));
take 2: */
#define INSN_SIZE 4
-/* LONGEST_INST is the longest basic instruction name without conditions or
+/* LONGEST_INST is the longest basic instruction name without conditions or
flags. ARM7M has 4 of length 5. */
#define LONGEST_INST 5
-
-struct asm_opcode
+struct asm_opcode
{
- CONST char * template; /* Basic string to match */
- unsigned long value; /* Basic instruction code */
+ /* Basic string to match. */
+ CONST char *template;
+
+ /* Basic instruction code. */
+ unsigned long value;
- /* Compulsory suffix that must follow conds. If "", then the
- instruction is not conditional and must have no suffix. */
- CONST char * comp_suffix;
+ /* Compulsory suffix that must follow conds. If "", then the
+ instruction is not conditional and must have no suffix. */
+ CONST char *comp_suffix;
- CONST struct asm_flg * flags; /* Bits to toggle if flag 'n' set */
- unsigned long variants; /* Which CPU variants this exists for */
- /* Function to call to parse args */
- void (* parms) PARAMS ((char *, unsigned long));
+ /* Bits to toggle if flag 'n' set. */
+ CONST struct asm_flg *flags;
+
+ /* Which CPU variants this exists for. */
+ unsigned long variants;
+
+ /* Function to call to parse args. */
+ void (*parms) PARAMS ((char *, unsigned long));
};
-static CONST struct asm_opcode insns[] =
+static CONST struct asm_opcode insns[] =
{
-/* ARM Instructions */
+/* ARM Instructions. */
{"and", 0x00000000, NULL, s_flag, ARM_ANY, do_arit},
{"eor", 0x00200000, NULL, s_flag, ARM_ANY, do_arit},
{"sub", 0x00400000, NULL, s_flag, ARM_ANY, do_arit},
{"bl", 0x0bfffffe, NULL, NULL, ARM_ANY, do_branch},
{"b", 0x0afffffe, NULL, NULL, ARM_ANY, do_branch},
#endif
-
-/* Pseudo ops */
+
+/* Pseudo ops. */
{"adr", 0x028f0000, NULL, NULL, ARM_ANY, do_adr},
{"adrl", 0x028f0000, NULL, NULL, ARM_ANY, do_adrl},
{"nop", 0x01a00000, NULL, NULL, ARM_ANY, do_nop},
-/* ARM 2 multiplies */
+/* ARM 2 multiplies. */
{"mul", 0x00000090, NULL, s_flag, ARM_2UP, do_mul},
{"mla", 0x00200090, NULL, s_flag, ARM_2UP, do_mla},
-/* ARM 3 - swp instructions */
+/* ARM 3 - swp instructions. */
{"swp", 0x01000090, NULL, byte_flag, ARM_3UP, do_swap},
-/* ARM 6 Coprocessor instructions */
+/* ARM 6 Coprocessor instructions. */
{"mrs", 0x010f0000, NULL, NULL, ARM_6UP, do_mrs},
{"msr", 0x0120f000, NULL, NULL, ARM_6UP, do_msr},
/* ScottB: our code uses 0x0128f000 for msr.
NickC: but this is wrong because the bits 16 through 19 are
handled by the PSR_xxx defines above. */
-/* ARM 7M long multiplies - need signed/unsigned flags! */
+/* ARM 7M long multiplies - need signed/unsigned flags! */
{"smull", 0x00c00090, NULL, s_flag, ARM_LONGMUL, do_mull},
{"umull", 0x00800090, NULL, s_flag, ARM_LONGMUL, do_mull},
{"smlal", 0x00e00090, NULL, s_flag, ARM_LONGMUL, do_mull},
{"umlal", 0x00a00090, NULL, s_flag, ARM_LONGMUL, do_mull},
-/* ARM THUMB interworking */
+/* ARM THUMB interworking. */
{"bx", 0x012fff10, NULL, NULL, ARM_THUMB, do_bx},
-/* Floating point instructions */
+/* Floating point instructions. */
{"wfs", 0x0e200110, NULL, NULL, FPU_ALL, do_fp_ctrl},
{"rfs", 0x0e300110, NULL, NULL, FPU_ALL, do_fp_ctrl},
{"wfc", 0x0e400110, NULL, NULL, FPU_ALL, do_fp_ctrl},
#define THUMB_HALFWORD 1
#define THUMB_BYTE 0
-struct thumb_opcode
+struct thumb_opcode
{
- CONST char * template; /* Basic string to match */
- unsigned long value; /* Basic instruction code */
- int size;
- unsigned long variants; /* Which CPU variants this exists for */
- void (* parms) PARAMS ((char *)); /* Function to call to parse args */
+ /* Basic string to match. */
+ CONST char *template;
+
+ /* Basic instruction code. */
+ unsigned long value;
+
+ int size;
+
+ /* Which CPU variants this exists for. */
+ unsigned long variants;
+
+ /* Function to call to parse args. */
+ void (*parms) PARAMS ((char *));
};
static CONST struct thumb_opcode tinsns[] =
{"swi", 0xdf00, 2, ARM_THUMB, do_t_swi},
{"sub", 0x0000, 2, ARM_THUMB, do_t_sub},
{"tst", T_OPCODE_TST, 2, ARM_THUMB, do_t_arit},
- /* Pseudo ops: */
+ /* Pseudo ops: */
{"adr", 0x0000, 2, ARM_THUMB, do_t_adr},
- {"nop", 0x46C0, 2, ARM_THUMB, do_t_nop}, /* mov r8,r8 */
+ {"nop", 0x46C0, 2, ARM_THUMB, do_t_nop}, /* mov r8,r8 */
};
struct reg_entry
{
- CONST char * name;
- int number;
+ CONST char *name;
+ int number;
};
#define int_register(reg) ((reg) >= 0 && (reg) <= 15)
#define REG_LR 14
#define REG_SP 13
-/* These are the standard names. Users can add aliases with .req */
+/* These are the standard names. Users can add aliases with .req. */
static CONST struct reg_entry reg_table[] =
{
/* Processor Register Numbers. */
#define BAD_FLAGS _("Instruction should not have flags")
#define BAD_COND _("Instruction is not conditional")
-static struct hash_control * arm_ops_hsh = NULL;
-static struct hash_control * arm_tops_hsh = NULL;
-static struct hash_control * arm_cond_hsh = NULL;
-static struct hash_control * arm_shift_hsh = NULL;
-static struct hash_control * arm_reg_hsh = NULL;
-static struct hash_control * arm_psr_hsh = NULL;
+static struct hash_control *arm_ops_hsh = NULL;
+static struct hash_control *arm_tops_hsh = NULL;
+static struct hash_control *arm_cond_hsh = NULL;
+static struct hash_control *arm_shift_hsh = NULL;
+static struct hash_control *arm_reg_hsh = NULL;
+static struct hash_control *arm_psr_hsh = NULL;
/* This table describes all the machine specific pseudo-ops the assembler
has to support. The fields are:
CONST pseudo_typeS md_pseudo_table[] =
{
- { "req", s_req, 0 }, /* Never called becasue '.req' does not start line */
+ { "req", s_req, 0 }, /* Never called becasue '.req' does not start line. */
{ "bss", s_bss, 0 },
{ "align", s_align, 0 },
{ "arm", s_arm, 0 },
/* Allow for the effect of section changes. */
{ "text", arm_s_text, 0 },
{ "data", arm_s_data, 0 },
-#ifdef OBJ_ELF
+#ifdef OBJ_ELF
{ "section", arm_s_section, 0 },
{ "section.s", arm_s_section, 0 },
{ "sect", arm_s_section, 0 },
<insn>
*/
-symbolS * last_label_seen;
+symbolS *last_label_seen;
static int label_is_thumb_function_name = false;
-/* Literal stuff */
+/* Literal stuff. */
#define MAX_LITERAL_POOL_SIZE 1024
typedef struct literalS
{
- struct expressionS exp;
- struct arm_it * inst;
+ struct expressionS exp;
+ struct arm_it *inst;
} literalT;
-literalT literals[MAX_LITERAL_POOL_SIZE];
-int next_literal_pool_place = 0; /* Next free entry in the pool */
-int lit_pool_num = 1; /* Next literal pool number */
-symbolS * current_poolP = NULL;
+literalT literals[MAX_LITERAL_POOL_SIZE];
+
+/* Next free entry in the pool. */
+int next_literal_pool_place = 0;
+
+/* Next literal pool number. */
+int lit_pool_num = 1;
+
+symbolS *current_poolP = NULL;
static int
add_to_lit_pool ()
while (lit_count < next_literal_pool_place)
{
if (literals[lit_count].exp.X_op == inst.reloc.exp.X_op
- && inst.reloc.exp.X_op == O_constant
- && literals[lit_count].exp.X_add_number
- == inst.reloc.exp.X_add_number
- && literals[lit_count].exp.X_unsigned == inst.reloc.exp.X_unsigned)
- break;
+ && inst.reloc.exp.X_op == O_constant
+ && (literals[lit_count].exp.X_add_number
+ == inst.reloc.exp.X_add_number)
+ && literals[lit_count].exp.X_unsigned == inst.reloc.exp.X_unsigned)
+ break;
lit_count++;
}
- if (lit_count == next_literal_pool_place) /* new entry */
+ if (lit_count == next_literal_pool_place) /* New entry. */
{
if (next_literal_pool_place > MAX_LITERAL_POOL_SIZE)
- {
- inst.error = _("Literal Pool Overflow");
- return FAIL;
- }
+ {
+ inst.error = _("Literal Pool Overflow");
+ return FAIL;
+ }
literals[next_literal_pool_place].exp = inst.reloc.exp;
lit_count = next_literal_pool_place++;
return SUCCESS;
}
-
+
/* Can't use symbol_new here, so have to create a symbol and then at
a later date assign it a value. Thats what these functions do. */
+
static void
symbol_locate (symbolP, name, segment, valu, frag)
- symbolS * symbolP;
- CONST char * name; /* It is copied, the caller can modify */
- segT segment; /* Segment identifier (SEG_<something>) */
- valueT valu; /* Symbol value */
- fragS * frag; /* Associated fragment */
+ symbolS *symbolP;
+
+ /* It is copied, the caller can modify. */
+ CONST char *name;
+
+ /* Segment identifier (SEG_<something>). */
+ segT segment;
+
+ /* Symbol value. */
+ valueT valu;
+
+ /* Associated fragment. */
+ fragS *frag;
{
unsigned int name_length;
- char * preserved_copy_of_name;
+ char *preserved_copy_of_name;
- name_length = strlen (name) + 1; /* +1 for \0 */
+ /* +1 for \0. */
+ name_length = strlen (name) + 1;
obstack_grow (¬es, name, name_length);
preserved_copy_of_name = obstack_finish (¬es);
#ifdef STRIP_UNDERSCORE
abort ();
}
- symbol_append (symbolP, symbol_lastP, & symbol_rootP, & symbol_lastP);
+ symbol_append (symbolP, symbol_lastP, &symbol_rootP, &symbol_lastP);
obj_symbol_new_hook (symbolP);
#ifdef tc_symbol_new_hook
tc_symbol_new_hook (symbolP);
#endif
-
+
#ifdef DEBUG_SYMS
verify_symbol_chain (symbol_rootP, symbol_lastP);
-#endif /* DEBUG_SYMS */
+#endif /* DEBUG_SYMS */
}
-/* Check that an immediate is valid, and if so,
- convert it to the right format. */
+/* Check that an immediate is valid.
+ If so, convert it to the right format. */
+
static unsigned int
validate_immediate (val)
unsigned int val;
{
unsigned int a;
unsigned int i;
-
+
#define rotate_left(v, n) (v << n | v >> (32 - n))
-
+
for (i = 0; i < 32; i += 2)
if ((a = rotate_left (val, i)) <= 0xff)
- return a | (i << 7); /* 12-bit pack: [shift-cnt,const] */
-
+ /* 12-bit pack: [shift-cnt,const]. */
+ return a | (i << 7);
+
return FAIL;
}
/* Check to see if an immediate can be computed as two seperate immediate
values, added together. We already know that this value cannot be
computed by just one ARM instruction. */
+
static unsigned int
validate_immediate_twopart (val, highpart)
unsigned int val;
- unsigned int * highpart;
+ unsigned int *highpart;
{
unsigned int a;
unsigned int i;
-
+
for (i = 0; i < 32; i += 2)
if (((a = rotate_left (val, i)) & 0xff) != 0)
{
if (a & 0xff00)
{
- if (a & ~ 0xffff)
+ if (a & ~0xffff)
continue;
- * highpart = (a >> 8) | ((i + 24) << 7);
+ *highpart = (a >> 8) | ((i + 24) << 7);
}
else if (a & 0xff0000)
{
if (a & 0xff000000)
continue;
-
- * highpart = (a >> 16) | ((i + 16) << 7);
+ *highpart = (a >> 16) | ((i + 16) << 7);
}
else
{
assert (a & 0xff000000);
-
- * highpart = (a >> 24) | ((i + 8) << 7);
+ *highpart = (a >> 24) | ((i + 8) << 7);
}
return (a & 0xff) | (i << 7);
}
-
+
return FAIL;
}
int hwse;
{
if ((hwse && val > 255) || val > 4095)
- return FAIL;
+ return FAIL;
return val;
}
-
static void
s_req (a)
int a ATTRIBUTE_UNUSED;
int ignore ATTRIBUTE_UNUSED;
{
/* We don't support putting frags in the BSS segment, we fake it by
- marking in_bss, then looking at s_skip for clues?.. */
+ marking in_bss, then looking at s_skip for clues. */
subseg_set (bss_section, 0);
demand_empty_rest_of_line ();
}
s_even (ignore)
int ignore ATTRIBUTE_UNUSED;
{
- if (!need_pass_2) /* Never make frag if expect extra pass. */
+ /* Never make frag if expect extra pass. */
+ if (!need_pass_2)
frag_align (1, 0, 0);
-
+
record_alignment (now_seg, 1);
-
+
demand_empty_rest_of_line ();
}
if (current_poolP == NULL)
return;
- /* Align pool as you have word accesses */
- /* Only make a frag if we have to ... */
+ /* Align pool as you have word accesses.
+ Only make a frag if we have to. */
if (!need_pass_2)
frag_align (2, 0, 0);
symbol_table_insert (current_poolP);
ARM_SET_THUMB (current_poolP, thumb_mode);
-
+
#if defined OBJ_COFF || defined OBJ_ELF
ARM_SET_INTERWORK (current_poolP, support_interwork);
#endif
-
+
while (lit_count < next_literal_pool_place)
/* First output the expression in the instruction to the pool. */
- emit_expr (&(literals[lit_count++].exp), 4); /* .word */
+ emit_expr (&(literals[lit_count++].exp), 4); /* .word */
next_literal_pool_place = 0;
current_poolP = NULL;
}
+/* Same as s_align_ptwo but align 0 => align 2. */
+
static void
-s_align (unused) /* Same as s_align_ptwo but align 0 => align 2 */
+s_align (unused)
int unused ATTRIBUTE_UNUSED;
{
register int temp;
if (!temp)
temp = 2;
- /* Only make a frag if we HAVE to. . . */
+ /* Only make a frag if we HAVE to. */
if (temp && !need_pass_2)
frag_align (temp, (int) temp_fill, 0);
demand_empty_rest_of_line ();
This is used by gcc/config/arm/lib1funcs.asm for example
to compile interworking support functions even if the
target processor should not support interworking. */
-
+
if (! thumb_mode)
{
thumb_mode = 2;
-
+
record_alignment (now_seg, 1);
}
-
+
demand_empty_rest_of_line ();
}
/* XXX the following is a duplicate of the code for s_set() in read.c
We cannot just call that code as we need to get at the symbol that
is created. */
- register char * name;
- register char delim;
- register char * end_name;
- register symbolS * symbolP;
-
- /*
- * Especial apologies for the random logic:
- * this just grew, and could be parsed much more simply!
- * Dean in haste.
- */
+ register char *name;
+ register char delim;
+ register char *end_name;
+ register symbolS *symbolP;
+
+ /* Especial apologies for the random logic: This just grew, and
+ could be parsed much more simply! Dean in haste. */
name = input_line_pointer;
delim = get_symbol_end ();
end_name = input_line_pointer;
*end_name = delim;
-
+
SKIP_WHITESPACE ();
if (*input_line_pointer != ',')
if (name[0] == '.' && name[1] == '\0')
{
- /* XXX - this should not happen to .thumb_set */
+ /* XXX - this should not happen to .thumb_set. */
abort ();
}
for this symbol. */
if (listing & LISTING_SYMBOLS)
{
- extern struct list_info_struct * listing_tail;
- fragS * dummy_frag = (fragS *) xmalloc (sizeof(fragS));
- memset (dummy_frag, 0, sizeof(fragS));
+ extern struct list_info_struct *listing_tail;
+ fragS *dummy_frag = (fragS *) xmalloc (sizeof (fragS));
+ memset (dummy_frag, 0, sizeof (fragS));
dummy_frag->fr_type = rs_fill;
dummy_frag->line = listing_tail;
symbolP = symbol_new (name, undefined_section, 0, dummy_frag);
}
else
#endif
- symbolP = symbol_new (name, undefined_section, 0, &zero_address_frag);
-
+ symbolP = symbol_new (name, undefined_section, 0, &zero_address_frag);
+
#ifdef OBJ_COFF
- /* "set" symbols are local unless otherwise specified. */
+ /* "set" symbols are local unless otherwise specified. */
SF_SET_LOCAL (symbolP);
-#endif /* OBJ_COFF */
- } /* make a new symbol */
+#endif /* OBJ_COFF */
+ } /* Make a new symbol. */
symbol_table_insert (symbolP);
- * end_name = delim;
+ *end_name = delim;
if (equiv
&& S_IS_DEFINED (symbolP)
as_bad (_("symbol `%s' already defined"), S_GET_NAME (symbolP));
pseudo_set (symbolP);
-
+
demand_empty_rest_of_line ();
/* XXX Now we come to the Thumb specific bit of code. */
-
+
THUMB_SET_FUNC (symbolP, 1);
ARM_SET_THUMB (symbolP, 1);
#if defined OBJ_ELF || defined OBJ_COFF
}
/* If we change section we must dump the literal pool first. */
+
static void
arm_s_text (ignore)
int ignore;
{
if (now_seg != text_section)
s_ltorg (0);
-
+
#ifdef OBJ_ELF
obj_elf_text (ignore);
#else
}
else if (now_seg != data_section)
s_ltorg (0);
-
+
#ifdef OBJ_ELF
obj_elf_data (ignore);
#else
if (! (cpu_variant & ARM_THUMB))
as_bad (_("selected processor does not support THUMB opcodes"));
thumb_mode = 1;
- /* No need to force the alignment, since we will have been
- coming from ARM mode, which is word-aligned. */
- record_alignment (now_seg, 1);
+ /* No need to force the alignment, since we will have been
+ coming from ARM mode, which is word-aligned. */
+ record_alignment (now_seg, 1);
}
break;
case 32:
if (thumb_mode)
{
- if ((cpu_variant & ARM_ANY) == ARM_THUMB)
+ if ((cpu_variant & ARM_ANY) == ARM_THUMB)
as_bad (_("selected processor does not support ARM opcodes"));
thumb_mode = 0;
- if (!need_pass_2)
- frag_align (2, 0, 0);
- record_alignment (now_seg, 1);
+ if (!need_pass_2)
+ frag_align (2, 0, 0);
+ record_alignment (now_seg, 1);
}
break;
static void
end_of_line (str)
- char * str;
+ char *str;
{
skip_whitespace (str);
- if (* str != '\0')
+ if (*str != '\0')
inst.error = _("Garbage following instruction");
}
static int
skip_past_comma (str)
- char ** str;
+ char **str;
{
char *p = *str, c;
int comma = 0;
-
+
while ((c = *p) == ' ' || c == ',')
{
p++;
}
/* A standard register must be given at this point.
- Shift is the place to put it in inst.instruction.
- Restores input start point on err.
- Returns the reg#, or FAIL. */
+ SHIFT is the place to put it in inst.instruction.
+ Restore input start point on err.
+ Return the reg#, or FAIL. */
+
static int
reg_required_here (str, shift)
- char ** str;
- int shift;
+ char **str;
+ int shift;
{
- static char buff [128]; /* XXX */
- int reg;
- char * start = *str;
+ static char buff[128]; /* XXX */
+ int reg;
+ char *start = *str;
if ((reg = arm_reg_parse (str)) != FAIL && int_register (reg))
{
/* Restore the start point, we may have got a reg of the wrong class. */
*str = start;
-
+
/* In the few cases where we might be able to accept something else
this error can be overridden. */
sprintf (buff, _("Register expected, not '%.100s'"), start);
static CONST struct asm_psr *
arm_psr_parse (ccp)
- register char ** ccp;
+ register char **ccp;
{
- char * start = * ccp;
- char c;
- char * p;
- CONST struct asm_psr * psr;
+ char *start = *ccp;
+ char c;
+ char *p;
+ CONST struct asm_psr *psr;
p = start;
}
/* Parse the input looking for a PSR flag. */
+
static int
psr_required_here (str)
- char ** str;
+ char **str;
{
- char * start = *str;
- CONST struct asm_psr * psr;
-
+ char *start = *str;
+ CONST struct asm_psr *psr;
+
psr = arm_psr_parse (str);
if (psr)
/* Set the psr flags in the MSR instruction. */
inst.instruction |= psr->field << PSR_SHIFT;
-
+
return SUCCESS;
}
static int
co_proc_number (str)
- char ** str;
+ char **str;
{
int processor, pchar;
- skip_whitespace (* str);
+ skip_whitespace (*str);
/* The data sheet seems to imply that just a number on its own is valid
here, but the RISC iX assembler seems to accept a prefix 'p'. We will
{
expressionS expr;
- skip_whitespace (* str);
+ skip_whitespace (*str);
memset (&expr, '\0', sizeof (expr));
static int
cp_reg_required_here (str, where)
- char ** str;
- int where;
+ char **str;
+ int where;
{
- int reg;
- char * start = *str;
+ int reg;
+ char *start = *str;
if ((reg = arm_reg_parse (str)) != FAIL && cp_register (reg))
{
static int
fp_reg_required_here (str, where)
- char ** str;
- int where;
+ char **str;
+ int where;
{
int reg;
- char * start = *str;
+ char *start = *str;
if ((reg = arm_reg_parse (str)) != FAIL && fp_register (reg))
{
static int
cp_address_offset (str)
- char ** str;
+ char **str;
{
int offset;
- skip_whitespace (* str);
+ skip_whitespace (*str);
if (! is_immediate_prefix (**str))
{
}
(*str)++;
-
- if (my_get_expression (& inst.reloc.exp, str))
+
+ if (my_get_expression (&inst.reloc.exp, str))
return FAIL;
-
+
if (inst.reloc.exp.X_op == O_constant)
{
offset = inst.reloc.exp.X_add_number;
-
+
if (offset & 3)
{
inst.error = _("co-processor address must be word aligned");
static int
cp_address_required_here (str)
- char ** str;
+ char **str;
{
- char * p = * str;
- int pre_inc = 0;
- int write_back = 0;
+ char *p = *str;
+ int pre_inc = 0;
+ int write_back = 0;
if (*p == '[')
{
p++;
skip_whitespace (p);
- if ((reg = reg_required_here (& p, 16)) == FAIL)
+ if ((reg = reg_required_here (&p, 16)) == FAIL)
return FAIL;
skip_whitespace (p);
if (*p == ']')
{
p++;
-
- if (skip_past_comma (& p) == SUCCESS)
+
+ if (skip_past_comma (&p) == SUCCESS)
{
- /* [Rn], #expr */
+ /* [Rn], #expr */
write_back = WRITE_BACK;
-
+
if (reg == REG_PC)
{
inst.error = _("pc may not be used in post-increment");
return FAIL;
}
- if (cp_address_offset (& p) == FAIL)
+ if (cp_address_offset (&p) == FAIL)
return FAIL;
}
else
}
else
{
- /* '['Rn, #expr']'[!] */
+ /* '['Rn, #expr']'[!] */
- if (skip_past_comma (& p) == FAIL)
+ if (skip_past_comma (&p) == FAIL)
{
inst.error = _("pre-indexed expression expected");
return FAIL;
}
pre_inc = PRE_INDEX;
-
- if (cp_address_offset (& p) == FAIL)
+
+ if (cp_address_offset (&p) == FAIL)
return FAIL;
skip_whitespace (p);
return FAIL;
inst.reloc.type = BFD_RELOC_ARM_CP_OFF_IMM;
- inst.reloc.exp.X_add_number -= 8; /* PC rel adjust */
+ inst.reloc.exp.X_add_number -= 8; /* PC rel adjust. */
inst.reloc.pc_rel = 1;
inst.instruction |= (REG_PC << 16);
pre_inc = PRE_INDEX;
static void
do_nop (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
/* Do nothing really. */
unsigned long flags;
{
int skip = 0;
-
+
/* Only one syntax. */
skip_whitespace (str);
skip_whitespace (str);
- if ( strcmp (str, "CPSR") == 0
+ if (strcmp (str, "CPSR") == 0
|| strcmp (str, "SPSR") == 0
- /* Lower case versions for backwards compatability. */
+ /* Lower case versions for backwards compatability. */
|| strcmp (str, "cpsr") == 0
|| strcmp (str, "spsr") == 0)
skip = 4;
+
/* This is for backwards compatability with older toolchains. */
else if (strcmp (str, "cpsr_all") == 0
|| strcmp (str, "spsr_all") == 0)
return;
}
- if (* str == 's' || * str == 'S')
+ if (*str == 's' || *str == 'S')
inst.instruction |= SPSR_BIT;
str += skip;
-
+
inst.instruction |= flags;
end_of_line (str);
}
/* Two possible forms:
"{C|S}PSR_<field>, Rm",
"{C|S}PSR_f, #expression". */
+
static void
do_msr (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
- if (psr_required_here (& str) == FAIL)
+ if (psr_required_here (&str) == FAIL)
return;
-
- if (skip_past_comma (& str) == FAIL)
+
+ if (skip_past_comma (&str) == FAIL)
{
inst.error = _("comma missing after psr flags");
return;
skip_whitespace (str);
- if (reg_required_here (& str, 0) != FAIL)
+ if (reg_required_here (&str, 0) != FAIL)
{
- inst.error = NULL;
+ inst.error = NULL;
inst.instruction |= flags;
end_of_line (str);
return;
}
- if (! is_immediate_prefix (* str))
+ if (! is_immediate_prefix (*str))
{
- inst.error = _("only a register or immediate value can follow a psr flag");
+ inst.error =
+ _("only a register or immediate value can follow a psr flag");
return;
}
- str ++;
+ str++;
inst.error = NULL;
-
- if (my_get_expression (& inst.reloc.exp, & str))
+
+ if (my_get_expression (&inst.reloc.exp, &str))
{
- inst.error = _("only a register or immediate value can follow a psr flag");
+ inst.error =
+ _("only a register or immediate value can follow a psr flag");
return;
}
-
+
if (inst.instruction & ((PSR_c | PSR_x | PSR_s) << PSR_SHIFT))
{
inst.error = _("can only set flag field with immediate value");
return;
}
-
+
flags |= INST_IMMEDIATE;
-
+
if (inst.reloc.exp.X_add_symbol)
{
inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
else
{
unsigned value = validate_immediate (inst.reloc.exp.X_add_number);
-
+
if (value == (unsigned) FAIL)
{
inst.error = _("Invalid constant");
return;
}
-
+
inst.instruction |= value;
}
- inst.error = NULL;
+ inst.error = NULL;
inst.instruction |= flags;
end_of_line (str);
}
SMULL RdLo, RdHi, Rm, Rs
UMLAL RdLo, RdHi, Rm, Rs
SMLAL RdLo, RdHi, Rm, Rs
-*/
+*/
+
static void
do_mull (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
int rdlo, rdhi, rm, rs;
- /* Only one format "rdlo, rdhi, rm, rs" */
+ /* Only one format "rdlo, rdhi, rm, rs". */
skip_whitespace (str);
if ((rdlo = reg_required_here (&str, 12)) == FAIL)
return;
}
- /* rdhi, rdlo and rm must all be different */
+ /* rdhi, rdlo and rm must all be different. */
if (rdlo == rdhi || rdlo == rm || rdhi == rm)
as_tsktsk (_("rdhi, rdlo and rm must all be different"));
inst.error = BAD_PC;
return;
}
-
+
inst.instruction |= flags;
end_of_line (str);
return;
static void
do_mul (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
int rd, rm;
-
- /* Only one format "rd, rm, rs" */
+
+ /* Only one format "rd, rm, rs". */
skip_whitespace (str);
if ((rd = reg_required_here (&str, 16)) == FAIL)
static void
do_mla (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
int rd, rm;
- /* Only one format "rd, rm, rs, rn" */
+ /* Only one format "rd, rm, rs, rn". */
skip_whitespace (str);
if ((rd = reg_required_here (&str, 16)) == FAIL)
return;
}
-/* Returns the index into fp_values of a floating point number, or -1 if
- not in the table. */
+/* Return the index into fp_values of a floating point number,
+ or -1 if not in the table. */
+
static int
my_get_float_expression (str)
- char ** str;
+ char **str;
{
LITTLENUM_TYPE words[MAX_LITTLENUMS];
- char * save_in;
- expressionS exp;
- int i;
- int j;
+ char *save_in;
+ expressionS exp;
+ int i;
+ int j;
memset (words, 0, MAX_LITTLENUMS * sizeof (LITTLENUM_TYPE));
- /* Look for a raw floating point number */
+
+ /* Look for a raw floating point number. */
if ((save_in = atof_ieee (*str, 'x', words)) != NULL
- && is_end_of_line [(unsigned char) *save_in])
+ && is_end_of_line[(unsigned char) *save_in])
{
for (i = 0; i < NUM_FLOAT_VALS; i++)
{
}
/* Try and parse a more complex expression, this will probably fail
- unless the code uses a floating point prefix (eg "0f") */
+ unless the code uses a floating point prefix (eg "0f"). */
save_in = input_line_pointer;
input_line_pointer = *str;
if (expression (&exp) == absolute_section
{
/* FIXME: 5 = X_PRECISION, should be #define'd where we can use it.
Ditto for 15. */
- if (gen_to_words (words, 5, (long)15) == 0)
+ if (gen_to_words (words, 5, (long) 15) == 0)
{
for (i = 0; i < NUM_FLOAT_VALS; i++)
{
return -1;
}
-/* Return true if anything in the expression is a bignum */
+/* Return true if anything in the expression is a bignum. */
+
static int
walk_no_bignums (sp)
- symbolS * sp;
+ symbolS *sp;
{
if (symbol_get_value_expression (sp)->X_op == O_big)
return 1;
static int
my_get_expression (ep, str)
- expressionS * ep;
- char ** str;
+ expressionS *ep;
+ char **str;
{
- char * save_in;
- segT seg;
-
+ char *save_in;
+ segT seg;
+
save_in = input_line_pointer;
input_line_pointer = *str;
seg = expression (ep);
return 0;
}
-/* unrestrict should be one if <shift> <register> is permitted for this
- instruction */
+/* UNRESTRICT should be one if <shift> <register> is permitted for this
+ instruction. */
static int
decode_shift (str, unrestrict)
- char ** str;
- int unrestrict;
-{
- struct asm_shift * shft;
- char * p;
- char c;
-
- skip_whitespace (* str);
-
+ char **str;
+ int unrestrict;
+{
+ struct asm_shift *shft;
+ char *p;
+ char c;
+
+ skip_whitespace (*str);
+
for (p = *str; isalpha (*p); p++)
;
}
skip_whitespace (p);
-
+
if (unrestrict && reg_required_here (&p, 8) != FAIL)
{
inst.instruction |= shft->value | SHIFT_BY_REG;
*str = p;
return SUCCESS;
}
- else if (is_immediate_prefix (* p))
+ else if (is_immediate_prefix (*p))
{
inst.error = NULL;
p++;
if (my_get_expression (&inst.reloc.exp, &p))
return FAIL;
- /* Validate some simple #expressions */
+ /* Validate some simple #expressions. */
if (inst.reloc.exp.X_op == O_constant)
{
unsigned num = inst.reloc.exp.X_add_number;
- /* Reject operations greater than 32, or lsl #32 */
+ /* Reject operations greater than 32, or lsl #32. */
if (num > 32 || (num == 32 && shft->value == 0))
{
inst.error = _("Invalid immediate shift");
return FAIL;
}
- /* Shifts of zero should be converted to lsl (which is zero)*/
+ /* Shifts of zero should be converted to lsl (which is
+ zero). */
if (num == 0)
{
*str = p;
}
else
{
- inst.error = unrestrict ? _("shift requires register or #expression")
- : _("shift requires #expression");
+ inst.error = (unrestrict
+ ? _("shift requires register or #expression")
+ : _("shift requires #expression"));
*str = p;
return FAIL;
}
return FAIL;
}
-/* Do those data_ops which can take a negative immediate constant */
-/* by altering the instuction. A bit of a hack really */
+/* Do those data_ops which can take a negative immediate constant
+ by altering the instuction. A bit of a hack really. */
/* MOV <-> MVN
AND <-> BIC
ADC <-> SBC
CMP <-> CMN
by negating the second operand.
*/
+
static int
negate_data_op (instruction, value)
- unsigned long * instruction;
- unsigned long value;
+ unsigned long *instruction;
+ unsigned long value;
{
int op, new_inst;
unsigned long negated, inverted;
op = (*instruction >> DATA_OP_SHIFT) & 0xf;
switch (op)
{
- /* First negates */
- case OPCODE_SUB: /* ADD <-> SUB */
+ /* First negates. */
+ case OPCODE_SUB: /* ADD <-> SUB */
new_inst = OPCODE_ADD;
value = negated;
break;
- case OPCODE_ADD:
- new_inst = OPCODE_SUB;
+ case OPCODE_ADD:
+ new_inst = OPCODE_SUB;
value = negated;
break;
- case OPCODE_CMP: /* CMP <-> CMN */
+ case OPCODE_CMP: /* CMP <-> CMN */
new_inst = OPCODE_CMN;
value = negated;
break;
- case OPCODE_CMN:
- new_inst = OPCODE_CMP;
+ case OPCODE_CMN:
+ new_inst = OPCODE_CMP;
value = negated;
break;
- /* Now Inverted ops */
- case OPCODE_MOV: /* MOV <-> MVN */
- new_inst = OPCODE_MVN;
+ /* Now Inverted ops. */
+ case OPCODE_MOV: /* MOV <-> MVN */
+ new_inst = OPCODE_MVN;
value = inverted;
break;
- case OPCODE_MVN:
+ case OPCODE_MVN:
new_inst = OPCODE_MOV;
value = inverted;
break;
- case OPCODE_AND: /* AND <-> BIC */
- new_inst = OPCODE_BIC;
+ case OPCODE_AND: /* AND <-> BIC */
+ new_inst = OPCODE_BIC;
value = inverted;
break;
- case OPCODE_BIC:
+ case OPCODE_BIC:
new_inst = OPCODE_AND;
value = inverted;
break;
- case OPCODE_ADC: /* ADC <-> SBC */
- new_inst = OPCODE_SBC;
+ case OPCODE_ADC: /* ADC <-> SBC */
+ new_inst = OPCODE_SBC;
value = inverted;
break;
- case OPCODE_SBC:
+ case OPCODE_SBC:
new_inst = OPCODE_ADC;
value = inverted;
break;
- /* We cannot do anything */
- default:
+ /* We cannot do anything. */
+ default:
return FAIL;
}
*instruction &= OPCODE_MASK;
*instruction |= new_inst << DATA_OP_SHIFT;
- return value;
+ return value;
}
static int
data_op2 (str)
- char ** str;
+ char **str;
{
int value;
expressionS expr;
- skip_whitespace (* str);
-
+ skip_whitespace (*str);
+
if (reg_required_here (str, 0) != FAIL)
{
if (skip_past_comma (str) == SUCCESS)
}
else
{
- /* Immediate expression */
+ /* Immediate expression. */
if (is_immediate_prefix (**str))
{
(*str)++;
inst.error = NULL;
-
+
if (my_get_expression (&inst.reloc.exp, str))
return FAIL;
{
if (skip_past_comma (str) == SUCCESS)
{
- /* #x, y -- ie explicit rotation by Y */
+ /* #x, y -- ie explicit rotation by Y. */
if (my_get_expression (&expr, str))
return FAIL;
inst.error = _("Constant expression expected");
return FAIL;
}
-
- /* Rotate must be a multiple of 2 */
+
+ /* Rotate must be a multiple of 2. */
if (((unsigned) expr.X_add_number) > 30
|| (expr.X_add_number & 1) != 0
|| ((unsigned) inst.reloc.exp.X_add_number) > 255)
return SUCCESS;
}
- /* Implicit rotation, select a suitable one */
+ /* Implicit rotation, select a suitable one. */
value = validate_immediate (inst.reloc.exp.X_add_number);
if (value == FAIL)
{
- /* Can't be done, perhaps the code reads something like
- "add Rd, Rn, #-n", where "sub Rd, Rn, #n" would be ok */
+ /* Can't be done. Perhaps the code reads something like
+ "add Rd, Rn, #-n", where "sub Rd, Rn, #n" would be ok. */
if ((value = negate_data_op (&inst.instruction,
inst.reloc.exp.X_add_number))
== FAIL)
static int
fp_op2 (str)
- char ** str;
+ char **str;
{
- skip_whitespace (* str);
+ skip_whitespace (*str);
if (fp_reg_required_here (str, 0) != FAIL)
return SUCCESS;
else
{
- /* Immediate expression */
+ /* Immediate expression. */
if (*((*str)++) == '#')
{
int i;
inst.error = NULL;
- skip_whitespace (* str);
+ skip_whitespace (*str);
- /* First try and match exact strings, this is to guarantee that
- some formats will work even for cross assembly */
+ /* First try and match exact strings, this is to guarantee
+ that some formats will work even for cross assembly. */
for (i = 0; fp_const[i]; i++)
{
inst.error = _("Invalid floating point immediate expression");
return FAIL;
}
- inst.error = _("Floating point register or immediate expression expected");
+ inst.error =
+ _("Floating point register or immediate expression expected");
return FAIL;
}
}
static void
do_arit (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
static void
do_adr (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
/* This is a pseudo-op of the form "adr rd, label" to be converted
inst.error = BAD_ARGS;
return;
}
-
+
/* Frag hacking will turn this into a sub instruction if the offset turns
out to be negative. */
inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
inst.reloc.exp.X_add_number -= 8; /* PC relative adjust. */
inst.reloc.pc_rel = 1;
inst.instruction |= flags;
-
+
end_of_line (str);
}
static void
do_adrl (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
/* This is a pseudo-op of the form "adrl rd, label" to be converted
into a relative address of the form:
add rd, pc, #low(label-.-8)"
- add rd, rd, #high(label-.-8)" */
+ add rd, rd, #high(label-.-8)" */
skip_whitespace (str);
- if (reg_required_here (& str, 12) == FAIL
- || skip_past_comma (& str) == FAIL
- || my_get_expression (& inst.reloc.exp, & str))
+ if (reg_required_here (&str, 12) == FAIL
+ || skip_past_comma (&str) == FAIL
+ || my_get_expression (&inst.reloc.exp, &str))
{
if (!inst.error)
inst.error = BAD_ARGS;
return;
}
-
+
end_of_line (str);
-
+
/* Frag hacking will turn this into a sub instruction if the offset turns
out to be negative. */
inst.reloc.type = BFD_RELOC_ARM_ADRL_IMMEDIATE;
- inst.reloc.exp.X_add_number -= 8; /* PC relative adjust */
+ inst.reloc.exp.X_add_number -= 8; /* PC relative adjust */
inst.reloc.pc_rel = 1;
inst.instruction |= flags;
inst.size = INSN_SIZE * 2;
-
+
return;
}
static void
do_cmp (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
static void
do_mov (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
static int
ldst_extend (str, hwse)
- char ** str;
- int hwse;
+ char **str;
+ int hwse;
{
int add = INDEX_UP;
case '#':
case '$':
(*str)++;
- if (my_get_expression (& inst.reloc.exp, str))
+ if (my_get_expression (&inst.reloc.exp, str))
return FAIL;
if (inst.reloc.exp.X_op == O_constant)
{
int value = inst.reloc.exp.X_add_number;
- if ((hwse && (value < -255 || value > 255))
- || (value < -4095 || value > 4095))
+ if ((hwse && (value < -255 || value > 255))
+ || (value < -4095 || value > 4095))
{
inst.error = _("address offset too large");
return FAIL;
add = 0;
}
- /* Halfword and signextension instructions have the
- immediate value split across bits 11..8 and bits 3..0 */
- if (hwse)
- inst.instruction |= add | HWOFFSET_IMM | ((value >> 4) << 8) | (value & 0xF);
- else
- inst.instruction |= add | value;
+ /* Halfword and signextension instructions have the
+ immediate value split across bits 11..8 and bits 3..0. */
+ if (hwse)
+ inst.instruction |= (add | HWOFFSET_IMM
+ | ((value >> 4) << 8) | (value & 0xF));
+ else
+ inst.instruction |= add | value;
}
else
{
- if (hwse)
- {
- inst.instruction |= HWOFFSET_IMM;
- inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
- }
- else
- inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
+ if (hwse)
+ {
+ inst.instruction |= HWOFFSET_IMM;
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
+ }
+ else
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
inst.reloc.pc_rel = 0;
}
return SUCCESS;
case '-':
- add = 0; /* and fall through */
+ add = 0;
+ /* Fall through. */
+
case '+':
- (*str)++; /* and fall through */
+ (*str)++;
+ /* Fall through. */
+
default:
if (reg_required_here (str, 0) == FAIL)
return FAIL;
if (hwse)
- inst.instruction |= add;
+ inst.instruction |= add;
else
- {
- inst.instruction |= add | OFFSET_REG;
- if (skip_past_comma (str) == SUCCESS)
- return decode_shift (str, SHIFT_RESTRICT);
- }
+ {
+ inst.instruction |= add | OFFSET_REG;
+ if (skip_past_comma (str) == SUCCESS)
+ return decode_shift (str, SHIFT_RESTRICT);
+ }
return SUCCESS;
}
static void
do_ldst (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
int halfword = 0;
/* This is not ideal, but it is the simplest way of dealing with the
ARM7T halfword instructions (since they use a different
- encoding, but the same mnemonic): */
+ encoding, but the same mnemonic): */
halfword = (flags & 0x80000000) != 0;
if (halfword)
{
/* This is actually a load/store of a halfword, or a
- signed-extension load */
+ signed-extension load. */
if ((cpu_variant & ARM_HALFWORD) == 0)
- {
- inst.error
+ {
+ inst.error
= _("Processor does not support halfwords or signed bytes");
- return;
- }
+ return;
+ }
- inst.instruction = (inst.instruction & COND_MASK)
- | (flags & ~COND_MASK);
+ inst.instruction = ((inst.instruction & COND_MASK)
+ | (flags & ~COND_MASK));
flags = 0;
}
skip_whitespace (str);
-
- if ((conflict_reg = reg_required_here (& str, 12)) == FAIL)
+
+ if ((conflict_reg = reg_required_here (&str, 12)) == FAIL)
{
if (!inst.error)
inst.error = BAD_ARGS;
return;
}
- if (skip_past_comma (& str) == FAIL)
+ if (skip_past_comma (&str) == FAIL)
{
inst.error = _("Address expected");
return;
if (*str == ']')
{
- str ++;
-
+ str++;
+
if (skip_past_comma (&str) == SUCCESS)
{
- /* [Rn],... (post inc) */
+ /* [Rn],... (post inc) */
if (ldst_extend (&str, halfword) == FAIL)
return;
if (conflict_reg)
as_warn (_("%s register same as write-back base"),
- (inst.instruction & LOAD_BIT) ? _("destination") : _("source") );
+ ((inst.instruction & LOAD_BIT)
+ ? _("destination") : _("source")));
}
else
{
- /* [Rn] */
- if (halfword)
- inst.instruction |= HWOFFSET_IMM;
+ /* [Rn] */
+ if (halfword)
+ inst.instruction |= HWOFFSET_IMM;
- skip_whitespace (str);
+ skip_whitespace (str);
- if (*str == '!')
- {
- if (conflict_reg)
- as_warn (_("%s register same as write-back base"),
- (inst.instruction & LOAD_BIT) ? _("destination") : _("source") );
- str++;
- inst.instruction |= WRITE_BACK;
- }
+ if (*str == '!')
+ {
+ if (conflict_reg)
+ as_warn (_("%s register same as write-back base"),
+ ((inst.instruction & LOAD_BIT)
+ ? _("destination") : _("source")));
+ str++;
+ inst.instruction |= WRITE_BACK;
+ }
flags |= INDEX_UP;
if (! (flags & TRANS_BIT))
}
else
{
- /* [Rn,...] */
+ /* [Rn,...] */
if (skip_past_comma (&str) == FAIL)
{
inst.error = _("pre-indexed expression expected");
{
if (conflict_reg)
as_warn (_("%s register same as write-back base"),
- (inst.instruction & LOAD_BIT) ? _("destination") : _("source") );
+ ((inst.instruction & LOAD_BIT)
+ ? _("destination") : _("source")));
str++;
inst.instruction |= WRITE_BACK;
}
}
else if (*str == '=')
{
- /* Parse an "ldr Rd, =expr" instruction; this is another pseudo op */
+ /* Parse an "ldr Rd, =expr" instruction; this is another pseudo op. */
str++;
skip_whitespace (str);
}
if (inst.reloc.exp.X_op == O_constant
- && (value = validate_immediate(inst.reloc.exp.X_add_number)) != FAIL)
+ && (value = validate_immediate (inst.reloc.exp.X_add_number)) != FAIL)
{
- /* This can be done with a mov instruction */
+ /* This can be done with a mov instruction. */
inst.instruction &= LITERAL_MASK;
inst.instruction |= INST_IMMEDIATE | (OPCODE_MOV << DATA_OP_SHIFT);
inst.instruction |= (flags & COND_MASK) | (value & 0xfff);
- end_of_line(str);
- return;
+ end_of_line (str);
+ return;
}
else
{
- /* Insert into literal pool */
+ /* Insert into literal pool. */
if (add_to_lit_pool () == FAIL)
{
if (!inst.error)
- inst.error = _("literal pool insertion failed");
+ inst.error = _("literal pool insertion failed");
return;
}
- /* Change the instruction exp to point to the pool */
- if (halfword)
- {
- inst.instruction |= HWOFFSET_IMM;
- inst.reloc.type = BFD_RELOC_ARM_HWLITERAL;
- }
- else
+ /* Change the instruction exp to point to the pool. */
+ if (halfword)
+ {
+ inst.instruction |= HWOFFSET_IMM;
+ inst.reloc.type = BFD_RELOC_ARM_HWLITERAL;
+ }
+ else
inst.reloc.type = BFD_RELOC_ARM_LITERAL;
inst.reloc.pc_rel = 1;
inst.instruction |= (REG_PC << 16);
- pre_inc = 1;
+ pre_inc = 1;
}
}
else
return;
if (halfword)
- {
- inst.instruction |= HWOFFSET_IMM;
- inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
- }
+ {
+ inst.instruction |= HWOFFSET_IMM;
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
+ }
else
- inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
#ifndef TE_WINCE
- inst.reloc.exp.X_add_number -= 8; /* PC rel adjust */
+ /* PC rel adjust. */
+ inst.reloc.exp.X_add_number -= 8;
#endif
inst.reloc.pc_rel = 1;
inst.instruction |= (REG_PC << 16);
pre_inc = 1;
}
-
+
if (pre_inc && (flags & TRANS_BIT))
inst.error = _("Pre-increment instruction with translate");
static long
reg_list (strp)
- char ** strp;
+ char **strp;
{
- char * str = *strp;
- long range = 0;
- int another_range;
+ char *str = *strp;
+ long range = 0;
+ int another_range;
- /* We come back here if we get ranges concatenated by '+' or '|' */
+ /* We come back here if we get ranges concatenated by '+' or '|'. */
do
{
another_range = 0;
{
int in_range = 0;
int cur_reg = -1;
-
+
str++;
do
{
int reg;
-
+
skip_whitespace (str);
- if ((reg = reg_required_here (& str, -1)) == FAIL)
+ if ((reg = reg_required_here (&str, -1)) == FAIL)
return FAIL;
-
+
if (in_range)
{
int i;
-
+
if (reg <= cur_reg)
{
inst.error = _("Bad range in register list");
for (i = cur_reg + 1; i < reg; i++)
{
if (range & (1 << i))
- as_tsktsk
+ as_tsktsk
(_("Warning: Duplicated register (r%d) in register list"),
i);
else
range |= 1 << reg;
cur_reg = reg;
- } while (skip_past_comma (&str) != FAIL
- || (in_range = 1, *str++ == '-'));
+ }
+ while (skip_past_comma (&str) != FAIL
+ || (in_range = 1, *str++ == '-'));
str--;
skip_whitespace (str);
if (expr.X_op == O_constant)
{
- if (expr.X_add_number
+ if (expr.X_add_number
!= (expr.X_add_number & 0x0000ffff))
{
inst.error = _("invalid register mask");
regno &= -regno;
regno = (1 << regno) - 1;
- as_tsktsk
+ as_tsktsk
(_("Warning: Duplicated register (r%d) in register list"),
regno);
}
str++;
another_range = 1;
}
- } while (another_range);
+ }
+ while (another_range);
*strp = str;
return range;
static void
do_ldmstm (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
int base_reg;
static void
do_swi (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
-
+
/* Allow optional leading '#'. */
if (is_immediate_prefix (*str))
str++;
- if (my_get_expression (& inst.reloc.exp, & str))
+ if (my_get_expression (&inst.reloc.exp, &str))
return;
inst.reloc.type = BFD_RELOC_ARM_SWI;
inst.reloc.pc_rel = 0;
inst.instruction |= flags;
-
+
end_of_line (str);
-
+
return;
}
static void
do_swap (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
int reg;
-
+
skip_whitespace (str);
if ((reg = reg_required_here (&str, 12)) == FAIL)
static void
do_branch (str, flags)
- char * str;
+ char *str;
unsigned long flags ATTRIBUTE_UNUSED;
{
if (my_get_expression (&inst.reloc.exp, &str))
return;
-
+
#ifdef OBJ_ELF
{
- char * save_in;
-
- /* ScottB: February 5, 1998 */
- /* Check to see of PLT32 reloc required for the instruction. */
-
- /* arm_parse_reloc() works on input_line_pointer.
+ char *save_in;
+
+ /* ScottB: February 5, 1998 - Check to see of PLT32 reloc
+ required for the instruction. */
+
+ /* arm_parse_reloc () works on input_line_pointer.
We actually want to parse the operands to the branch instruction
passed in 'str'. Save the input pointer and restore it later. */
save_in = input_line_pointer;
#else
inst.reloc.type = BFD_RELOC_ARM_PCREL_BRANCH;
inst.reloc.pc_rel = 1;
-#endif /* OBJ_ELF */
-
+#endif /* OBJ_ELF */
+
end_of_line (str);
return;
}
static void
do_bx (str, flags)
- char * str;
+ char *str;
unsigned long flags ATTRIBUTE_UNUSED;
{
int reg;
static void
do_cdp (str, flags)
- char * str;
+ char *str;
unsigned long flags ATTRIBUTE_UNUSED;
{
/* Co-processor data operation.
static void
do_lstc (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
/* Co-processor register load/store.
static void
do_co_reg (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
/* Co-processor register transfer.
static void
do_fp_ctrl (str, flags)
- char * str;
+ char *str;
unsigned long flags ATTRIBUTE_UNUSED;
{
/* FP control registers.
static void
do_fp_ldst (str, flags)
- char * str;
+ char *str;
unsigned long flags ATTRIBUTE_UNUSED;
{
skip_whitespace (str);
static void
do_fp_ldmstm (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
int num_regs;
return;
}
- /* Get Number of registers to transfer */
+ /* Get Number of registers to transfer. */
if (skip_past_comma (&str) == FAIL
|| my_get_expression (&inst.reloc.exp, &str))
{
str++;
if (reg == REG_PC)
{
- inst.error = _("R15 not allowed as base register with write-back");
+ inst.error =
+ _("R15 not allowed as base register with write-back");
return;
}
}
if (flags & CP_T_Pre)
{
- /* Pre-decrement */
+ /* Pre-decrement. */
offset = 3 * num_regs;
if (write_back)
flags |= CP_T_WB;
}
else
{
- /* Post-increment */
+ /* Post-increment. */
if (write_back)
{
flags |= CP_T_WB;
static void
do_fp_dyadic (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
static void
do_fp_monadic (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
static void
do_fp_cmp (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
static void
do_fp_from_reg (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
static void
do_fp_to_reg (str, flags)
- char * str;
+ char *str;
unsigned long flags;
{
skip_whitespace (str);
return;
}
-/* Thumb specific routines */
+/* Thumb specific routines. */
/* Parse and validate that a register is of the right form, this saves
- repeated checking of this information in many similar cases.
- Unlike the 32-bit case we do not insert the register into the opcode
- here, since the position is often unknown until the full instruction
+ repeated checking of this information in many similar cases.
+ Unlike the 32-bit case we do not insert the register into the opcode
+ here, since the position is often unknown until the full instruction
has been parsed. */
+
static int
thumb_reg (strp, hi_lo)
char ** strp;
/* Parse an add or subtract instruction, SUBTRACT is non-zero if the opcode
was SUB. */
+
static void
thumb_add_sub (str, subtract)
- char * str;
- int subtract;
+ char *str;
+ int subtract;
{
int Rd, Rs, Rn = FAIL;
if (skip_past_comma (&str) == FAIL)
{
- /* Two operand format, shuffle the registers and pretend there
- are 3 */
+ /* Two operand format, shuffle the registers
+ and pretend there are 3. */
Rn = Rs;
Rs = Rd;
}
}
/* We now have Rd and Rs set to registers, and Rn set to a register or FAIL;
- for the latter case, EXPR contains the immediate that was found. */
+ for the latter case, EXPR contains the immediate that was found. */
if (Rn != FAIL)
{
/* All register format. */
return;
}
- /* Can't do this for SUB */
+ /* Can't do this for SUB. */
if (subtract)
{
inst.error = _("subtract valid only on lo regs");
if (inst.reloc.exp.X_op != O_constant)
{
/* Value isn't known yet, all we can do is store all the fragments
- we know about in the instruction and let the reloc hacking
+ we know about in the instruction and let the reloc hacking
work it all out. */
inst.instruction = (subtract ? 0x8000 : 0) | (Rd << 4) | Rs;
inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
offset = -offset;
subtract = 1;
- /* Quick check, in case offset is MIN_INT */
+ /* Quick check, in case offset is MIN_INT. */
if (offset < 0)
{
inst.error = _("immediate value out of range");
}
}
}
-
+
end_of_line (str);
}
static void
thumb_shift (str, shift)
- char * str;
- int shift;
+ char *str;
+ int shift;
{
int Rd, Rs, Rn = FAIL;
{
/* Two operand immediate format, set Rs to Rd. */
Rs = Rd;
- str ++;
+ str++;
if (my_get_expression (&inst.reloc.exp, &str))
return;
}
else
{
- if ((Rs = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ if ((Rs = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
return;
if (skip_past_comma (&str) == FAIL)
{
- /* Two operand format, shuffle the registers and pretend there
- are 3 */
+ /* Two operand format, shuffle the registers
+ and pretend there are 3. */
Rn = Rs;
Rs = Rd;
}
}
/* We now have Rd and Rs set to registers, and Rn set to a register or FAIL;
- for the latter case, EXPR contains the immediate that was found. */
+ for the latter case, EXPR contains the immediate that was found. */
if (Rn != FAIL)
{
if (inst.reloc.exp.X_op != O_constant)
{
/* Value isn't known yet, create a dummy reloc and let reloc
- hacking fix it up */
+ hacking fix it up. */
inst.reloc.type = BFD_RELOC_ARM_THUMB_SHIFT;
}
return;
}
- /* Shifts of zero are handled by converting to LSL */
+ /* Shifts of zero are handled by converting to LSL. */
if (shift_value == 0)
inst.instruction = T_OPCODE_LSL_I;
- /* Shifts of 32 are encoded as a shift of zero */
+ /* Shifts of 32 are encoded as a shift of zero. */
if (shift_value == 32)
shift_value = 0;
inst.instruction |= Rd | (Rs << 3);
}
-
+
end_of_line (str);
}
static void
thumb_mov_compare (str, move)
- char * str;
- int move;
+ char *str;
+ int move;
{
int Rd, Rs = FAIL;
{
if (move == THUMB_MOVE)
/* A move of two lowregs is encoded as ADD Rd, Rs, #0
- since a MOV instruction produces unpredictable results */
+ since a MOV instruction produces unpredictable results. */
inst.instruction = T_OPCODE_ADD_I3;
else
inst.instruction = T_OPCODE_CMP_LR;
static void
thumb_load_store (str, load_store, size)
- char * str;
- int load_store;
- int size;
+ char *str;
+ int load_store;
+ int size;
{
int Rd, Rb, Ro = FAIL;
}
else if (*str == '=')
{
- /* Parse an "ldr Rd, =expr" instruction; this is another pseudo op */
+ /* Parse an "ldr Rd, =expr" instruction; this is another pseudo op. */
str++;
skip_whitespace (str);
- if (my_get_expression (& inst.reloc.exp, & str))
+ if (my_get_expression (&inst.reloc.exp, &str))
return;
end_of_line (str);
-
- if ( inst.reloc.exp.X_op != O_constant
+
+ if (inst.reloc.exp.X_op != O_constant
&& inst.reloc.exp.X_op != O_symbol)
{
inst.error = "Constant expression expected";
if (inst.reloc.exp.X_op == O_constant
&& ((inst.reloc.exp.X_add_number & ~0xFF) == 0))
{
- /* This can be done with a mov instruction */
+ /* This can be done with a mov instruction. */
inst.instruction = T_OPCODE_MOV_I8 | (Rd << 8);
inst.instruction |= inst.reloc.exp.X_add_number;
- return;
+ return;
}
- /* Insert into literal pool */
+ /* Insert into literal pool. */
if (add_to_lit_pool () == FAIL)
{
if (!inst.error)
- inst.error = "literal pool insertion failed";
+ inst.error = "literal pool insertion failed";
return;
}
inst.reloc.type = BFD_RELOC_ARM_THUMB_OFFSET;
inst.reloc.pc_rel = 1;
inst.instruction = T_OPCODE_LDR_PC | (Rd << 8);
- inst.reloc.exp.X_add_number += 4; /* Adjust ARM pipeline offset to Thumb */
+ /* Adjust ARM pipeline offset to Thumb. */
+ inst.reloc.exp.X_add_number += 4;
return;
}
inst.instruction = T_OPCODE_LDR_PC | (Rd << 8);
inst.reloc.pc_rel = 1;
- inst.reloc.exp.X_add_number -= 4; /* Pipeline offset */
+ inst.reloc.exp.X_add_number -= 4; /* Pipeline offset. */
inst.reloc.type = BFD_RELOC_ARM_THUMB_OFFSET;
end_of_line (str);
return;
}
else if (Ro == FAIL)
{
- /* Immediate offset */
+ /* Immediate offset. */
if (size == THUMB_WORD)
inst.instruction = (load_store == THUMB_LOAD
? T_OPCODE_LDR_IW : T_OPCODE_STR_IW);
if (inst.reloc.exp.X_op == O_constant)
{
unsigned offset = inst.reloc.exp.X_add_number;
-
+
if (offset & ~(0x1f << size))
{
inst.error = _("Invalid offset");
}
else
{
- /* Register offset */
+ /* Register offset. */
if (size == THUMB_WORD)
inst.instruction = (load_store == THUMB_LOAD
? T_OPCODE_LDR_RW : T_OPCODE_STR_RW);
static void
do_t_nop (str)
- char * str;
+ char *str;
{
- /* Do nothing */
+ /* Do nothing. */
end_of_line (str);
return;
}
-/* Handle the Format 4 instructions that do not have equivalents in other
+/* Handle the Format 4 instructions that do not have equivalents in other
formats. That is, ADC, AND, EOR, SBC, ROR, TST, NEG, CMN, ORR, MUL,
BIC and MVN. */
+
static void
do_t_arit (str)
- char * str;
+ char *str;
{
int Rd, Rs, Rn;
|| skip_past_comma (&str) == FAIL
|| (Rs = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
{
- inst.error = BAD_ARGS;
- return;
+ inst.error = BAD_ARGS;
+ return;
}
if (skip_past_comma (&str) != FAIL)
if (inst.instruction == T_OPCODE_TST
|| inst.instruction == T_OPCODE_CMN
|| inst.instruction == T_OPCODE_NEG
- || inst.instruction == T_OPCODE_MVN)
+ || inst.instruction == T_OPCODE_MVN)
{
inst.error = BAD_ARGS;
return;
static void
do_t_add (str)
- char * str;
+ char *str;
{
thumb_add_sub (str, 0);
}
static void
do_t_asr (str)
- char * str;
+ char *str;
{
thumb_shift (str, THUMB_ASR);
}
static void
do_t_branch9 (str)
- char * str;
+ char *str;
{
if (my_get_expression (&inst.reloc.exp, &str))
return;
static void
do_t_branch12 (str)
- char * str;
+ char *str;
{
if (my_get_expression (&inst.reloc.exp, &str))
return;
static symbolS *
find_real_start (symbolP)
- symbolS * symbolP;
+ symbolS *symbolP;
{
- char * real_start;
- const char * name = S_GET_NAME (symbolP);
- symbolS * new_target;
+ char *real_start;
+ const char *name = S_GET_NAME (symbolP);
+ symbolS *new_target;
- /* This definiton must agree with the one in gcc/config/arm/thumb.c */
+ /* This definiton must agree with the one in gcc/config/arm/thumb.c. */
#define STUB_NAME ".real_start_of"
if (name == NULL)
- abort();
+ abort ();
/* Names that start with '.' are local labels, not function entry points.
The compiler may generate BL instructions to these labels because it
needs to perform a branch to a far away location. */
if (name[0] == '.')
return symbolP;
-
+
real_start = malloc (strlen (name) + strlen (STUB_NAME) + 1);
sprintf (real_start, "%s%s", STUB_NAME, name);
new_target = symbol_find (real_start);
-
+
if (new_target == NULL)
{
as_warn ("Failed to find real start of function: %s\n", name);
return new_target;
}
-
static void
do_t_branch23 (str)
- char * str;
+ char *str;
{
- if (my_get_expression (& inst.reloc.exp, & str))
+ if (my_get_expression (&inst.reloc.exp, &str))
return;
-
+
inst.reloc.type = BFD_RELOC_THUMB_PCREL_BRANCH23;
inst.reloc.pc_rel = 1;
end_of_line (str);
the THUMB_FUNC attribute, then we must be calling a function which has
the (interfacearm) attribute. We look for the Thumb entry point to that
function and change the branch to refer to that function instead. */
- if ( inst.reloc.exp.X_op == O_symbol
+ if (inst.reloc.exp.X_op == O_symbol
&& inst.reloc.exp.X_add_symbol != NULL
&& S_IS_DEFINED (inst.reloc.exp.X_add_symbol)
&& ! THUMB_IS_FUNC (inst.reloc.exp.X_add_symbol))
- inst.reloc.exp.X_add_symbol = find_real_start (inst.reloc.exp.X_add_symbol);
+ inst.reloc.exp.X_add_symbol =
+ find_real_start (inst.reloc.exp.X_add_symbol);
}
static void
do_t_bx (str)
- char * str;
+ char *str;
{
int reg;
static void
do_t_compare (str)
- char * str;
+ char *str;
{
thumb_mov_compare (str, THUMB_COMPARE);
}
static void
do_t_ldmstm (str)
- char * str;
+ char *str;
{
int Rb;
long range;
if (inst.reloc.type != BFD_RELOC_NONE)
{
- /* This really doesn't seem worth it. */
+ /* This really doesn't seem worth it. */
inst.reloc.type = BFD_RELOC_NONE;
inst.error = _("Expression too complex");
return;
static void
do_t_ldr (str)
- char * str;
+ char *str;
{
thumb_load_store (str, THUMB_LOAD, THUMB_WORD);
}
static void
do_t_ldrb (str)
- char * str;
+ char *str;
{
thumb_load_store (str, THUMB_LOAD, THUMB_BYTE);
}
static void
do_t_ldrh (str)
- char * str;
+ char *str;
{
thumb_load_store (str, THUMB_LOAD, THUMB_HALFWORD);
}
static void
do_t_lds (str)
- char * str;
+ char *str;
{
int Rd, Rb, Ro;
static void
do_t_lsl (str)
- char * str;
+ char *str;
{
thumb_shift (str, THUMB_LSL);
}
static void
do_t_lsr (str)
- char * str;
+ char *str;
{
thumb_shift (str, THUMB_LSR);
}
static void
do_t_mov (str)
- char * str;
+ char *str;
{
thumb_mov_compare (str, THUMB_MOVE);
}
static void
do_t_push_pop (str)
- char * str;
+ char *str;
{
long range;
if (inst.reloc.type != BFD_RELOC_NONE)
{
- /* This really doesn't seem worth it. */
+ /* This really doesn't seem worth it. */
inst.reloc.type = BFD_RELOC_NONE;
inst.error = _("Expression too complex");
return;
static void
do_t_str (str)
- char * str;
+ char *str;
{
thumb_load_store (str, THUMB_STORE, THUMB_WORD);
}
static void
do_t_strb (str)
- char * str;
+ char *str;
{
thumb_load_store (str, THUMB_STORE, THUMB_BYTE);
}
static void
do_t_strh (str)
- char * str;
+ char *str;
{
thumb_load_store (str, THUMB_STORE, THUMB_HALFWORD);
}
static void
do_t_sub (str)
- char * str;
+ char *str;
{
thumb_add_sub (str, 1);
}
static void
do_t_swi (str)
- char * str;
+ char *str;
{
skip_whitespace (str);
static void
do_t_adr (str)
- char * str;
+ char *str;
{
int reg;
inst.reloc.exp.X_add_number -= 4; /* PC relative adjust. */
inst.reloc.pc_rel = 1;
inst.instruction |= REG_PC; /* Rd is already placed into the instruction. */
-
+
end_of_line (str);
}
insert_reg (entry)
int entry;
{
- int len = strlen (reg_table[entry].name) + 2;
- char * buf = (char *) xmalloc (len);
- char * buf2 = (char *) xmalloc (len);
- int i = 0;
+ int len = strlen (reg_table[entry].name) + 2;
+ char *buf = (char *) xmalloc (len);
+ char *buf2 = (char *) xmalloc (len);
+ int i = 0;
#ifdef REGISTER_PREFIX
buf[i++] = REGISTER_PREFIX;
buf2[i] = '\0';
- hash_insert (arm_reg_hsh, buf, (PTR) ®_table[entry]);
+ hash_insert (arm_reg_hsh, buf, (PTR) ®_table[entry]);
hash_insert (arm_reg_hsh, buf2, (PTR) ®_table[entry]);
}
int regnum;
{
struct reg_entry *new =
- (struct reg_entry *)xmalloc (sizeof (struct reg_entry));
+ (struct reg_entry *) xmalloc (sizeof (struct reg_entry));
char *name = xmalloc (strlen (str) + 1);
strcpy (name, str);
int i;
for (i = 0; i < NUM_FLOAT_VALS; i++)
- if (atof_ieee ((char *)fp_const[i], 'x', fp_values[i]) == NULL)
+ if (atof_ieee ((char *) fp_const[i], 'x', fp_values[i]) == NULL)
abort ();
}
{
unsigned mach;
unsigned int i;
-
- if ( (arm_ops_hsh = hash_new ()) == NULL
+
+ if ((arm_ops_hsh = hash_new ()) == NULL
|| (arm_tops_hsh = hash_new ()) == NULL
|| (arm_cond_hsh = hash_new ()) == NULL
|| (arm_shift_hsh = hash_new ()) == NULL
|| (arm_reg_hsh = hash_new ()) == NULL
|| (arm_psr_hsh = hash_new ()) == NULL)
as_fatal (_("Virtual memory exhausted"));
-
+
for (i = 0; i < sizeof (insns) / sizeof (struct asm_opcode); i++)
hash_insert (arm_ops_hsh, insns[i].template, (PTR) (insns + i));
for (i = 0; i < sizeof (tinsns) / sizeof (struct thumb_opcode); i++)
#if defined OBJ_COFF || defined OBJ_ELF
{
unsigned int flags = 0;
-
+
/* Set the flags in the private structure. */
if (uses_apcs_26) flags |= F_APCS26;
if (support_interwork) flags |= F_INTERWORK;
bfd_set_private_flags (stdoutput, flags);
}
#endif
-
+
/* Record the CPU type as well. */
switch (cpu_variant & ARM_CPU_MASK)
{
case ARM_2:
mach = bfd_mach_arm_2;
break;
-
+
case ARM_3: /* Also ARM_250. */
mach = bfd_mach_arm_2a;
break;
-
+
default:
case ARM_6 | ARM_3 | ARM_2: /* Actually no CPU type defined. */
mach = bfd_mach_arm_4;
break;
-
+
case ARM_7: /* Also ARM_6. */
mach = bfd_mach_arm_3;
break;
}
-
+
/* Catch special cases. */
if (cpu_variant != (FPU_DEFAULT | CPU_DEFAULT))
{
else if (cpu_variant & ARM_LONGMUL)
mach = bfd_mach_arm_3M;
}
-
+
bfd_set_arch_mach (stdoutput, TARGET_ARCH, mach);
}
THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2 (short) and 4 (long) Floating numbers are put out as a series of
LITTLENUMS (shorts, here at least). */
+
void
md_number_to_chars (buf, val, n)
- char * buf;
+ char *buf;
valueT val;
- int n;
+ int n;
{
if (target_big_endian)
number_to_chars_bigendian (buf, val, n);
number_to_chars_littleendian (buf, val, n);
}
-static valueT
+static valueT
md_chars_to_number (buf, n)
- char * buf;
+ char *buf;
int n;
{
valueT result = 0;
- unsigned char * where = (unsigned char *) buf;
+ unsigned char *where = (unsigned char *) buf;
if (target_big_endian)
{
}
/* Turn a string in input_line_pointer into a floating point constant
- of type TYPE, and store the appropriate bytes in *litP. The number
- of LITTLENUMS emitted is stored in *sizeP . An error message is
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP. An error message is
returned, or NULL on OK.
Note that fp constants aren't represent in the normal way on the ARM.
char *
md_atof (type, litP, sizeP)
- char type;
- char * litP;
- int * sizeP;
+ char type;
+ char *litP;
+ int *sizeP;
{
int prec;
LITTLENUM_TYPE words[MAX_LITTLENUMS];
return 0;
}
-/* The knowledge of the PC's pipeline offset is built into the insns themselves. */
+/* The knowledge of the PC's pipeline offset is built into the insns
+ themselves. */
+
long
md_pcrel_from (fixP)
- fixS * fixP;
+ fixS *fixP;
{
- if ( fixP->fx_addsy
+ if (fixP->fx_addsy
&& S_GET_SEGMENT (fixP->fx_addsy) == undefined_section
&& fixP->fx_subsy == NULL)
return 0;
-
+
if (fixP->fx_pcrel && (fixP->fx_r_type == BFD_RELOC_ARM_THUMB_ADD))
{
/* PC relative addressing on the Thumb is slightly odd
#endif
}
-/* Round up a section size to the appropriate boundary. */
+/* Round up a section size to the appropriate boundary. */
+
valueT
md_section_align (segment, size)
segT segment ATTRIBUTE_UNUSED;
#ifdef OBJ_ELF
return size;
#else
- /* Round all sects to multiple of 4 */
+ /* Round all sects to multiple of 4. */
return (size + 3) & ~3;
#endif
}
-/* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise
- we have no need to default values of symbols. */
+/* Under ELF we need to default _GLOBAL_OFFSET_TABLE.
+ Otherwise we have no need to default values of symbols. */
-/* ARGSUSED */
symbolS *
md_undefined_symbol (name)
- char * name ATTRIBUTE_UNUSED;
+ char *name ATTRIBUTE_UNUSED;
{
#ifdef OBJ_ELF
if (name[0] == '_' && name[1] == 'G'
{
if (symbol_find (name))
as_bad ("GOT already in the symbol table");
-
+
GOT_symbol = symbol_new (name, undefined_section,
- (valueT)0, & zero_address_frag);
+ (valueT) 0, &zero_address_frag);
}
-
+
return GOT_symbol;
}
#endif
-
+
return 0;
}
-/* arm_reg_parse () := if it looks like a register, return its token and
- advance the pointer. */
+/* arm_reg_parse () := if it looks like a register, return its token and
+ advance the pointer. */
static int
arm_reg_parse (ccp)
- register char ** ccp;
+ register char **ccp;
{
- char * start = * ccp;
- char c;
- char * p;
- struct reg_entry * reg;
+ char *start = *ccp;
+ char c;
+ char *p;
+ struct reg_entry *reg;
#ifdef REGISTER_PREFIX
if (*start != REGISTER_PREFIX)
*--p = 0;
reg = (struct reg_entry *) hash_find (arm_reg_hsh, start);
*p = c;
-
+
if (reg)
{
*ccp = p;
int
md_apply_fix3 (fixP, val, seg)
- fixS * fixP;
- valueT * val;
- segT seg;
-{
- offsetT value = * val;
- offsetT newval;
- unsigned int newimm;
- unsigned long temp;
- int sign;
- char * buf = fixP->fx_where + fixP->fx_frag->fr_literal;
- arm_fix_data * arm_data = (arm_fix_data *) fixP->tc_fix_data;
+ fixS *fixP;
+ valueT *val;
+ segT seg;
+{
+ offsetT value = *val;
+ offsetT newval;
+ unsigned int newimm;
+ unsigned long temp;
+ int sign;
+ char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+ arm_fix_data *arm_data = (arm_fix_data *) fixP->tc_fix_data;
assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
/* Note whether this will delete the relocation. */
-#if 0 /* patch from REarnshaw to JDavis (disabled for the moment, since it doesn't work fully) */
+#if 0
+ /* Patch from REarnshaw to JDavis (disabled for the moment, since it
+ doesn't work fully.) */
if ((fixP->fx_addsy == 0 || symbol_constant_p (fixP->fx_addsy))
&& !fixP->fx_pcrel)
#else
{
if (target_oabi
&& (fixP->fx_r_type == BFD_RELOC_ARM_PCREL_BRANCH
- || fixP->fx_r_type == BFD_RELOC_ARM_PCREL_BLX
- ))
+ || fixP->fx_r_type == BFD_RELOC_ARM_PCREL_BLX
+ ))
value = 0;
else
value += md_pcrel_from (fixP);
}
}
- fixP->fx_addnumber = value; /* Remember value for emit_reloc. */
+ /* Remember value for emit_reloc. */
+ fixP->fx_addnumber = value;
switch (fixP->fx_r_type)
{
case BFD_RELOC_ARM_ADRL_IMMEDIATE:
{
unsigned int highpart = 0;
- unsigned int newinsn = 0xe1a00000; /* nop */
+ unsigned int newinsn = 0xe1a00000; /* nop. */
newimm = validate_immediate (value);
temp = md_chars_to_number (buf, INSN_SIZE);
/* If the instruction will fail, see if we can fix things up by
changing the opcode. */
if (newimm == (unsigned int) FAIL
- && (newimm = negate_data_op (& temp, value)) == (unsigned int) FAIL)
+ && (newimm = negate_data_op (&temp, value)) == (unsigned int) FAIL)
{
- /* No ? OK - try using two ADD instructions to generate the value. */
- newimm = validate_immediate_twopart (value, & highpart);
+ /* No ? OK - try using two ADD instructions to generate
+ the value. */
+ newimm = validate_immediate_twopart (value, &highpart);
- /* Yes - then make sure that the second instruction is also an add. */
+ /* Yes - then make sure that the second instruction is
+ also an add. */
if (newimm != (unsigned int) FAIL)
newinsn = temp;
/* Still No ? Try using a negated value. */
- else if (validate_immediate_twopart (- value, & highpart) != (unsigned int) FAIL)
- temp = newinsn = (temp & OPCODE_MASK) | OPCODE_SUB << DATA_OP_SHIFT;
+ else if (validate_immediate_twopart (- value, &highpart) != (unsigned int) FAIL)
+ temp = newinsn = (temp & OPCODE_MASK) | OPCODE_SUB << DATA_OP_SHIFT;
/* Otherwise - give up. */
else
{
as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Unable to compute ADRL instructions for PC offset of 0x%x"), value);
+ _("Unable to compute ADRL instructions for PC offset of 0x%x"),
+ value);
break;
}
- /* Replace the first operand in the 2nd instruction (which is the PC)
- with the destination register. We have already added in the PC in the
- first instruction and we do not want to do it again. */
- newinsn &= ~ 0xf0000;
+ /* Replace the first operand in the 2nd instruction (which
+ is the PC) with the destination register. We have
+ already added in the PC in the first instruction and we
+ do not want to do it again. */
+ newinsn &= ~0xf0000;
newinsn |= ((newinsn & 0x0f000) << 4);
}
case BFD_RELOC_ARM_OFFSET_IMM:
sign = value >= 0;
-
+
if (value < 0)
- value = - value;
-
+ value = -value;
+
if (validate_offset_imm (value, 0) == FAIL)
- {
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("bad immediate value for offset (%ld)"), (long) value);
- break;
- }
+ {
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("bad immediate value for offset (%ld)"),
+ (long) value);
+ break;
+ }
newval = md_chars_to_number (buf, INSN_SIZE);
newval &= 0xff7ff000;
md_number_to_chars (buf, newval, INSN_SIZE);
break;
- case BFD_RELOC_ARM_OFFSET_IMM8:
- case BFD_RELOC_ARM_HWLITERAL:
+ case BFD_RELOC_ARM_OFFSET_IMM8:
+ case BFD_RELOC_ARM_HWLITERAL:
sign = value >= 0;
-
+
if (value < 0)
- value = - value;
+ value = -value;
if (validate_offset_imm (value, 1) == FAIL)
- {
- if (fixP->fx_r_type == BFD_RELOC_ARM_HWLITERAL)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("invalid literal constant: pool needs to be closer"));
- else
- as_bad (_("bad immediate value for half-word offset (%ld)"),
+ {
+ if (fixP->fx_r_type == BFD_RELOC_ARM_HWLITERAL)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("invalid literal constant: pool needs to be closer"));
+ else
+ as_bad (_("bad immediate value for half-word offset (%ld)"),
(long) value);
- break;
- }
+ break;
+ }
newval = md_chars_to_number (buf, INSN_SIZE);
newval &= 0xff7ff0f0;
case BFD_RELOC_ARM_LITERAL:
sign = value >= 0;
-
+
if (value < 0)
- value = - value;
+ value = -value;
if (validate_offset_imm (value, 0) == FAIL)
{
- as_bad_where (fixP->fx_file, fixP->fx_line,
+ as_bad_where (fixP->fx_file, fixP->fx_line,
_("invalid literal constant: pool needs to be closer"));
break;
}
case BFD_RELOC_ARM_SHIFT_IMM:
newval = md_chars_to_number (buf, INSN_SIZE);
if (((unsigned long) value) > 32
- || (value == 32
+ || (value == 32
&& (((newval & 0x60) == 0) || (newval & 0x60) == 0x60)))
{
as_bad_where (fixP->fx_file, fixP->fx_line,
}
if (value == 0)
- newval &= ~0x60; /* Shifts of zero must be done as lsl */
+ /* Shifts of zero must be done as lsl. */
+ newval &= ~0x60;
else if (value == 32)
value = 0;
newval &= 0xfffff07f;
newval |= (value & 0x1f) << 7;
- md_number_to_chars (buf, newval , INSN_SIZE);
+ md_number_to_chars (buf, newval, INSN_SIZE);
break;
case BFD_RELOC_ARM_SWI:
else
{
if (((unsigned long) value) > 0x00ffffff)
- as_bad_where (fixP->fx_file, fixP->fx_line,
+ as_bad_where (fixP->fx_file, fixP->fx_line,
_("Invalid swi expression"));
newval = md_chars_to_number (buf, INSN_SIZE) & 0xff000000;
newval |= value;
- md_number_to_chars (buf, newval , INSN_SIZE);
+ md_number_to_chars (buf, newval, INSN_SIZE);
}
break;
newval = md_chars_to_number (buf, INSN_SIZE);
/* Sign-extend a 24-bit number. */
-#define SEXT24(x) ((((x) & 0xffffff) ^ (~ 0x7fffff)) + 0x800000)
+#define SEXT24(x) ((((x) & 0xffffff) ^ (~0x7fffff)) + 0x800000)
#ifdef OBJ_ELF
if (! target_oabi)
instruction, in a 24 bit, signed field. Thus we need to check
that none of the top 8 bits of the shifted value (top 7 bits of
the unshifted, unsigned value) are set, or that they are all set. */
- if ((value & ~ ((offsetT) 0x1ffffff)) != 0
- && ((value & ~ ((offsetT) 0x1ffffff)) != ~ ((offsetT) 0x1ffffff)))
+ if ((value & ~((offsetT) 0x1ffffff)) != 0
+ && ((value & ~((offsetT) 0x1ffffff)) != ~((offsetT) 0x1ffffff)))
{
#ifdef OBJ_ELF
/* Normally we would be stuck at this point, since we cannot store
that the destination of the branch is in the same section as the
branch instruciton itself, then we can compute the relocation for
ourselves and not have to bother the linker with it.
-
+
FIXME: The tests for OBJ_ELF and ! target_oabi are only here
because I have not worked out how to do this for OBJ_COFF or
target_oabi. */
&& S_GET_SEGMENT (fixP->fx_addsy) == seg)
{
/* Get pc relative value to go into the branch. */
- value = * val;
+ value = *val;
- /* Permit a backward branch provided that enough bits are set.
- Allow a forwards branch, provided that enough bits are clear. */
- if ((value & ~ ((offsetT) 0x1ffffff)) == ~ ((offsetT) 0x1ffffff)
- || (value & ~ ((offsetT) 0x1ffffff)) == 0)
+ /* Permit a backward branch provided that enough bits
+ are set. Allow a forwards branch, provided that
+ enough bits are clear. */
+ if ((value & ~((offsetT) 0x1ffffff)) == ~((offsetT) 0x1ffffff)
+ || (value & ~((offsetT) 0x1ffffff)) == 0)
fixP->fx_done = 1;
}
-
+
if (! fixP->fx_done)
#endif
as_bad_where (fixP->fx_file, fixP->fx_line,
value >>= 2;
value += SEXT24 (newval);
-
- if ((value & ~ ((offsetT) 0xffffff)) != 0
- && ((value & ~ ((offsetT) 0xffffff)) != ~ ((offsetT) 0xffffff)))
+
+ if ((value & ~((offsetT) 0xffffff)) != 0
+ && ((value & ~((offsetT) 0xffffff)) != ~((offsetT) 0xffffff)))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("out of range branch"));
-
+
newval = (value & 0x00ffffff) | (newval & 0xff000000);
md_number_to_chars (buf, newval, INSN_SIZE);
break;
case BFD_RELOC_ARM_PCREL_BLX:
{
offsetT hbit;
- newval = md_chars_to_number (buf, INSN_SIZE);
+ newval = md_chars_to_number (buf, INSN_SIZE);
#ifdef OBJ_ELF
- if (! target_oabi)
- value = fixP->fx_offset;
+ if (! target_oabi)
+ value = fixP->fx_offset;
#endif
hbit = (value >> 1) & 1;
- value = (value >> 2) & 0x00ffffff;
- value = (value + (newval & 0x00ffffff)) & 0x00ffffff;
- newval = value | (newval & 0xfe000000) | (hbit << 24);
- md_number_to_chars (buf, newval, INSN_SIZE);
+ value = (value >> 2) & 0x00ffffff;
+ value = (value + (newval & 0x00ffffff)) & 0x00ffffff;
+ newval = value | (newval & 0xfe000000) | (hbit << 24);
+ md_number_to_chars (buf, newval, INSN_SIZE);
}
break;
- case BFD_RELOC_THUMB_PCREL_BRANCH9: /* conditional branch */
+ case BFD_RELOC_THUMB_PCREL_BRANCH9: /* Conditional branch. */
newval = md_chars_to_number (buf, THUMB_SIZE);
{
- addressT diff = (newval & 0xff) << 1;
- if (diff & 0x100)
- diff |= ~0xff;
-
- value += diff;
- if ((value & ~0xff) && ((value & ~0xff) != ~0xff))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Branch out of range"));
- newval = (newval & 0xff00) | ((value & 0x1ff) >> 1);
+ addressT diff = (newval & 0xff) << 1;
+ if (diff & 0x100)
+ diff |= ~0xff;
+
+ value += diff;
+ if ((value & ~0xff) && ((value & ~0xff) != ~0xff))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Branch out of range"));
+ newval = (newval & 0xff00) | ((value & 0x1ff) >> 1);
}
md_number_to_chars (buf, newval, THUMB_SIZE);
break;
- case BFD_RELOC_THUMB_PCREL_BRANCH12: /* unconditional branch */
+ case BFD_RELOC_THUMB_PCREL_BRANCH12: /* Unconditional branch. */
newval = md_chars_to_number (buf, THUMB_SIZE);
{
- addressT diff = (newval & 0x7ff) << 1;
- if (diff & 0x800)
- diff |= ~0x7ff;
-
- value += diff;
- if ((value & ~0x7ff) && ((value & ~0x7ff) != ~0x7ff))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Branch out of range"));
- newval = (newval & 0xf800) | ((value & 0xfff) >> 1);
+ addressT diff = (newval & 0x7ff) << 1;
+ if (diff & 0x800)
+ diff |= ~0x7ff;
+
+ value += diff;
+ if ((value & ~0x7ff) && ((value & ~0x7ff) != ~0x7ff))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Branch out of range"));
+ newval = (newval & 0xf800) | ((value & 0xfff) >> 1);
}
md_number_to_chars (buf, newval, THUMB_SIZE);
break;
case BFD_RELOC_THUMB_PCREL_BLX:
case BFD_RELOC_THUMB_PCREL_BRANCH23:
{
- offsetT newval2;
- addressT diff;
+ offsetT newval2;
+ addressT diff;
newval = md_chars_to_number (buf, THUMB_SIZE);
- newval2 = md_chars_to_number (buf + THUMB_SIZE, THUMB_SIZE);
- diff = ((newval & 0x7ff) << 12) | ((newval2 & 0x7ff) << 1);
- if (diff & 0x400000)
+ newval2 = md_chars_to_number (buf + THUMB_SIZE, THUMB_SIZE);
+ diff = ((newval & 0x7ff) << 12) | ((newval2 & 0x7ff) << 1);
+ if (diff & 0x400000)
diff |= ~0x3fffff;
#ifdef OBJ_ELF
value = fixP->fx_offset;
#endif
- value += diff;
- if ((value & ~0x3fffff) && ((value & ~0x3fffff) != ~0x3fffff))
+ value += diff;
+ if ((value & ~0x3fffff) && ((value & ~0x3fffff) != ~0x3fffff))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Branch with link out of range"));
- newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12);
- newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1);
- md_number_to_chars (buf, newval, THUMB_SIZE);
- md_number_to_chars (buf + THUMB_SIZE, newval2, THUMB_SIZE);
+ newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12);
+ newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1);
+ md_number_to_chars (buf, newval, THUMB_SIZE);
+ md_number_to_chars (buf + THUMB_SIZE, newval2, THUMB_SIZE);
}
break;
md_number_to_chars (buf, value, 1);
#ifdef OBJ_ELF
else if (!target_oabi)
- {
- value = fixP->fx_offset;
- md_number_to_chars (buf, value, 1);
- }
+ {
+ value = fixP->fx_offset;
+ md_number_to_chars (buf, value, 1);
+ }
#endif
break;
md_number_to_chars (buf, value, 2);
#ifdef OBJ_ELF
else if (!target_oabi)
- {
- value = fixP->fx_offset;
- md_number_to_chars (buf, value, 2);
- }
+ {
+ value = fixP->fx_offset;
+ md_number_to_chars (buf, value, 2);
+ }
#endif
break;
#ifdef OBJ_ELF
case BFD_RELOC_ARM_GOT32:
case BFD_RELOC_ARM_GOTOFF:
- md_number_to_chars (buf, 0, 4);
- break;
+ md_number_to_chars (buf, 0, 4);
+ break;
#endif
case BFD_RELOC_RVA:
md_number_to_chars (buf, value, 4);
#ifdef OBJ_ELF
else if (!target_oabi)
- {
- value = fixP->fx_offset;
- md_number_to_chars (buf, value, 4);
- }
+ {
+ value = fixP->fx_offset;
+ md_number_to_chars (buf, value, 4);
+ }
#endif
break;
#ifdef OBJ_ELF
case BFD_RELOC_ARM_PLT32:
- /* It appears the instruction is fully prepared at this point. */
+ /* It appears the instruction is fully prepared at this point. */
break;
#endif
case BFD_RELOC_ARM_GOTPC:
md_number_to_chars (buf, value, 4);
break;
-
+
case BFD_RELOC_ARM_CP_OFF_IMM:
sign = value >= 0;
if (value < -1023 || value > 1023 || (value & 3))
if (value < 0)
value = -value;
newval = md_chars_to_number (buf, INSN_SIZE) & 0xff7fff00;
- newval |= (value >> 2) | (sign ? INDEX_UP : 0);
- md_number_to_chars (buf, newval , INSN_SIZE);
+ newval |= (value >> 2) | (sign ? INDEX_UP : 0);
+ md_number_to_chars (buf, newval, INSN_SIZE);
break;
case BFD_RELOC_ARM_THUMB_OFFSET:
newval = md_chars_to_number (buf, THUMB_SIZE);
- /* Exactly what ranges, and where the offset is inserted depends on
- the type of instruction, we can establish this from the top 4 bits */
+ /* Exactly what ranges, and where the offset is inserted depends
+ on the type of instruction, we can establish this from the
+ top 4 bits. */
switch (newval >> 12)
{
- case 4: /* PC load */
+ case 4: /* PC load. */
/* Thumb PC loads are somewhat odd, bit 1 of the PC is
forced to zero for these loads, so we will need to round
up the offset if the instruction address is not word
if ((fixP->fx_frag->fr_address + fixP->fx_where + value) & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Invalid offset, target not word aligned (0x%08X)"),
- (unsigned int)(fixP->fx_frag->fr_address + fixP->fx_where + value));
+ (unsigned int) (fixP->fx_frag->fr_address
+ + fixP->fx_where + value));
if ((value + 2) & ~0x3fe)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Invalid offset, value too big (0x%08X)"), value);
- /* Round up, since pc will be rounded down. */
+ /* Round up, since pc will be rounded down. */
newval |= (value + 2) >> 2;
break;
- case 9: /* SP load/store */
+ case 9: /* SP load/store. */
if (value & ~0x3fc)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Invalid offset, value too big (0x%08X)"), value);
newval |= value >> 2;
break;
- case 6: /* Word load/store */
+ case 6: /* Word load/store. */
if (value & ~0x7c)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Invalid offset, value too big (0x%08X)"), value);
- newval |= value << 4; /* 6 - 2 */
+ newval |= value << 4; /* 6 - 2. */
break;
- case 7: /* Byte load/store */
+ case 7: /* Byte load/store. */
if (value & ~0x1f)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Invalid offset, value too big (0x%08X)"), value);
newval |= value << 6;
break;
- case 8: /* Halfword load/store */
+ case 8: /* Halfword load/store. */
if (value & ~0x3e)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Invalid offset, value too big (0x%08X)"), value);
- newval |= value << 5; /* 6 - 1 */
+ newval |= value << 5; /* 6 - 1. */
break;
default:
case BFD_RELOC_ARM_THUMB_ADD:
/* This is a complicated relocation, since we use it for all of
the following immediate relocations:
- 3bit ADD/SUB
- 8bit ADD/SUB
- 9bit ADD/SUB SP word-aligned
- 10bit ADD PC/SP word-aligned
+
+ 3bit ADD/SUB
+ 8bit ADD/SUB
+ 9bit ADD/SUB SP word-aligned
+ 10bit ADD PC/SP word-aligned
The type of instruction being processed is encoded in the
instruction field:
- 0x8000 SUB
- 0x00F0 Rd
- 0x000F Rs
+
+ 0x8000 SUB
+ 0x00F0 Rd
+ 0x000F Rs
*/
newval = md_chars_to_number (buf, THUMB_SIZE);
{
- int rd = (newval >> 4) & 0xf;
- int rs = newval & 0xf;
- int subtract = newval & 0x8000;
-
- if (rd == REG_SP)
- {
- if (value & ~0x1fc)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Invalid immediate for stack address calculation"));
- newval = subtract ? T_OPCODE_SUB_ST : T_OPCODE_ADD_ST;
- newval |= value >> 2;
- }
- else if (rs == REG_PC || rs == REG_SP)
- {
- if (subtract ||
- value & ~0x3fc)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Invalid immediate for address calculation (value = 0x%08lX)"),
+ int rd = (newval >> 4) & 0xf;
+ int rs = newval & 0xf;
+ int subtract = newval & 0x8000;
+
+ if (rd == REG_SP)
+ {
+ if (value & ~0x1fc)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Invalid immediate for stack address calculation"));
+ newval = subtract ? T_OPCODE_SUB_ST : T_OPCODE_ADD_ST;
+ newval |= value >> 2;
+ }
+ else if (rs == REG_PC || rs == REG_SP)
+ {
+ if (subtract ||
+ value & ~0x3fc)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Invalid immediate for address calculation (value = 0x%08lX)"),
(unsigned long) value);
- newval = (rs == REG_PC ? T_OPCODE_ADD_PC : T_OPCODE_ADD_SP);
- newval |= rd << 8;
- newval |= value >> 2;
- }
- else if (rs == rd)
- {
- if (value & ~0xff)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Invalid 8bit immediate"));
- newval = subtract ? T_OPCODE_SUB_I8 : T_OPCODE_ADD_I8;
- newval |= (rd << 8) | value;
- }
- else
- {
- if (value & ~0x7)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Invalid 3bit immediate"));
- newval = subtract ? T_OPCODE_SUB_I3 : T_OPCODE_ADD_I3;
- newval |= rd | (rs << 3) | (value << 6);
- }
+ newval = (rs == REG_PC ? T_OPCODE_ADD_PC : T_OPCODE_ADD_SP);
+ newval |= rd << 8;
+ newval |= value >> 2;
+ }
+ else if (rs == rd)
+ {
+ if (value & ~0xff)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Invalid 8bit immediate"));
+ newval = subtract ? T_OPCODE_SUB_I8 : T_OPCODE_ADD_I8;
+ newval |= (rd << 8) | value;
+ }
+ else
+ {
+ if (value & ~0x7)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Invalid 3bit immediate"));
+ newval = subtract ? T_OPCODE_SUB_I3 : T_OPCODE_ADD_I3;
+ newval |= rd | (rs << 3) | (value << 6);
+ }
}
- md_number_to_chars (buf, newval , THUMB_SIZE);
+ md_number_to_chars (buf, newval, THUMB_SIZE);
break;
case BFD_RELOC_ARM_THUMB_IMM:
newval = md_chars_to_number (buf, THUMB_SIZE);
switch (newval >> 11)
- {
- case 0x04: /* 8bit immediate MOV */
- case 0x05: /* 8bit immediate CMP */
- if (value < 0 || value > 255)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("Invalid immediate: %ld is too large"),
+ {
+ case 0x04: /* 8bit immediate MOV. */
+ case 0x05: /* 8bit immediate CMP. */
+ if (value < 0 || value > 255)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Invalid immediate: %ld is too large"),
(long) value);
- newval |= value;
- break;
+ newval |= value;
+ break;
- default:
- abort ();
- }
- md_number_to_chars (buf, newval , THUMB_SIZE);
+ default:
+ abort ();
+ }
+ md_number_to_chars (buf, newval, THUMB_SIZE);
break;
case BFD_RELOC_ARM_THUMB_SHIFT:
- /* 5bit shift value (0..31) */
+ /* 5bit shift value (0..31). */
if (value < 0 || value > 31)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Illegal Thumb shift value: %ld"), (long) value);
newval = md_chars_to_number (buf, THUMB_SIZE) & 0xf03f;
newval |= value << 6;
- md_number_to_chars (buf, newval , THUMB_SIZE);
+ md_number_to_chars (buf, newval, THUMB_SIZE);
break;
case BFD_RELOC_VTABLE_INHERIT:
/* Translate internal representation of relocation info to BFD target
format. */
+
arelent *
tc_gen_reloc (section, fixp)
- asection * section ATTRIBUTE_UNUSED;
- fixS * fixp;
+ asection *section ATTRIBUTE_UNUSED;
+ fixS *fixp;
{
- arelent * reloc;
+ arelent *reloc;
bfd_reloc_code_real_type code;
reloc = (arelent *) xmalloc (sizeof (arelent));
case BFD_RELOC_ARM_PCREL_BRANCH:
case BFD_RELOC_ARM_PCREL_BLX:
- case BFD_RELOC_RVA:
+ case BFD_RELOC_RVA:
case BFD_RELOC_THUMB_PCREL_BRANCH9:
case BFD_RELOC_THUMB_PCREL_BRANCH12:
case BFD_RELOC_THUMB_PCREL_BRANCH23:
case BFD_RELOC_ARM_LITERAL:
case BFD_RELOC_ARM_HWLITERAL:
/* If this is called then the a literal has been referenced across
- a section boundary - possibly due to an implicit dump */
+ a section boundary - possibly due to an implicit dump. */
as_bad_where (fixp->fx_file, fixp->fx_line,
_("Literal referenced across section boundary (Implicit dump?)"));
return NULL;
case BFD_RELOC_ARM_GOT32:
case BFD_RELOC_ARM_GOTOFF:
case BFD_RELOC_ARM_PLT32:
- code = fixp->fx_r_type;
- break;
+ code = fixp->fx_r_type;
+ break;
#endif
case BFD_RELOC_ARM_IMMEDIATE:
default:
{
- char * type;
+ char *type;
switch (fixp->fx_r_type)
{
case BFD_RELOC_ARM_IMMEDIATE: type = "IMMEDIATE"; break;
}
#ifdef OBJ_ELF
- if (code == BFD_RELOC_32_PCREL
- && GOT_symbol
- && fixp->fx_addsy == GOT_symbol)
- {
- code = BFD_RELOC_ARM_GOTPC;
- reloc->addend = fixp->fx_offset = reloc->address;
- }
+ if (code == BFD_RELOC_32_PCREL
+ && GOT_symbol
+ && fixp->fx_addsy == GOT_symbol)
+ {
+ code = BFD_RELOC_ARM_GOTPC;
+ reloc->addend = fixp->fx_offset = reloc->address;
+ }
#endif
-
+
reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
if (reloc->howto == NULL)
return NULL;
}
- /* HACK: Since arm ELF uses Rel instead of Rela, encode the
- vtable entry to be used in the relocation's section offset. */
- if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
- reloc->address = fixp->fx_offset;
+ /* HACK: Since arm ELF uses Rel instead of Rela, encode the
+ vtable entry to be used in the relocation's section offset. */
+ if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+ reloc->address = fixp->fx_offset;
return reloc;
}
int
md_estimate_size_before_relax (fragP, segtype)
- fragS * fragP ATTRIBUTE_UNUSED;
- segT segtype ATTRIBUTE_UNUSED;
+ fragS *fragP ATTRIBUTE_UNUSED;
+ segT segtype ATTRIBUTE_UNUSED;
{
as_fatal (_("md_estimate_size_before_relax\n"));
return 1;
static void
output_inst PARAMS ((void))
{
- char * to = NULL;
-
+ char *to = NULL;
+
if (inst.error)
{
as_bad (inst.error);
}
to = frag_more (inst.size);
-
+
if (thumb_mode && (inst.size > THUMB_SIZE))
{
assert (inst.size == (2 * THUMB_SIZE));
if (inst.reloc.type != BFD_RELOC_NONE)
fix_new_arm (frag_now, to - frag_now->fr_literal,
- inst.size, & inst.reloc.exp, inst.reloc.pc_rel,
+ inst.size, &inst.reloc.exp, inst.reloc.pc_rel,
inst.reloc.type);
return;
void
md_assemble (str)
- char * str;
+ char *str;
{
- char c;
- char * p;
- char * q;
- char * start;
+ char c;
+ char *p;
+ char *q;
+ char *start;
/* Align the instruction.
- This may not be the right thing to do but ... */
- /* arm_align (2, 0); */
- listing_prev_line (); /* Defined in listing.h */
+ This may not be the right thing to do but... */
+#if 0
+ arm_align (2, 0);
+#endif
+ listing_prev_line (); /* Defined in listing.h. */
/* Align the previous label if needed. */
if (last_label_seen != NULL)
inst.reloc.type = BFD_RELOC_NONE;
skip_whitespace (str);
-
+
/* Scan up to the end of the op-code, which must end in white space or
end of string. */
for (start = p = str; *p != '\0'; p++)
if (*p == ' ')
break;
-
+
if (p == str)
{
as_bad (_("No operator -- statement `%s'\n"), str);
if (thumb_mode)
{
- CONST struct thumb_opcode * opcode;
+ CONST struct thumb_opcode *opcode;
c = *p;
*p = '\0';
opcode = (CONST struct thumb_opcode *) hash_find (arm_tops_hsh, str);
*p = c;
-
+
if (opcode)
{
/* Check that this instruction is supported for this CPU. */
if (thumb_mode == 1 && (opcode->variants & cpu_variant) == 0)
- {
- as_bad (_("selected processor does not support this opcode"));
- return;
- }
+ {
+ as_bad (_("selected processor does not support this opcode"));
+ return;
+ }
inst.instruction = opcode->value;
inst.size = opcode->size;
- (*opcode->parms)(p);
+ (*opcode->parms) (p);
output_inst ();
return;
}
}
else
{
- CONST struct asm_opcode * opcode;
+ CONST struct asm_opcode *opcode;
unsigned long cond_code;
inst.size = INSN_SIZE;
- /* p now points to the end of the opcode, probably white space, but we
+ /* P now points to the end of the opcode, probably white space, but we
have to break the opcode up in case it contains condionals and flags;
keep trying with progressively smaller basic instructions until one
matches, or we run out of opcode. */
opcode = (CONST struct asm_opcode *) hash_find (arm_ops_hsh, str);
*q = c;
-
+
if (opcode && opcode->template)
{
unsigned long flag_bits = 0;
- char * r;
+ char *r;
/* Check that this instruction is supported for this CPU. */
if ((opcode->variants & cpu_variant) == 0)
{
if (opcode->comp_suffix)
{
- if (*opcode->comp_suffix != '\0')
- as_bad (_("Opcode `%s' must have suffix from list: <%s>"),
- str, opcode->comp_suffix);
- else
- /* Not a conditional instruction. */
- (*opcode->parms)(q, 0);
+ if (*opcode->comp_suffix != '\0')
+ as_bad (_("Opcode `%s' must have suffix from list: <%s>"),
+ str, opcode->comp_suffix);
+ else
+ /* Not a conditional instruction. */
+ (*opcode->parms) (q, 0);
}
else
{
- /* A conditional instruction with default condition. */
+ /* A conditional instruction with default condition. */
inst.instruction |= COND_ALWAYS;
- (*opcode->parms)(q, 0);
+ (*opcode->parms) (q, 0);
}
output_inst ();
return;
}
- /* Not just a simple opcode. Check if extra is a conditional. */
+ /* Not just a simple opcode. Check if extra is a
+ conditional. */
r = q;
if (p - r >= 2)
{
if (cond)
{
if (cond->value == 0xf0000000)
- as_tsktsk (
-_("Warning: Use of the 'nv' conditional is deprecated\n"));
+ as_tsktsk (_("Warning: Use of the 'nv' conditional is deprecated\n"));
cond_code = cond->value;
r += 2;
else
cond_code = COND_ALWAYS;
- /* Apply the conditional, or complain it's not allowed. */
+ /* Apply the conditional, or complain it's not allowed. */
if (opcode->comp_suffix && *opcode->comp_suffix == '\0')
{
- /* Instruction isn't conditional */
- if (cond_code != COND_ALWAYS)
- {
- as_bad (_("Opcode `%s' is unconditional\n"), str);
- return;
- }
+ /* Instruction isn't conditional. */
+ if (cond_code != COND_ALWAYS)
+ {
+ as_bad (_("Opcode `%s' is unconditional\n"), str);
+ return;
+ }
}
else
- /* Instruction is conditional: set the condition into it. */
- inst.instruction |= cond_code;
+ /* Instruction is conditional: set the condition into it. */
+ inst.instruction |= cond_code;
-
- /* If there is a compulsory suffix, it should come here, before
- any optional flags. */
+ /* If there is a compulsory suffix, it should come here
+ before any optional flags. */
if (opcode->comp_suffix && *opcode->comp_suffix != '\0')
{
CONST char *s = opcode->comp_suffix;
if (*s == '\0')
{
- as_bad (_("Opcode `%s' must have suffix from <%s>\n"), str,
- opcode->comp_suffix);
+ as_bad (_("Opcode `%s' must have suffix from <%s>\n"),
+ str, opcode->comp_suffix);
return;
}
}
/* It wasn't an instruction, but it might be a register alias of the form
- alias .req reg */
+ alias .req reg. */
q = p;
skip_whitespace (q);
c = *p;
*p = '\0';
-
+
if (*q && !strncmp (q, ".req ", 4))
{
- int reg;
- char * copy_of_str = str;
- char * r;
-
+ int reg;
+ char *copy_of_str = str;
+ char *r;
+
q += 4;
skip_whitespace (q);
for (r = q; *r != '\0'; r++)
if (*r == ' ')
break;
-
+
if (r != q)
{
int regnum;
char d = *r;
*r = '\0';
- regnum = arm_reg_parse (& q);
+ regnum = arm_reg_parse (&q);
*r = d;
- reg = arm_reg_parse (& str);
-
+ reg = arm_reg_parse (&str);
+
if (reg == FAIL)
{
if (regnum != FAIL)
{
if (reg != regnum)
as_warn (_("ignoring redefinition of register alias '%s'"),
- copy_of_str );
-
+ copy_of_str);
+
/* Do not warn about redefinitions to the same alias. */
}
else
}
else
as_warn (_("ignoring incomplete .req pseuso op"));
-
+
*p = c;
return;
}
as_bad (_("bad instruction `%s'"), start);
}
-/*
- * md_parse_option
+/* md_parse_option
* Invocation line includes a switch not recognized by the base assembler.
* See if it's a processor-specific option. These are:
* Cpu variants, the arm part is optional:
* -moabi Old ELF ABI
*/
-CONST char * md_shortopts = "m:k";
+CONST char *md_shortopts = "m:k";
+
struct option md_longopts[] =
{
#ifdef ARM_BI_ENDIAN
#endif
{NULL, no_argument, NULL, 0}
};
+
size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
- int c;
- char * arg;
+ int c;
+ char *arg;
{
- char * str = arg;
+ char *str = arg;
switch (c)
{
break;
#ifdef OBJ_ELF
- case 'o':
- if (streq (str, "oabi"))
- target_oabi = true;
- break;
+ case 'o':
+ if (streq (str, "oabi"))
+ target_oabi = true;
+ break;
#endif
-
- case 't':
- /* Limit assembler to generating only Thumb instructions: */
- if (streq (str, "thumb"))
- {
- cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_THUMB;
- cpu_variant = (cpu_variant & ~FPU_ALL) | FPU_NONE;
- thumb_mode = 1;
- }
- else if (streq (str, "thumb-interwork"))
- {
+
+ case 't':
+ /* Limit assembler to generating only Thumb instructions: */
+ if (streq (str, "thumb"))
+ {
+ cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_THUMB;
+ cpu_variant = (cpu_variant & ~FPU_ALL) | FPU_NONE;
+ thumb_mode = 1;
+ }
+ else if (streq (str, "thumb-interwork"))
+ {
if ((cpu_variant & ARM_THUMB) == 0)
cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_ARCH_V4T;
#if defined OBJ_COFF || defined OBJ_ELF
- support_interwork = true;
+ support_interwork = true;
#endif
- }
- else
+ }
+ else
goto bad;
- break;
+ break;
default:
if (streq (str, "all"))
to us, so we must parse them here. */
str += 5;
-
+
if (streq (str, "32"))
{
uses_apcs_26 = false;
{
/* Reentrant code has been generated. This does affect
linking, since there is no point in linking reentrant/
- position independent code with absolute position code. */
+ position independent code with absolute position code. */
pic_code = true;
return 1;
}
-
+
as_bad (_("Unrecognised APCS switch -m%s"), arg);
return 0;
- }
+ }
#endif
- /* Strip off optional "arm" */
+ /* Strip off optional "arm". */
if (! strncmp (str, "arm", 3))
str += 3;
break;
case '7':
- switch (strtol (str, & str, 10)) /* Eat the processor name */
+ /* Eat the processor name. */
+ switch (strtol (str, &str, 10))
{
case 7:
case 70:
default:
goto bad;
}
- cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7;
- for (; *str; str++)
- {
- switch (* str)
- {
- case 't':
- cpu_variant |= (ARM_THUMB | ARM_ARCH_V4);
- break;
-
- case 'm':
- cpu_variant |= ARM_LONGMUL;
- break;
-
- case 'f': /* fe => fp enabled cpu. */
- if (str[1] == 'e')
- ++ str;
- else
+ cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7;
+ for (; *str; str++)
+ {
+ switch (*str)
+ {
+ case 't':
+ cpu_variant |= (ARM_THUMB | ARM_ARCH_V4);
+ break;
+
+ case 'm':
+ cpu_variant |= ARM_LONGMUL;
+ break;
+
+ case 'f': /* fe => fp enabled cpu. */
+ if (str[1] == 'e')
+ ++ str;
+ else
+ goto bad;
+
+ case 'c': /* Left over from 710c processor name. */
+ case 'd': /* Debug. */
+ case 'i': /* Embedded ICE. */
+ /* Included for completeness in ARM processor naming. */
+ break;
+
+ default:
goto bad;
-
- case 'c': /* Left over from 710c processor name. */
- case 'd': /* Debug */
- case 'i': /* Embedded ICE */
- /* Included for completeness in ARM processor naming. */
- break;
-
- default:
- goto bad;
- }
- }
+ }
+ }
break;
case '8':
else
goto bad;
break;
-
+
case '9':
if (streq (str, "9"))
cpu_variant = (cpu_variant & ~ARM_ANY)
goto bad;
break;
-
case 's':
if (streq (str, "strongarm")
|| streq (str, "strongarm110")
else
goto bad;
break;
-
+
case 'v':
- /* Select variant based on architecture rather than processor. */
+ /* Select variant based on architecture rather than
+ processor. */
switch (*++str)
{
case '2':
break;
}
break;
-
+
case '3':
- cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7;
-
+ cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7;
+
switch (*++str)
{
case 'm': cpu_variant |= ARM_LONGMUL; break;
break;
}
break;
-
+
case '4':
cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_ARCH_V4;
-
+
switch (*++str)
{
case 't': cpu_variant |= ARM_THUMB; break;
break;
}
break;
-
+
default:
as_bad (_("Invalid architecture variant -m%s"), arg);
break;
}
break;
-
+
default:
bad:
as_bad (_("Invalid processor variant -m%s"), arg);
pic_code = 1;
break;
#endif
-
+
default:
return 0;
}
- return 1;
+ return 1;
}
void
md_show_usage (fp)
- FILE * fp;
+ FILE *fp;
{
fprintf (fp, _("\
ARM Specific Assembler Options:\n\
-mapcs-32, -mapcs-26 specify which ARM Procedure Calling Standard to use\n\
-mapcs-float floating point args are passed in FP regs\n\
-mapcs-reentrant the code is position independent/reentrant\n"));
- #endif
+#endif
#ifdef OBJ_ELF
fprintf (fp, _("\
-moabi support the old ELF ABI\n"));
static void
fix_new_arm (frag, where, size, exp, pc_rel, reloc)
- fragS * frag;
- int where;
- short int size;
- expressionS * exp;
- int pc_rel;
- int reloc;
+ fragS *frag;
+ int where;
+ short int size;
+ expressionS *exp;
+ int pc_rel;
+ int reloc;
{
- fixS * new_fix;
- arm_fix_data * arm_data;
+ fixS *new_fix;
+ arm_fix_data *arm_data;
switch (exp->X_op)
{
break;
}
- /* Mark whether the fix is to a THUMB instruction, or an ARM instruction */
- arm_data = (arm_fix_data *) obstack_alloc (& notes, sizeof (arm_fix_data));
+ /* Mark whether the fix is to a THUMB instruction, or an ARM
+ instruction. */
+ arm_data = (arm_fix_data *) obstack_alloc (¬es, sizeof (arm_fix_data));
new_fix->tc_fix_data = (PTR) arm_data;
arm_data->thumb_mode = thumb_mode;
return;
}
-
/* This fix_new is called by cons via TC_CONS_FIX_NEW. */
+
void
cons_fix_new_arm (frag, where, size, exp)
- fragS * frag;
- int where;
- int size;
- expressionS * exp;
+ fragS *frag;
+ int where;
+ int size;
+ expressionS *exp;
{
bfd_reloc_code_real_type type;
int pcrel = 0;
/* Pick a reloc.
FIXME: @@ Should look at CPU word size. */
- switch (size)
+ switch (size)
{
case 1:
type = BFD_RELOC_8;
type = BFD_RELOC_64;
break;
}
-
+
fix_new_exp (frag, where, (int) size, exp, pcrel, type);
}
/* A good place to do this, although this was probably not intended
for this kind of use. We need to dump the literal pool before
references are made to a null symbol pointer. */
+
void
arm_cleanup ()
{
if (current_poolP == NULL)
return;
-
- subseg_set (text_section, 0); /* Put it at the end of text section. */
+
+ /* Put it at the end of text section. */
+ subseg_set (text_section, 0);
s_ltorg (0);
listing_prev_line ();
}
void
arm_frob_label (sym)
- symbolS * sym;
+ symbolS *sym;
{
last_label_seen = sym;
-
+
ARM_SET_THUMB (sym, thumb_mode);
-
+
#if defined OBJ_COFF || defined OBJ_ELF
ARM_SET_INTERWORK (sym, support_interwork);
#endif
-
+
if (label_is_thumb_function_name)
{
/* When the address of a Thumb function is taken the bottom
correctly. */
THUMB_SET_FUNC (sym, 1);
-
+
label_is_thumb_function_name = false;
}
}
arm_adjust_symtab ()
{
#ifdef OBJ_COFF
- symbolS * sym;
+ symbolS *sym;
for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
{
if (ARM_IS_THUMB (sym))
- {
+ {
if (THUMB_IS_FUNC (sym))
{
/* Mark the symbol as a Thumb function. */
- if ( S_GET_STORAGE_CLASS (sym) == C_STAT
- || S_GET_STORAGE_CLASS (sym) == C_LABEL) /* This can happen! */
+ if (S_GET_STORAGE_CLASS (sym) == C_STAT
+ /* This can happen! */
+ || S_GET_STORAGE_CLASS (sym) == C_LABEL)
S_SET_STORAGE_CLASS (sym, C_THUMBSTATFUNC);
else if (S_GET_STORAGE_CLASS (sym) == C_EXT)
as_bad (_("%s: unexpected function type: %d"),
S_GET_NAME (sym), S_GET_STORAGE_CLASS (sym));
}
- else switch (S_GET_STORAGE_CLASS (sym))
- {
- case C_EXT:
- S_SET_STORAGE_CLASS (sym, C_THUMBEXT);
- break;
- case C_STAT:
- S_SET_STORAGE_CLASS (sym, C_THUMBSTAT);
- break;
- case C_LABEL:
- S_SET_STORAGE_CLASS (sym, C_THUMBLABEL);
- break;
- default: /* do nothing */
- break;
- }
- }
+ else
+ switch (S_GET_STORAGE_CLASS (sym))
+ {
+ case C_EXT:
+ S_SET_STORAGE_CLASS (sym, C_THUMBEXT);
+ break;
+ case C_STAT:
+ S_SET_STORAGE_CLASS (sym, C_THUMBSTAT);
+ break;
+ case C_LABEL:
+ S_SET_STORAGE_CLASS (sym, C_THUMBLABEL);
+ break;
+ default:
+ /* Do nothing. */
+ break;
+ }
+ }
if (ARM_IS_INTERWORK (sym))
coffsymbol (symbol_get_bfdsym (sym))->native->u.syment.n_flags = 0xFF;
}
#endif
#ifdef OBJ_ELF
- symbolS * sym;
- char bind;
+ symbolS *sym;
+ char bind;
for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
{
if (ARM_IS_THUMB (sym))
- {
- elf_symbol_type * elf_sym;
-
+ {
+ elf_symbol_type *elf_sym;
+
elf_sym = elf_symbol (symbol_get_bfdsym (sym));
bind = ELF_ST_BIND (elf_sym);
-
+
/* If it's a .thumb_func, declare it as so,
otherwise tag label as .code 16. */
if (THUMB_IS_FUNC (sym))
else
elf_sym->internal_elf_sym.st_info =
ELF_ST_INFO (bind, STT_ARM_16BIT);
- }
- }
+ }
+ }
#endif
}
*input_line_pointer = 0;
return 1;
}
-
+
return 0;
}
char *
arm_canonicalize_symbol_name (name)
- char * name;
+ char *name;
{
int len;
boolean
arm_validate_fix (fixP)
- fixS * fixP;
+ fixS *fixP;
{
/* If the destination of the branch is a defined symbol which does not have
the THUMB_FUNC attribute, then we must be calling a function which has
the (interfacearm) attribute. We look for the Thumb entry point to that
function and change the branch to refer to that function instead. */
- if ( fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BRANCH23
+ if (fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BRANCH23
&& fixP->fx_addsy != NULL
&& S_IS_DEFINED (fixP->fx_addsy)
&& ! THUMB_IS_FUNC (fixP->fx_addsy))
than a function) and then later jumping to that address. Such
addresses also ought to have their bottom bit set (assuming that
they reside in Thumb code), but at the moment they will not. */
-
+
boolean
arm_fix_adjustable (fixP)
- fixS * fixP;
+ fixS *fixP;
{
if (fixP->fx_addsy == NULL)
return 1;
-
- /* Prevent all adjustments to global symbols. */
+
+ /* Prevent all adjustments to global symbols. */
if (S_IS_EXTERN (fixP->fx_addsy))
return 0;
-
+
if (S_IS_WEAK (fixP->fx_addsy))
return 0;
if (THUMB_IS_FUNC (fixP->fx_addsy)
&& fixP->fx_subsy == NULL)
return 0;
-
- /* We need the symbol name for the VTABLE entries */
- if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+
+ /* We need the symbol name for the VTABLE entries. */
+ if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 0;
elf32_arm_target_format ()
{
if (target_big_endian)
- if (target_oabi)
- return "elf32-bigarm-oabi";
- else
- return "elf32-bigarm";
+ {
+ if (target_oabi)
+ return "elf32-bigarm-oabi";
+ else
+ return "elf32-bigarm";
+ }
else
- if (target_oabi)
- return "elf32-littlearm-oabi";
- else
- return "elf32-littlearm";
+ {
+ if (target_oabi)
+ return "elf32-littlearm-oabi";
+ else
+ return "elf32-littlearm";
+ }
}
void
armelf_frob_symbol (symp, puntp)
- symbolS * symp;
- int * puntp;
+ symbolS *symp;
+ int *puntp;
{
elf_frob_symbol (symp, puntp);
-}
+}
int
arm_force_relocation (fixp)
- struct fix * fixp;
+ struct fix *fixp;
{
- if ( fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
|| fixp->fx_r_type == BFD_RELOC_ARM_PCREL_BRANCH
|| fixp->fx_r_type == BFD_RELOC_ARM_PCREL_BLX
|| fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX
- || fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BRANCH23)
+ || fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BRANCH23)
return 1;
-
+
return 0;
}
static bfd_reloc_code_real_type
arm_parse_reloc ()
{
- char id[16];
- char * ip;
+ char id[16];
+ char *ip;
unsigned int i;
static struct
{
- char * str;
- int len;
+ char *str;
+ int len;
bfd_reloc_code_real_type reloc;
}
reloc_map[] =
#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
MAP ("(got)", BFD_RELOC_ARM_GOT32),
MAP ("(gotoff)", BFD_RELOC_ARM_GOTOFF),
- /* ScottB: Jan 30, 1998 */
- /* Added support for parsing "var(PLT)" branch instructions */
- /* generated by GCC for PLT relocs */
+ /* ScottB: Jan 30, 1998 - Added support for parsing "var(PLT)"
+ branch instructions generated by GCC for PLT relocs. */
MAP ("(plt)", BFD_RELOC_ARM_PLT32),
{ NULL, 0, BFD_RELOC_UNUSED }
-#undef MAP
+#undef MAP
};
for (i = 0, ip = input_line_pointer;
i < sizeof (id) && (isalnum (*ip) || ispunct (*ip));
i++, ip++)
id[i] = tolower (*ip);
-
+
for (i = 0; reloc_map[i].str; i++)
if (strncmp (id, reloc_map[i].str, reloc_map[i].len) == 0)
break;
-
+
input_line_pointer += reloc_map[i].len;
-
+
return reloc_map[i].reloc;
}
do
{
bfd_reloc_code_real_type reloc;
-
- expression (& exp);
+
+ expression (&exp);
if (exp.X_op == O_symbol
- && * input_line_pointer == '('
- && (reloc = arm_parse_reloc()) != BFD_RELOC_UNUSED)
- {
- reloc_howto_type * howto = bfd_reloc_type_lookup (stdoutput, reloc);
- int size = bfd_get_reloc_size (howto);
-
- if (size > nbytes)
- as_bad ("%s relocations do not fit in %d bytes",
+ && *input_line_pointer == '('
+ && (reloc = arm_parse_reloc ()) != BFD_RELOC_UNUSED)
+ {
+ reloc_howto_type *howto = bfd_reloc_type_lookup (stdoutput, reloc);
+ int size = bfd_get_reloc_size (howto);
+
+ if (size > nbytes)
+ as_bad ("%s relocations do not fit in %d bytes",
howto->name, nbytes);
- else
- {
- register char * p = frag_more ((int) nbytes);
- int offset = nbytes - size;
-
- fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
- & exp, 0, reloc);
- }
- }
+ else
+ {
+ register char *p = frag_more ((int) nbytes);
+ int offset = nbytes - size;
+
+ fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
+ &exp, 0, reloc);
+ }
+ }
else
- emit_expr (& exp, (unsigned int) nbytes);
+ emit_expr (&exp, (unsigned int) nbytes);
}
while (*input_line_pointer++ == ',');
- input_line_pointer--; /* Put terminator back into stream. */
+ /* Put terminator back into stream. */
+ input_line_pointer--;
demand_empty_rest_of_line ();
}
#include <stdio.h>
#include <ctype.h>
#include "as.h"
-#include "subsegs.h"
+#include "subsegs.h"
#include "opcode/v850.h"
#define AREA_ZDA 0
#define AREA_SDA 1
#define AREA_TDA 2
-/* sign-extend a 16-bit number */
-#define SEXT16(x) ((((x) & 0xffff) ^ (~ 0x7fff)) + 0x8000)
+/* Sign-extend a 16-bit number. */
+#define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
/* Temporarily holds the reloc in a cons expression. */
static bfd_reloc_code_real_type hold_cons_reloc;
static boolean warn_unsigned_overflows = FALSE;
/* Indicates the target BFD machine number. */
-static int machine = -1;
+static int machine = -1;
/* Indicates the target processor(s) for the assemble. */
-static int processor_mask = -1;
-
+static int processor_mask = -1;
\f
/* Structure to hold information about predefined registers. */
struct reg_name
{
- const char * name;
- int value;
+ const char *name;
+ int value;
};
-/* Generic assembler global variables which must be defined by all targets. */
+/* Generic assembler global variables which must be defined by all
+ targets. */
-/* Characters which always start a comment. */
+/* Characters which always start a comment. */
const char comment_chars[] = "#";
/* Characters which start a comment at the beginning of a line. */
const char line_comment_chars[] = ";#";
-/* Characters which may be used to separate multiple commands on a
+/* Characters which may be used to separate multiple commands on a
single line. */
const char line_separator_chars[] = ";";
-/* Characters which are used to indicate an exponent in a floating
+/* Characters which are used to indicate an exponent in a floating
point number. */
const char EXP_CHARS[] = "eE";
-/* Characters which mean that a number is a floating point constant,
+/* Characters which mean that a number is a floating point constant,
as in 0d1.0. */
const char FLT_CHARS[] = "dD";
\f
-
const relax_typeS md_relax_table[] =
{
/* Conditional branches. */
{0x1fffff, -0x200000, 4, 0},
};
-
static segT sdata_section = NULL;
static segT tdata_section = NULL;
static segT zdata_section = NULL;
static segT call_table_data_section = NULL;
static segT call_table_text_section = NULL;
-/* fixups */
+/* Fixups. */
#define MAX_INSN_FIXUPS (5)
struct v850_fixup
{
- expressionS exp;
- int opindex;
+ expressionS exp;
+ int opindex;
bfd_reloc_code_real_type reloc;
};
-struct v850_fixup fixups [MAX_INSN_FIXUPS];
+struct v850_fixup fixups[MAX_INSN_FIXUPS];
static int fc;
-
\f
void
v850_sdata (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (sdata_section, (subsegT) get_absolute_expression ());
demand_empty_rest_of_line ();
void
v850_tdata (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (tdata_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_zdata (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (zdata_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_sbss (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (sbss_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_tbss (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (tbss_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_zbss (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (zbss_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_rosdata (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_rozdata (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_call_table_data (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
void
v850_call_table_text (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
-
+
demand_empty_rest_of_line ();
}
{
register int temp = get_absolute_expression ();
- obj_elf_section_change_hook();
-
+ obj_elf_section_change_hook ();
+
subseg_set (bss_section, (subsegT) temp);
-
+
demand_empty_rest_of_line ();
}
v850_offset (int ignore ATTRIBUTE_UNUSED)
{
int temp = get_absolute_expression ();
-
- temp -= frag_now_fix();
-
+
+ temp -= frag_now_fix ();
+
if (temp > 0)
(void) frag_more (temp);
-
+
demand_empty_rest_of_line ();
}
-/* Copied from obj_elf_common() in gas/config/obj-elf.c */
+/* Copied from obj_elf_common() in gas/config/obj-elf.c. */
+
static void
v850_comm (area)
int area;
{
- char * name;
- char c;
- char * p;
- int temp;
- unsigned int size;
- symbolS * symbolP;
- int have_align;
+ char *name;
+ char c;
+ char *p;
+ int temp;
+ unsigned int size;
+ symbolS *symbolP;
+ int have_align;
name = input_line_pointer;
c = get_symbol_end ();
-
- /* just after name is now '\0' */
+
+ /* Just after name is now '\0'. */
p = input_line_pointer;
*p = c;
-
+
SKIP_WHITESPACE ();
-
+
if (*input_line_pointer != ',')
{
as_bad (_("Expected comma after symbol-name"));
ignore_rest_of_line ();
return;
}
-
- input_line_pointer ++; /* skip ',' */
-
+
+ /* Skip ','. */
+ input_line_pointer++;
+
if ((temp = get_absolute_expression ()) < 0)
{
- /* xgettext:c-format */
+ /* xgettext:c-format */
as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
ignore_rest_of_line ();
return;
}
-
+
size = temp;
*p = 0;
symbolP = symbol_find_or_make (name);
*p = c;
-
+
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
{
as_bad (_("Ignoring attempt to re-define symbol"));
ignore_rest_of_line ();
return;
}
-
+
if (S_GET_VALUE (symbolP) != 0)
{
if (S_GET_VALUE (symbolP) != size)
{
- /* xgettext:c-format */
+ /* xgettext:c-format */
as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
}
}
-
- know (symbol_get_frag (symbolP) == & zero_address_frag);
-
+
+ know (symbol_get_frag (symbolP) == &zero_address_frag);
+
if (*input_line_pointer != ',')
have_align = 0;
else
input_line_pointer++;
SKIP_WHITESPACE ();
}
-
+
if (! have_align || *input_line_pointer != '"')
{
if (! have_align)
else
{
temp = get_absolute_expression ();
-
+
if (temp < 0)
{
temp = 0;
as_warn (_("Common alignment negative; 0 assumed"));
}
}
-
+
if (symbol_get_obj (symbolP)->local)
{
- segT old_sec;
- int old_subsec;
- char * pfrag;
- int align;
- flagword applicable;
+ segT old_sec;
+ int old_subsec;
+ char *pfrag;
+ int align;
+ flagword applicable;
old_sec = now_seg;
old_subsec = now_subseg;
-
+
applicable = bfd_applicable_section_flags (stdoutput);
-
+
applicable &= SEC_ALLOC;
-
+
switch (area)
{
case AREA_SDA:
if (sbss_section == NULL)
{
sbss_section = subseg_new (".sbss", 0);
-
+
bfd_set_section_flags (stdoutput, sbss_section, applicable);
-
+
seg_info (sbss_section)->bss = 1;
}
break;
-
+
case AREA_ZDA:
if (zbss_section == NULL)
{
zbss_section = subseg_new (".zbss", 0);
-
+
bfd_set_section_flags (stdoutput, sbss_section, applicable);
-
+
seg_info (zbss_section)->bss = 1;
}
break;
-
+
case AREA_TDA:
if (tbss_section == NULL)
{
tbss_section = subseg_new (".tbss", 0);
-
+
bfd_set_section_flags (stdoutput, tbss_section, applicable);
-
+
seg_info (tbss_section)->bss = 1;
}
break;
if (temp)
{
- /* convert to a power of 2 alignment */
+ /* Convert to a power of 2 alignment. */
for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
;
-
+
if (temp != 1)
{
as_bad (_("Common alignment not a power of 2"));
}
else
align = 0;
-
+
switch (area)
{
case AREA_SDA:
record_alignment (sbss_section, align);
- obj_elf_section_change_hook();
+ obj_elf_section_change_hook ();
subseg_set (sbss_section, 0);
break;
case AREA_ZDA:
record_alignment (zbss_section, align);
- obj_elf_section_change_hook();
+ obj_elf_section_change_hook ();
subseg_set (zbss_section, 0);
break;
case AREA_TDA:
record_alignment (tbss_section, align);
- obj_elf_section_change_hook();
+ obj_elf_section_change_hook ();
subseg_set (tbss_section, 0);
break;
default:
- abort();
+ abort ();
}
-
+
if (align)
frag_align (align, 0, 0);
default:
abort ();
}
-
+
symbol_set_frag (symbolP, frag_now);
pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
(offsetT) size, (char *) 0);
*pfrag = 0;
S_SET_SIZE (symbolP, size);
-
+
switch (area)
{
case AREA_SDA:
S_SET_SEGMENT (symbolP, sbss_section);
break;
-
+
case AREA_ZDA:
S_SET_SEGMENT (symbolP, zbss_section);
break;
-
+
case AREA_TDA:
S_SET_SEGMENT (symbolP, tbss_section);
break;
-
+
default:
- abort();
+ abort ();
}
-
+
S_CLEAR_EXTERNAL (symbolP);
- obj_elf_section_change_hook();
+ obj_elf_section_change_hook ();
subseg_set (old_sec, old_subsec);
}
else
S_SET_VALUE (symbolP, (valueT) size);
S_SET_ALIGN (symbolP, temp);
S_SET_EXTERNAL (symbolP);
-
+
switch (area)
{
case AREA_SDA:
if (scommon_section == NULL)
{
- flagword applicable;
-
- applicable = bfd_applicable_section_flags (stdoutput);
-
+ flagword applicable =
+ bfd_applicable_section_flags (stdoutput);
+
scommon_section = subseg_new (".scommon", 0);
-
+
bfd_set_section_flags (stdoutput, scommon_section,
(applicable
& (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
}
S_SET_SEGMENT (symbolP, scommon_section);
break;
-
+
case AREA_ZDA:
if (zcommon_section == NULL)
{
- flagword applicable;
-
- applicable = bfd_applicable_section_flags (stdoutput);
-
+ flagword applicable =
+ bfd_applicable_section_flags (stdoutput);
+
zcommon_section = subseg_new (".zcommon", 0);
-
+
bfd_set_section_flags (stdoutput, zcommon_section,
(applicable
& (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
}
S_SET_SEGMENT (symbolP, zcommon_section);
break;
-
+
case AREA_TDA:
if (tcommon_section == NULL)
{
- flagword applicable;
-
- applicable = bfd_applicable_section_flags (stdoutput);
-
+ flagword applicable =
+ bfd_applicable_section_flags (stdoutput);
+
tcommon_section = subseg_new (".tcommon", 0);
-
+
bfd_set_section_flags (stdoutput, tcommon_section,
- (applicable
- & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
- | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
+ ((applicable
+ & (SEC_ALLOC | SEC_LOAD
+ | SEC_RELOC | SEC_DATA
+ | SEC_HAS_CONTENTS))
+ | SEC_IS_COMMON));
}
S_SET_SEGMENT (symbolP, tcommon_section);
break;
-
+
default:
- abort();
+ abort ();
}
}
}
else
{
input_line_pointer++;
+
/* @@ Some use the dot, some don't. Can we get some consistency?? */
if (*input_line_pointer == '.')
input_line_pointer++;
+
/* @@ Some say data, some say bss. */
if (strncmp (input_line_pointer, "bss\"", 4)
&& strncmp (input_line_pointer, "data\"", 5))
switch (machine)
{
- case 0: processor_mask = PROCESSOR_V850; break;
- case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
+ case 0: processor_mask = PROCESSOR_V850; break;
+ case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
}
}
/* Opcode hash table. */
static struct hash_control *v850_hash;
-/* This table is sorted. Suitable for searching by a binary search. */
+/* This table is sorted. Suitable for searching by a binary search. */
static const struct reg_name pre_defined_registers[] =
{
{ "ep", 30 }, /* ep - element ptr */
- { "gp", 4 }, /* gp - global ptr */
- { "hp", 2 }, /* hp - handler stack ptr */
- { "lp", 31 }, /* lp - link ptr */
+ { "gp", 4 }, /* gp - global ptr */
+ { "hp", 2 }, /* hp - handler stack ptr */
+ { "lp", 31 }, /* lp - link ptr */
{ "r0", 0 },
{ "r1", 1 },
{ "r10", 10 },
{ "r7", 7 },
{ "r8", 8 },
{ "r9", 9 },
- { "sp", 3 }, /* sp - stack ptr */
- { "tp", 5 }, /* tp - text ptr */
+ { "sp", 3 }, /* sp - stack ptr */
+ { "tp", 5 }, /* tp - text ptr */
{ "zero", 0 },
};
-#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct reg_name))
+#define REG_NAME_CNT \
+ (sizeof (pre_defined_registers) / sizeof (struct reg_name))
-static const struct reg_name system_registers[] =
+static const struct reg_name system_registers[] =
{
{ "ctbp", 20 },
{ "ctpc", 16 },
{ "fepsw", 3 },
{ "psw", 5 },
};
-#define SYSREG_NAME_CNT (sizeof (system_registers) / sizeof (struct reg_name))
+
+#define SYSREG_NAME_CNT \
+ (sizeof (system_registers) / sizeof (struct reg_name))
static const struct reg_name system_list_registers[] =
{
{"PS", 5 },
{"SR", 0 + 1}
};
-#define SYSREGLIST_NAME_CNT (sizeof (system_list_registers) / sizeof (struct reg_name))
+
+#define SYSREGLIST_NAME_CNT \
+ (sizeof (system_list_registers) / sizeof (struct reg_name))
static const struct reg_name cc_names[] =
{
{ "v", 0x0 },
{ "z", 0x2 },
};
-#define CC_NAME_CNT (sizeof (cc_names) / sizeof (struct reg_name))
-/* reg_name_search does a binary search of the given register table
- to see if "name" is a valid regiter name. Returns the register
- number from the array on success, or -1 on failure. */
+#define CC_NAME_CNT \
+ (sizeof (cc_names) / sizeof (struct reg_name))
+
+/* Do a binary search of the given register table to see if NAME is a
+ valid regiter name. Return the register number from the array on
+ success, or -1 on failure. */
static int
reg_name_search (regs, regcount, name, accept_numbers)
- const struct reg_name * regs;
- int regcount;
- const char * name;
- boolean accept_numbers;
+ const struct reg_name *regs;
+ int regcount;
+ const char *name;
+ boolean accept_numbers;
{
int middle, low, high;
int cmp;
- symbolS * symbolP;
+ symbolS *symbolP;
/* If the register name is a symbol, then evaluate it. */
if ((symbolP = symbol_find (name)) != NULL)
If the symbol is an alias for a number, then return the number. */
if (symbol_equated_p (symbolP))
{
- name = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
+ name
+ = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
}
else if (accept_numbers)
{
int reg = S_GET_VALUE (symbolP);
-
+
if (reg >= 0 && reg <= 31)
return reg;
}
/* Otherwise drop through and try parsing name normally. */
}
-
+
low = 0;
high = regcount - 1;
return -1;
}
-
/* Summary of register_name().
*
* in: Input_line_pointer points to 1st char of operand.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
- * its original state.
- */
+ * its original state. */
+
static boolean
register_name (expressionP)
- expressionS * expressionP;
+ expressionS *expressionP;
{
- int reg_number;
- char * name;
- char * start;
- char c;
+ int reg_number;
+ char *name;
+ char *start;
+ char c;
- /* Find the spelling of the operand */
+ /* Find the spelling of the operand. */
start = name = input_line_pointer;
c = get_symbol_end ();
reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
name, FALSE);
- * input_line_pointer = c; /* put back the delimiting char */
-
- /* look to see if it's in the register table */
- if (reg_number >= 0)
+ /* Put back the delimiting char. */
+ *input_line_pointer = c;
+
+ /* Look to see if it's in the register table. */
+ if (reg_number >= 0)
{
expressionP->X_op = O_register;
expressionP->X_add_number = reg_number;
- /* make the rest nice */
+ /* Make the rest nice. */
expressionP->X_add_symbol = NULL;
expressionP->X_op_symbol = NULL;
-
+
return true;
}
else
{
- /* reset the line as if we had not done anything */
+ /* Reset the line as if we had not done anything. */
input_line_pointer = start;
-
+
return false;
}
}
/* Summary of system_register_name().
*
- * in: Input_line_pointer points to 1st char of operand.
- * expressionP points to an expression structure to be filled in.
- * accept_numbers is true iff numerical register names may be used.
- * accept_list_names is true iff the special names PS and SR may be
+ * in: INPUT_LINE_POINTER points to 1st char of operand.
+ * EXPRESSIONP points to an expression structure to be filled in.
+ * ACCEPT_NUMBERS is true iff numerical register names may be used.
+ * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
* accepted.
*
* out: A expressionS structure in expressionP.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
- * its original state.
- */
+ * its original state. */
+
static boolean
system_register_name (expressionP, accept_numbers, accept_list_names)
- expressionS * expressionP;
- boolean accept_numbers;
- boolean accept_list_names;
+ expressionS *expressionP;
+ boolean accept_numbers;
+ boolean accept_list_names;
{
- int reg_number;
- char * name;
- char * start;
- char c;
+ int reg_number;
+ char *name;
+ char *start;
+ char c;
- /* Find the spelling of the operand */
+ /* Find the spelling of the operand. */
start = name = input_line_pointer;
c = get_symbol_end ();
reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
accept_numbers);
- * input_line_pointer = c; /* put back the delimiting char */
-
+ /* Put back the delimiting char. */
+ *input_line_pointer = c;
+
if (reg_number < 0
&& accept_numbers)
{
- input_line_pointer = start; /* reset input_line pointer */
+ /* Reset input_line pointer. */
+ input_line_pointer = start;
- if (isdigit (* input_line_pointer))
+ if (isdigit (*input_line_pointer))
{
- reg_number = strtol (input_line_pointer, & input_line_pointer, 10);
+ reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
- /* Make sure that the register number is allowable. */
- if ( reg_number < 0
+ /* Make sure that the register number is allowable. */
+ if (reg_number < 0
|| (reg_number > 5 && reg_number < 16)
- || reg_number > 20
- )
+ || reg_number > 20)
{
reg_number = -1;
}
reg_number = reg_name_search (system_list_registers,
SYSREGLIST_NAME_CNT, name, FALSE);
- * input_line_pointer = c; /* put back the delimiting char */
+ /* Put back the delimiting char. */
+ *input_line_pointer = c;
}
}
-
- /* look to see if it's in the register table */
- if (reg_number >= 0)
+
+ /* Look to see if it's in the register table. */
+ if (reg_number >= 0)
{
expressionP->X_op = O_register;
expressionP->X_add_number = reg_number;
- /* make the rest nice */
+ /* Make the rest nice. */
expressionP->X_add_symbol = NULL;
expressionP->X_op_symbol = NULL;
}
else
{
- /* reset the line as if we had not done anything */
+ /* Reset the line as if we had not done anything. */
input_line_pointer = start;
-
+
return false;
}
}
/* Summary of cc_name().
*
- * in: Input_line_pointer points to 1st char of operand.
+ * in: INPUT_LINE_POINTER points to 1st char of operand.
*
* out: A expressionS.
* The operand may have been a register: in this case, X_op == O_register,
* X_add_number is set to the register number, and truth is returned.
* Input_line_pointer->(next non-blank) char after operand, or is in
- * its original state.
- */
+ * its original state. */
+
static boolean
cc_name (expressionP)
- expressionS * expressionP;
+ expressionS *expressionP;
{
- int reg_number;
- char * name;
- char * start;
- char c;
+ int reg_number;
+ char *name;
+ char *start;
+ char c;
- /* Find the spelling of the operand */
+ /* Find the spelling of the operand. */
start = name = input_line_pointer;
c = get_symbol_end ();
reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
- * input_line_pointer = c; /* put back the delimiting char */
-
- /* look to see if it's in the register table */
- if (reg_number >= 0)
+ /* Put back the delimiting char. */
+ *input_line_pointer = c;
+
+ /* Look to see if it's in the register table. */
+ if (reg_number >= 0)
{
expressionP->X_op = O_constant;
expressionP->X_add_number = reg_number;
- /* make the rest nice */
+ /* Make the rest nice. */
expressionP->X_add_symbol = NULL;
expressionP->X_op_symbol = NULL;
}
else
{
- /* reset the line as if we had not done anything */
+ /* Reset the line as if we had not done anything. */
input_line_pointer = start;
-
+
return false;
}
}
static void
skip_white_space (void)
{
- while ( * input_line_pointer == ' '
- || * input_line_pointer == '\t')
- ++ input_line_pointer;
+ while (*input_line_pointer == ' '
+ || *input_line_pointer == '\t')
+ ++input_line_pointer;
}
/* Summary of parse_register_list ().
*
- * in: Input_line_pointer points to 1st char of a list of registers.
- * insn is the partially constructed instruction.
- * operand is the operand being inserted.
+ * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
+ * INSN is the partially constructed instruction.
+ * OPERAND is the operand being inserted.
*
* out: NULL if the parse completed successfully, otherwise a
* pointer to an error message is returned. If the parse
* registers in the lists. The LSB in the expression refers to
* the lowest numbered permissable register in the register list,
* and so on upwards. System registers are considered to be very
- * high numbers.
- *
- */
+ * high numbers. */
+
static char *
-parse_register_list
-(
- unsigned long * insn,
- const struct v850_operand * operand
-)
+parse_register_list (insn, operand)
+ unsigned long *insn;
+ const struct v850_operand *operand;
{
- static int type1_regs[ 32 ] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
- static int type2_regs[ 32 ] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
- static int type3_regs[ 32 ] = { 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 };
- int * regs;
+ static int type1_regs[32] = {
+ 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
+ };
+ static int type2_regs[32] = {
+ 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
+ };
+ static int type3_regs[32] = {
+ 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
+ };
+ int *regs;
expressionS exp;
-
- /* Select a register array to parse. */
+ /* Select a register array to parse. */
switch (operand->shift)
{
case 0xffe00001: regs = type1_regs; break;
/* If the expression starts with a curly brace it is a register list.
Otherwise it is a constant expression, whoes bits indicate which
registers are to be included in the list. */
-
- if (* input_line_pointer != '{')
+
+ if (*input_line_pointer != '{')
{
int reg;
int i;
-
- expression (& exp);
-
+
+ expression (&exp);
+
if (exp.X_op != O_constant)
return _("constant expression or register list expected");
{
if (exp.X_add_number & 0xFFFFF000)
return _("high bits set in register list expression");
-
- for (reg = 20; reg < 32; reg ++)
+
+ for (reg = 20; reg < 32; reg++)
if (exp.X_add_number & (1 << (reg - 20)))
{
for (i = 0; i < 32; i++)
if (regs[i] == reg)
- * insn |= (1 << i);
+ *insn |= (1 << i);
}
}
else if (regs == type2_regs)
{
if (exp.X_add_number & 0xFFFE0000)
return _("high bits set in register list expression");
-
- for (reg = 1; reg < 16; reg ++)
+
+ for (reg = 1; reg < 16; reg++)
if (exp.X_add_number & (1 << (reg - 1)))
{
for (i = 0; i < 32; i++)
if (regs[i] == reg)
- * insn |= (1 << i);
+ *insn |= (1 << i);
}
if (exp.X_add_number & (1 << 15))
- * insn |= (1 << 3);
-
+ *insn |= (1 << 3);
+
if (exp.X_add_number & (1 << 16))
- * insn |= (1 << 19);
+ *insn |= (1 << 19);
}
- else /* regs == type3_regs */
+ else /* regs == type3_regs */
{
if (exp.X_add_number & 0xFFFE0000)
return _("high bits set in register list expression");
-
- for (reg = 16; reg < 32; reg ++)
+
+ for (reg = 16; reg < 32; reg++)
if (exp.X_add_number & (1 << (reg - 16)))
{
for (i = 0; i < 32; i++)
if (regs[i] == reg)
- * insn |= (1 << i);
+ *insn |= (1 << i);
}
if (exp.X_add_number & (1 << 16))
- * insn |= (1 << 19);
+ *insn |= (1 << 19);
}
return NULL;
}
- input_line_pointer ++;
+ input_line_pointer++;
/* Parse the register list until a terminator (closing curly brace or
new-line) is found. */
for (;;)
{
- if (register_name (& exp))
+ if (register_name (&exp))
{
- int i;
-
+ int i;
+
/* Locate the given register in the list, and if it is there,
insert the corresponding bit into the instruction. */
for (i = 0; i < 32; i++)
{
- if (regs[ i ] == exp.X_add_number)
+ if (regs[i] == exp.X_add_number)
{
- * insn |= (1 << i);
+ *insn |= (1 << i);
break;
}
}
return _("illegal register included in list");
}
}
- else if (system_register_name (& exp, true, true))
+ else if (system_register_name (&exp, true, true))
{
if (regs == type1_regs)
{
if (regs == type2_regs)
return _("PSW cannot be included in list");
else
- * insn |= 0x8;
+ *insn |= 0x8;
}
else if (exp.X_add_number < 4)
- * insn |= 0x80000;
+ *insn |= 0x80000;
else
return _("High value system registers cannot be included in list");
}
- else if (* input_line_pointer == '}')
+ else if (*input_line_pointer == '}')
{
- input_line_pointer ++;
+ input_line_pointer++;
break;
}
- else if (* input_line_pointer == ',')
+ else if (*input_line_pointer == ',')
{
- input_line_pointer ++;
+ input_line_pointer++;
continue;
}
- else if (* input_line_pointer == '-')
+ else if (*input_line_pointer == '-')
{
- /* We have encountered a range of registers: rX - rY */
- int j;
+ /* We have encountered a range of registers: rX - rY. */
+ int j;
expressionS exp2;
/* Skip the dash. */
- ++ input_line_pointer;
+ ++input_line_pointer;
/* Get the second register in the range. */
- if (! register_name (& exp2))
+ if (! register_name (&exp2))
{
return _("second register should follow dash in register list");
exp2.X_add_number = exp.X_add_number;
/* Add the rest of the registers in the range. */
for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
{
- int i;
-
+ int i;
+
/* Locate the given register in the list, and if it is there,
insert the corresponding bit into the instruction. */
for (i = 0; i < 32; i++)
{
- if (regs[ i ] == j)
+ if (regs[i] == j)
{
- * insn |= (1 << i);
+ *insn |= (1 << i);
break;
}
}
return NULL;
}
-CONST char * md_shortopts = "m:";
+CONST char *md_shortopts = "m:";
struct option md_longopts[] =
{
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof md_longopts;
+size_t md_longopts_size = sizeof (md_longopts);
void
md_show_usage (stream)
- FILE * stream;
+ FILE *stream;
{
fprintf (stream, _(" V850 options:\n"));
fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
int
md_parse_option (c, arg)
- int c;
- char * arg;
+ int c;
+ char *arg;
{
if (c != 'm')
{
if (c != 'a')
- /* xgettext:c-format */
+ /* xgettext:c-format */
fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
return 0;
}
}
else if (strcmp (arg, "v850any") == 0)
{
- machine = 0; /* Tell the world that this is for any v850 chip. */
- processor_mask = PROCESSOR_V850EA; /* But support instructions for the extended versions. */
+ /* Tell the world that this is for any v850 chip. */
+ machine = 0;
+
+ /* But support instructions for the extended versions. */
+ processor_mask = PROCESSOR_V850EA;
}
else
{
- /* xgettext:c-format */
+ /* xgettext:c-format */
fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
return 0;
}
-
+
return 1;
}
symbolS *
md_undefined_symbol (name)
- char * name ATTRIBUTE_UNUSED;
+ char *name ATTRIBUTE_UNUSED;
{
return 0;
}
char *
md_atof (type, litp, sizep)
- int type;
- char * litp;
- int * sizep;
+ int type;
+ char *litp;
+ int *sizep;
{
- int prec;
+ int prec;
LITTLENUM_TYPE words[4];
- char * t;
- int i;
+ char *t;
+ int i;
switch (type)
{
*sizep = 0;
return _("bad call to md_atof");
}
-
+
t = atof_ieee (input_line_pointer, type, words);
if (t)
input_line_pointer = t;
return NULL;
}
-
/* Very gross. */
+
void
md_convert_frag (abfd, sec, fragP)
- bfd * abfd ATTRIBUTE_UNUSED;
- asection * sec;
- fragS * fragP;
+ bfd *abfd ATTRIBUTE_UNUSED;
+ asection *sec;
+ fragS *fragP;
{
subseg_change (sec, 0);
-
+
/* In range conditional or unconditional branch. */
if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
{
/* Out of range conditional branch. Emit a branch around a jump. */
else if (fragP->fr_subtype == 1)
{
- unsigned char *buffer =
+ unsigned char *buffer =
(unsigned char *) (fragP->fr_fix + fragP->fr_literal);
/* Reverse the condition of the first branch. */
valueT
md_section_align (seg, addr)
- asection * seg;
- valueT addr;
+ asection *seg;
+ valueT addr;
{
int align = bfd_get_section_alignment (stdoutput, seg);
return ((addr + (1 << align) - 1) & (-1 << align));
void
md_begin ()
{
- char * prev_name = "";
- register const struct v850_opcode * op;
- flagword applicable;
+ char *prev_name = "";
+ register const struct v850_opcode *op;
+ flagword applicable;
if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
{
if (machine == -1)
machine = bfd_mach_v850ea;
-
+
if (processor_mask == -1)
processor_mask = PROCESSOR_V850EA;
}
else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
{
if (machine == -1)
- machine = bfd_mach_v850e;
-
+ machine = bfd_mach_v850e;
+
if (processor_mask == -1)
processor_mask = PROCESSOR_V850E;
}
- else
- if (strncmp (TARGET_CPU, "v850", 4) == 0)
+ else if (strncmp (TARGET_CPU, "v850", 4) == 0)
{
if (machine == -1)
- machine = 0;
-
+ machine = 0;
+
if (processor_mask == -1)
processor_mask = PROCESSOR_V850;
}
else
- /* xgettext:c-format */
- as_bad (_("Unable to determine default target processor from string: %s"),
+ /* xgettext:c-format */
+ as_bad (_("Unable to determine default target processor from string: %s"),
TARGET_CPU);
v850_hash = hash_new();
op = v850_opcodes;
while (op->name)
{
- if (strcmp (prev_name, op->name))
+ if (strcmp (prev_name, op->name))
{
prev_name = (char *) op->name;
hash_insert (v850_hash, op->name, (char *) op);
bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
applicable = bfd_applicable_section_flags (stdoutput);
-
+
call_table_data_section = subseg_new (".call_table_data", 0);
bfd_set_section_flags (stdoutput, call_table_data_section,
applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_DATA | SEC_HAS_CONTENTS));
-
+
call_table_text_section = subseg_new (".call_table_text", 0);
bfd_set_section_flags (stdoutput, call_table_text_section,
applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
| SEC_CODE));
-
+
/* Restore text section as the current default. */
subseg_set (text_section, 0);
}
-
static bfd_reloc_code_real_type
-handle_ctoff (const struct v850_operand * operand)
+handle_ctoff (const struct v850_operand *operand)
{
if (operand == NULL)
return BFD_RELOC_V850_CALLT_16_16_OFFSET;
- if ( operand->bits != 6
+ if (operand->bits != 6
|| operand->shift != 0)
{
as_bad (_("ctoff() relocation used on an instruction which does not support it"));
return BFD_RELOC_64; /* Used to indicate an error condition. */
}
-
+
return BFD_RELOC_V850_CALLT_6_7_OFFSET;
}
static bfd_reloc_code_real_type
-handle_sdaoff (const struct v850_operand * operand)
+handle_sdaoff (const struct v850_operand *operand)
{
- if (operand == NULL) return BFD_RELOC_V850_SDA_16_16_OFFSET;
- if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_SDA_15_16_OFFSET;
- if (operand->bits == -1) return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
-
- if ( operand->bits != 16
+ if (operand == NULL)
+ return BFD_RELOC_V850_SDA_16_16_OFFSET;
+
+ if (operand->bits == 15 && operand->shift == 17)
+ return BFD_RELOC_V850_SDA_15_16_OFFSET;
+
+ if (operand->bits == -1)
+ return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
+
+ if (operand->bits != 16
|| operand->shift != 16)
{
as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
return BFD_RELOC_64; /* Used to indicate an error condition. */
}
-
+
return BFD_RELOC_V850_SDA_16_16_OFFSET;
}
static bfd_reloc_code_real_type
-handle_zdaoff (const struct v850_operand * operand)
+handle_zdaoff (const struct v850_operand *operand)
{
- if (operand == NULL) return BFD_RELOC_V850_ZDA_16_16_OFFSET;
- if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_ZDA_15_16_OFFSET;
- if (operand->bits == -1) return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
+ if (operand == NULL)
+ return BFD_RELOC_V850_ZDA_16_16_OFFSET;
+
+ if (operand->bits == 15 && operand->shift == 17)
+ return BFD_RELOC_V850_ZDA_15_16_OFFSET;
- if ( operand->bits != 16
+ if (operand->bits == -1)
+ return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
+
+ if (operand->bits != 16
|| operand->shift != 16)
{
as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
- return BFD_RELOC_64; /* Used to indicate an error condition. */
+ /* Used to indicate an error condition. */
+ return BFD_RELOC_64;
}
-
+
return BFD_RELOC_V850_ZDA_16_16_OFFSET;
}
static bfd_reloc_code_real_type
-handle_tdaoff (const struct v850_operand * operand)
+handle_tdaoff (const struct v850_operand *operand)
{
- if (operand == NULL) return BFD_RELOC_V850_TDA_7_7_OFFSET; /* data item, not an instruction. */
- if (operand->bits == 6 && operand->shift == 1) return BFD_RELOC_V850_TDA_6_8_OFFSET; /* sld.w/sst.w, operand: D8_6 */
- if (operand->bits == 4 && operand->insert != NULL) return BFD_RELOC_V850_TDA_4_5_OFFSET; /* sld.hu, operand: D5-4 */
- if (operand->bits == 4 && operand->insert == NULL) return BFD_RELOC_V850_TDA_4_4_OFFSET; /* sld.bu, operand: D4 */
- if (operand->bits == 16 && operand->shift == 16) return BFD_RELOC_V850_TDA_16_16_OFFSET; /* set1 & chums, operands: D16 */
-
+ if (operand == NULL)
+ /* Data item, not an instruction. */
+ return BFD_RELOC_V850_TDA_7_7_OFFSET;
+
+ if (operand->bits == 6 && operand->shift == 1)
+ /* sld.w/sst.w, operand: D8_6 */
+ return BFD_RELOC_V850_TDA_6_8_OFFSET;
+
+ if (operand->bits == 4 && operand->insert != NULL)
+ /* sld.hu, operand: D5-4 */
+ return BFD_RELOC_V850_TDA_4_5_OFFSET;
+
+ if (operand->bits == 4 && operand->insert == NULL)
+ /* sld.bu, operand: D4 */
+ return BFD_RELOC_V850_TDA_4_4_OFFSET;
+
+ if (operand->bits == 16 && operand->shift == 16)
+ /* set1 & chums, operands: D16 */
+ return BFD_RELOC_V850_TDA_16_16_OFFSET;
+
if (operand->bits != 7)
{
as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
- return BFD_RELOC_64; /* Used to indicate an error condition. */
+ /* Used to indicate an error condition. */
+ return BFD_RELOC_64;
}
-
+
return operand->insert != NULL
- ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
- : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
+ ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
+ : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
}
/* Warning: The code in this function relies upon the definitions
matching the hard coded values contained herein. */
static bfd_reloc_code_real_type
-v850_reloc_prefix (const struct v850_operand * operand)
+v850_reloc_prefix (const struct v850_operand *operand)
{
boolean paren_skipped = false;
-
/* Skip leading opening parenthesis. */
- if (* input_line_pointer == '(')
+ if (*input_line_pointer == '(')
{
- ++ input_line_pointer;
+ ++input_line_pointer;
paren_skipped = true;
}
input_line_pointer += strlen (name); \
return reloc; \
}
-
- CHECK_ ("hi0", BFD_RELOC_HI16);
- CHECK_ ("hi", BFD_RELOC_HI16_S);
- CHECK_ ("lo", BFD_RELOC_LO16);
+
+ CHECK_ ("hi0", BFD_RELOC_HI16 );
+ CHECK_ ("hi", BFD_RELOC_HI16_S );
+ CHECK_ ("lo", BFD_RELOC_LO16 );
CHECK_ ("sdaoff", handle_sdaoff (operand));
CHECK_ ("zdaoff", handle_zdaoff (operand));
CHECK_ ("tdaoff", handle_tdaoff (operand));
- CHECK_ ("hilo", BFD_RELOC_32);
- CHECK_ ("ctoff", handle_ctoff (operand));
-
+ CHECK_ ("hilo", BFD_RELOC_32 );
+ CHECK_ ("ctoff", handle_ctoff (operand) );
+
/* Restore skipped parenthesis. */
if (paren_skipped)
- -- input_line_pointer;
-
+ --input_line_pointer;
+
return BFD_RELOC_UNUSED;
}
static unsigned long
v850_insert_operand (insn, operand, val, file, line, str)
- unsigned long insn;
- const struct v850_operand * operand;
- offsetT val;
- char * file;
- unsigned int line;
- char * str;
+ unsigned long insn;
+ const struct v850_operand *operand;
+ offsetT val;
+ char *file;
+ unsigned int line;
+ char *str;
{
if (operand->insert)
{
- const char * message = NULL;
-
- insn = operand->insert (insn, val, & message);
+ const char *message = NULL;
+
+ insn = operand->insert (insn, val, &message);
if (message != NULL)
{
if ((operand->flags & V850_OPERAND_SIGNED)
&& ! warn_signed_overflows
&& strstr (message, "out of range") != NULL)
{
- /* skip warning... */
+ /* Skip warning... */
}
else if ((operand->flags & V850_OPERAND_SIGNED) == 0
&& ! warn_unsigned_overflows
&& strstr (message, "out of range") != NULL)
{
- /* skip warning... */
+ /* Skip warning... */
}
else if (str)
{
{
if (operand->bits != 32)
{
- long min, max;
+ long min, max;
if ((operand->flags & V850_OPERAND_SIGNED) != 0)
{
max = (1 << operand->bits) - 1;
else
max = (1 << (operand->bits - 1)) - 1;
-
- min = - (1 << (operand->bits - 1));
+
+ min = -(1 << (operand->bits - 1));
}
else
{
max = (1 << operand->bits) - 1;
-
+
if (! warn_unsigned_overflows)
- min = - (1 << (operand->bits - 1));
+ min = -(1 << (operand->bits - 1));
else
min = 0;
}
-
+
if (val < (offsetT) min || val > (offsetT) max)
{
- /* xgettext:c-format */
- const char * err = _("operand out of range (%s not between %ld and %ld)");
- char buf[100];
-
+ /* xgettext:c-format */
+ const char *err =
+ _("operand out of range (%s not between %ld and %ld)");
+ char buf[100];
+
/* Restore min and mix to expected values for decimal ranges. */
if ((operand->flags & V850_OPERAND_SIGNED)
&& ! warn_signed_overflows)
if (str)
{
sprintf (buf, "%s: ", str);
-
+
sprint_value (buf + strlen (buf), val);
}
else
sprint_value (buf, val);
-
+
if (file == (char *) NULL)
as_warn (err, buf, min, max);
else
insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
}
-
+
return insn;
}
-
\f
-static char copy_of_instruction [128];
+static char copy_of_instruction[128];
void
-md_assemble (str)
- char * str;
+md_assemble (str)
+ char *str;
{
- char * s;
- char * start_of_operands;
- struct v850_opcode * opcode;
- struct v850_opcode * next_opcode;
- const unsigned char * opindex_ptr;
- int next_opindex;
- int relaxable = 0;
- unsigned long insn;
- unsigned long insn_size;
- char * f;
- int i;
- int match;
- boolean extra_data_after_insn = false;
- unsigned extra_data_len = 0;
- unsigned long extra_data = 0;
- char * saved_input_line_pointer;
-
-
+ char *s;
+ char *start_of_operands;
+ struct v850_opcode *opcode;
+ struct v850_opcode *next_opcode;
+ const unsigned char *opindex_ptr;
+ int next_opindex;
+ int relaxable = 0;
+ unsigned long insn;
+ unsigned long insn_size;
+ char *f;
+ int i;
+ int match;
+ boolean extra_data_after_insn = false;
+ unsigned extra_data_len = 0;
+ unsigned long extra_data = 0;
+ char *saved_input_line_pointer;
+
strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
-
+
/* Get the opcode. */
for (s = str; *s != '\0' && ! isspace (*s); s++)
continue;
-
+
if (*s != '\0')
*s++ = '\0';
- /* find the first opcode with the proper name */
+ /* Find the first opcode with the proper name. */
opcode = (struct v850_opcode *) hash_find (v850_hash, str);
if (opcode == NULL)
{
- /* xgettext:c-format */
+ /* xgettext:c-format */
as_bad (_("Unrecognized opcode: `%s'"), str);
ignore_rest_of_line ();
return;
}
str = s;
- while (isspace (* str))
- ++ str;
+ while (isspace (*str))
+ ++str;
start_of_operands = str;
saved_input_line_pointer = input_line_pointer;
-
+
for (;;)
{
- const char * errmsg = NULL;
+ const char *errmsg = NULL;
match = 0;
-
+
if ((opcode->processors & processor_mask) == 0)
{
errmsg = _("Target processor does not support this instruction.");
goto error;
}
-
+
relaxable = 0;
fc = 0;
next_opindex = 0;
input_line_pointer = str = start_of_operands;
- for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr ++)
+ for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
{
- const struct v850_operand * operand;
- char * hold;
- expressionS ex;
- bfd_reloc_code_real_type reloc;
+ const struct v850_operand *operand;
+ char *hold;
+ expressionS ex;
+ bfd_reloc_code_real_type reloc;
if (next_opindex == 0)
{
- operand = & v850_operands[ * opindex_ptr ];
+ operand = &v850_operands[*opindex_ptr];
}
else
{
- operand = & v850_operands[ next_opindex ];
+ operand = &v850_operands[next_opindex];
next_opindex = 0;
}
errmsg = NULL;
while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
- ++ str;
+ ++str;
if (operand->flags & V850_OPERAND_RELAX)
relaxable = 1;
- /* Gather the operand. */
+ /* Gather the operand. */
hold = input_line_pointer;
input_line_pointer = str;
-
- /* lo(), hi(), hi0(), etc... */
+
+ /* lo(), hi(), hi0(), etc... */
if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
{
/* This is a fake reloc, used to indicate an error condition. */
match = 1;
goto error;
}
-
- expression (& ex);
+
+ expression (&ex);
if (ex.X_op == O_constant)
{
/* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
and the like. */
/* Fall through. */
-
+
case BFD_RELOC_LO16:
{
/* Truncate, then sign extend the value. */
case BFD_RELOC_HI16_S:
{
/* Truncate, then sign extend the value. */
- int temp = (ex.X_add_number >> 16) & 0xffff;
+ int temp = (ex.X_add_number >> 16) & 0xffff;
temp += (ex.X_add_number >> 15) & 1;
ex.X_add_number = SEXT16 (temp);
break;
}
-
+
case BFD_RELOC_32:
if ((operand->flags & V850E_IMMEDIATE32) == 0)
{
errmsg = _("immediate operand is too large");
goto error;
}
-
+
extra_data_after_insn = true;
extra_data_len = 4;
extra_data = ex.X_add_number;
ex.X_add_number = 0;
break;
-
+
default:
fprintf (stderr, "reloc: %d\n", reloc);
as_bad (_("AAARG -> unhandled constant reloc"));
if (fc > MAX_INSN_FIXUPS)
as_fatal (_("too many fixups"));
-
- fixups[ fc ].exp = ex;
- fixups[ fc ].opindex = * opindex_ptr;
- fixups[ fc ].reloc = reloc;
+
+ fixups[fc].exp = ex;
+ fixups[fc].opindex = *opindex_ptr;
+ fixups[fc].reloc = reloc;
fc++;
}
else
errmsg = _("immediate operand is too large");
goto error;
}
-
+
extra_data_after_insn = true;
extra_data_len = 4;
extra_data = ex.X_add_number;
}
-
+
if (fc > MAX_INSN_FIXUPS)
as_fatal (_("too many fixups"));
- fixups[ fc ].exp = ex;
- fixups[ fc ].opindex = * opindex_ptr;
- fixups[ fc ].reloc = reloc;
+ fixups[fc].exp = ex;
+ fixups[fc].opindex = *opindex_ptr;
+ fixups[fc].reloc = reloc;
fc++;
}
}
else
{
errmsg = NULL;
-
- if ((operand->flags & V850_OPERAND_REG) != 0)
+
+ if ((operand->flags & V850_OPERAND_REG) != 0)
{
- if (!register_name (& ex))
+ if (!register_name (&ex))
{
errmsg = _("invalid register name");
}
else if ((operand->flags & V850_NOT_R0)
- && ex.X_add_number == 0)
+ && ex.X_add_number == 0)
{
errmsg = _("register r0 cannot be used here");
-
+
/* Force an error message to be generated by
skipping over any following potential matches
for this opcode. */
opcode += 3;
}
}
- else if ((operand->flags & V850_OPERAND_SRG) != 0)
+ else if ((operand->flags & V850_OPERAND_SRG) != 0)
{
- if (!system_register_name (& ex, true, false))
+ if (!system_register_name (&ex, true, false))
{
errmsg = _("invalid system register name");
}
}
else if ((operand->flags & V850_OPERAND_EP) != 0)
{
- char * start = input_line_pointer;
- char c = get_symbol_end ();
-
+ char *start = input_line_pointer;
+ char c = get_symbol_end ();
+
if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
{
/* Put things back the way we found them. */
errmsg = _("expected EP register");
goto error;
}
-
+
*input_line_pointer = c;
str = input_line_pointer;
input_line_pointer = hold;
-
- while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
- ++ str;
+
+ while (*str == ' ' || *str == ','
+ || *str == '[' || *str == ']')
+ ++str;
continue;
}
- else if ((operand->flags & V850_OPERAND_CC) != 0)
+ else if ((operand->flags & V850_OPERAND_CC) != 0)
{
- if (!cc_name (& ex))
+ if (!cc_name (&ex))
{
errmsg = _("invalid condition code name");
}
}
- else if (operand->flags & V850E_PUSH_POP)
+ else if (operand->flags & V850E_PUSH_POP)
{
- errmsg = parse_register_list (& insn, operand);
-
+ errmsg = parse_register_list (&insn, operand);
+
/* The parse_register_list() function has already done
everything, so fake a dummy expression. */
ex.X_op = O_constant;
ex.X_add_number = 0;
}
- else if (operand->flags & V850E_IMMEDIATE16)
+ else if (operand->flags & V850E_IMMEDIATE16)
{
- expression (& ex);
+ expression (&ex);
if (ex.X_op != O_constant)
errmsg = _("constant expression expected");
else
errmsg = _("constant too big to fit into instruction");
}
-
+
extra_data_after_insn = true;
extra_data_len = 2;
extra_data = ex.X_add_number;
ex.X_add_number = 0;
}
- else if (operand->flags & V850E_IMMEDIATE32)
+ else if (operand->flags & V850E_IMMEDIATE32)
{
- expression (& ex);
-
+ expression (&ex);
+
if (ex.X_op != O_constant)
errmsg = _("constant expression expected");
-
+
extra_data_after_insn = true;
extra_data_len = 4;
extra_data = ex.X_add_number;
ex.X_add_number = 0;
}
- else if (register_name (& ex)
+ else if (register_name (&ex)
&& (operand->flags & V850_OPERAND_REG) == 0)
{
char c;
- int exists = 0;
-
+ int exists = 0;
+
/* It is possible that an alias has been defined that
matches a register name. For example the code may
include a ".set ZERO, 0" directive, which matches
input_line_pointer = str;
c = get_symbol_end ();
-
+
if (symbol_find (str) != NULL)
exists = 1;
-
- * input_line_pointer = c;
+
+ *input_line_pointer = c;
input_line_pointer = str;
-
- expression (& ex);
+
+ expression (&ex);
if (ex.X_op != O_constant)
{
the parsing of the instruction, (because another
field is missing) then report this. */
if (opindex_ptr[1] != 0
- && (v850_operands [opindex_ptr [1]].flags & V850_OPERAND_REG))
+ && (v850_operands[opindex_ptr[1]].flags
+ & V850_OPERAND_REG))
errmsg = _("syntax error: value is missing before the register name");
else
errmsg = _("syntax error: register not expected");
- /* If we created a symbol in the process of this test then
- delete it now, so that it will not be output with the real
- symbols... */
+ /* If we created a symbol in the process of this
+ test then delete it now, so that it will not
+ be output with the real symbols... */
if (exists == 0
&& ex.X_op == O_symbol)
symbol_remove (ex.X_add_symbol,
- & symbol_rootP, & symbol_lastP);
+ &symbol_rootP, &symbol_lastP);
}
}
- else if (system_register_name (& ex, false, false)
+ else if (system_register_name (&ex, false, false)
&& (operand->flags & V850_OPERAND_SRG) == 0)
{
errmsg = _("syntax error: system register not expected");
}
else
{
- expression (& ex);
+ expression (&ex);
/* Special case:
If we are assembling a MOV instruction (or a CALLT.... :-)
and the immediate value does not fit into the bits
if (((insn & 0x07e0) == 0x0200)
&& ex.X_op == O_constant
- && (ex.X_add_number < (- (1 << (operand->bits - 1)))
+ && (ex.X_add_number < (-(1 << (operand->bits - 1)))
|| ex.X_add_number > ((1 << operand->bits) - 1)))
errmsg = _("immediate operand is too large");
}
if (errmsg)
goto error;
-
-/* fprintf (stderr, " insn: %x, operand %d, op: %d, add_number: %d\n",
- insn, opindex_ptr - opcode->operands, ex.X_op, ex.X_add_number); */
- switch (ex.X_op)
+#if 0
+ fprintf (stderr,
+ " insn: %x, operand %d, op: %d, add_number: %d\n",
+ insn, opindex_ptr - opcode->operands,
+ ex.X_op, ex.X_add_number);
+#endif
+
+ switch (ex.X_op)
{
case O_illegal:
errmsg = _("illegal operand");
errmsg = _("missing operand");
goto error;
case O_register:
- if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
+ if ((operand->flags
+ & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
{
errmsg = _("invalid operand");
goto error;
if (fc >= MAX_INSN_FIXUPS)
as_fatal (_("too many fixups"));
- fixups[ fc ].exp = ex;
- fixups[ fc ].opindex = * opindex_ptr;
- fixups[ fc ].reloc = BFD_RELOC_UNUSED;
+ fixups[fc].exp = ex;
+ fixups[fc].opindex = *opindex_ptr;
+ fixups[fc].reloc = BFD_RELOC_UNUSED;
++fc;
break;
}
error:
if (match == 0)
- {
+ {
next_opcode = opcode + 1;
if (next_opcode->name != NULL
&& strcmp (next_opcode->name, opcode->name) == 0)
processor. */
if ((opcode->processors & processor_mask) == 0)
goto error;
-
+
continue;
}
-
+
as_bad ("%s: %s", copy_of_instruction, errmsg);
-
- if (* input_line_pointer == ']')
- ++ input_line_pointer;
-
+
+ if (*input_line_pointer == ']')
+ ++input_line_pointer;
+
ignore_rest_of_line ();
input_line_pointer = saved_input_line_pointer;
return;
- }
+ }
break;
}
-
+
while (isspace (*str))
++str;
if (*str != '\0')
- /* xgettext:c-format */
+ /* xgettext:c-format */
as_bad (_("junk at end of line: `%s'"), str);
input_line_pointer = str;
- /* Write out the instruction. */
-
+ /* Write out the instruction. */
+
if (relaxable && fc > 0)
{
insn_size = 2;
f = frag_var (rs_machine_dependent, 4, 2, 2,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *)fixups[0].opindex);
+ (char *) fixups[0].opindex);
md_number_to_chars (f, insn, insn_size);
md_number_to_chars (f + 2, 0, 2);
}
f = frag_var (rs_machine_dependent, 6, 4, 0,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *)fixups[0].opindex);
+ (char *) fixups[0].opindex);
md_number_to_chars (f, insn, insn_size);
md_number_to_chars (f + 2, 0, 4);
}
}
- else
+ else
{
/* Four byte insns have an opcode with the two high bits on. */
if ((insn & 0x0600) == 0x0600)
else
insn_size = 2;
- /* Special case: 32 bit MOV */
+ /* Special case: 32 bit MOV. */
if ((insn & 0xffe0) == 0x0620)
insn_size = 2;
-
+
f = frag_more (insn_size);
-
+
md_number_to_chars (f, insn, insn_size);
if (extra_data_after_insn)
{
f = frag_more (extra_data_len);
-
+
md_number_to_chars (f, extra_data, extra_data_len);
extra_data_after_insn = false;
BFD_RELOC_UNUSED plus the operand index. This lets us easily
handle fixups for any operand type, although that is admittedly
not a very exciting feature. We pick a BFD reloc type in
- md_apply_fix. */
+ md_apply_fix. */
for (i = 0; i < fc; i++)
{
- const struct v850_operand * operand;
- bfd_reloc_code_real_type reloc;
-
- operand = & v850_operands[ fixups[i].opindex ];
+ const struct v850_operand *operand;
+ bfd_reloc_code_real_type reloc;
+
+ operand = &v850_operands[fixups[i].opindex];
reloc = fixups[i].reloc;
-
+
if (reloc != BFD_RELOC_UNUSED)
{
- reloc_howto_type * reloc_howto = bfd_reloc_type_lookup (stdoutput,
- reloc);
- int size;
- int address;
- fixS * fixP;
+ reloc_howto_type *reloc_howto =
+ bfd_reloc_type_lookup (stdoutput, reloc);
+ int size;
+ int address;
+ fixS *fixP;
if (!reloc_howto)
- abort();
-
+ abort ();
+
size = bfd_get_reloc_size (reloc_howto);
/* XXX This will abort on an R_V850_8 reloc -
- is this reloc actually used ? */
- if (size != 2 && size != 4)
+ is this reloc actually used? */
+ if (size != 2 && size != 4)
abort ();
address = (f - frag_now->fr_literal) + insn_size - size;
if (reloc == BFD_RELOC_32)
- {
- address += 2;
- }
-
+ address += 2;
+
fixP = fix_new_exp (frag_now, address, size,
- & fixups[i].exp,
+ &fixups[i].exp,
reloc_howto->pc_relative,
reloc);
}
else
{
- fix_new_exp (
- frag_now,
+ fix_new_exp (frag_now,
f - frag_now->fr_literal, 4,
& fixups[i].exp,
- 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
+ 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
(bfd_reloc_code_real_type) (fixups[i].opindex
- + (int) BFD_RELOC_UNUSED)
- );
+ + (int) BFD_RELOC_UNUSED));
}
}
input_line_pointer = saved_input_line_pointer;
}
+/* If while processing a fixup, a reloc really needs to be created
+ then it is done here. */
-/* If while processing a fixup, a reloc really needs to be created */
-/* then it is done here. */
-
arelent *
tc_gen_reloc (seg, fixp)
- asection * seg ATTRIBUTE_UNUSED;
- fixS * fixp;
+ asection *seg ATTRIBUTE_UNUSED;
+ fixS *fixp;
{
- arelent * reloc;
-
- reloc = (arelent *) xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
- *reloc->sym_ptr_ptr= symbol_get_bfdsym (fixp->fx_addsy);
- reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
- reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ arelent *reloc;
+
+ reloc = (arelent *) xmalloc (sizeof (arelent));
+ reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
if (reloc->howto == (reloc_howto_type *) NULL)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
- /* xgettext:c-format */
- _("reloc %d not supported by object file format"),
+ /* xgettext:c-format */
+ _("reloc %d not supported by object file format"),
(int) fixp->fx_r_type);
xfree (reloc);
-
+
return NULL;
}
-
- if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
+
+ if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
|| fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
reloc->addend = fixp->fx_offset;
else
reloc->addend = fixp->fx_addnumber;
-
+
return reloc;
}
/* Assume everything will fit in two bytes, then expand as necessary. */
+
int
md_estimate_size_before_relax (fragp, seg)
- fragS * fragp;
- asection * seg ATTRIBUTE_UNUSED;
+ fragS *fragp;
+ asection *seg ATTRIBUTE_UNUSED;
{
if (fragp->fr_subtype == 0)
fragp->fr_var = 4;
else
abort ();
return 2;
-}
+}
long
v850_pcrel_from_section (fixp, section)
- fixS * fixp;
- segT section;
+ fixS *fixp;
+ segT section;
{
/* If the symbol is undefined, or in a section other than our own,
or it is weak (in which case it may well be in another section,
|| S_IS_WEAK (fixp->fx_addsy)
|| (S_GET_SEGMENT (fixp->fx_addsy) != section)))
return 0;
-
+
return fixp->fx_frag->fr_address + fixp->fx_where;
}
int
md_apply_fix3 (fixp, valuep, seg)
- fixS * fixp;
- valueT * valuep;
- segT seg ATTRIBUTE_UNUSED;
+ fixS *fixp;
+ valueT *valuep;
+ segT seg ATTRIBUTE_UNUSED;
{
valueT value;
- char * where;
+ char *where;
- if ( fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
{
fixp->fx_done = 0;
if (fixp->fx_addsy == (symbolS *) NULL)
{
- value = * valuep;
+ value = *valuep;
fixp->fx_done = 1;
}
else if (fixp->fx_pcrel)
- value = * valuep;
+ value = *valuep;
else
{
value = fixp->fx_offset;
if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
{
- int opindex;
- const struct v850_operand * operand;
- unsigned long insn;
+ int opindex;
+ const struct v850_operand *operand;
+ unsigned long insn;
opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
- operand = & v850_operands[ opindex ];
+ operand = &v850_operands[opindex];
/* Fetch the instruction, insert the fully resolved operand
value, and stuff the instruction back again.
if (fixp->fx_done)
{
- /* Nothing else to do here. */
+ /* Nothing else to do here. */
return 1;
}
- /* Determine a BFD reloc value based on the operand information.
- We are only prepared to turn a few of the operands into relocs. */
+ /* Determine a BFD reloc value based on the operand information.
+ We are only prepared to turn a few of the operands into relocs. */
if (operand->bits == 22)
fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
else
{
- /* fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn); */
-
+#if 0
+ fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
+#endif
+
as_bad_where (fixp->fx_file, fixp->fx_line,
- _("unresolved expression that must be resolved"));
+ _("unresolved expression that must be resolved"));
fixp->fx_done = 1;
return 1;
}
where = fixp->fx_frag->fr_literal + fixp->fx_where;
if (fixp->fx_size == 1)
- * where = value & 0xff;
+ *where = value & 0xff;
else if (fixp->fx_size == 2)
bfd_putl16 (value & 0xffff, (unsigned char *) where);
else if (fixp->fx_size == 4)
bfd_putl32 (value, (unsigned char *) where);
}
-
+
fixp->fx_addnumber = value;
return 1;
}
-
\f
/* Parse a cons expression. We have to handle hi(), lo(), etc
on the v850. */
+
void
parse_cons_expression_v850 (exp)
- expressionS * exp;
+ expressionS *exp;
{
/* See if there's a reloc prefix like hi() we have to handle. */
hold_cons_reloc = v850_reloc_prefix (NULL);
/* Create a fixup for a cons expression. If parse_cons_expression_v850
found a reloc prefix, then we use that reloc, else we choose an
appropriate one based on the size of the expression. */
+
void
cons_fix_new_v850 (frag, where, size, exp)
- fragS * frag;
+ fragS *frag;
int where;
int size;
expressionS *exp;
boolean
v850_fix_adjustable (fixP)
- fixS * fixP;
+ fixS *fixP;
{
if (fixP->fx_addsy == NULL)
return 1;
-
- /* Prevent all adjustments to global symbols. */
+
+ /* Prevent all adjustments to global symbols. */
if (S_IS_EXTERN (fixP->fx_addsy))
return 0;
-
+
/* Similarly for weak symbols. */
if (S_IS_WEAK (fixP->fx_addsy))
return 0;
-
- /* Don't adjust function names */
+
+ /* Don't adjust function names. */
if (S_IS_FUNCTION (fixP->fx_addsy))
return 0;
- /* We need the symbol name for the VTABLE entries */
- if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ /* We need the symbol name for the VTABLE entries. */
+ if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 0;
-
+
return 1;
}
-
+
int
v850_force_relocation (fixP)
- struct fix * fixP;
+ struct fix *fixP;
{
if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
return 1;
-
- if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+
+ if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 1;
-
+
return 0;
}
projects / external / binutils.git / commitdiff