switch (priv->byRFType) {
case RF_RFMD2959:
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_TXPEINV);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_TXPEINV);
vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_SOFTPWRCTL,
SOFTPWRCTL_SWPE1);
break;
case RF_AIROHA:
case RF_AL2230S:
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE2);
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE2);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE3);
break;
}
iowrite8(reg_value & ~(bit_mask), iobase + reg_offset); \
} while (0)
-#define MACvWordRegBitsOff(iobase, reg_offset, bit_mask) \
+#define vt6655_mac_word_reg_bits_off(iobase, reg_offset, bit_mask) \
do { \
unsigned short reg_value; \
reg_value = ioread16(iobase + reg_offset); \
vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL,
(SOFTPWRCTL_SWPECTI | SOFTPWRCTL_TXPEINV));
/* PLL Off */
- MACvWordRegBitsOff(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_off(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
/* patch abnormal AL2230 frequency output */
IFRFbWriteEmbedded(priv, (0x07168700 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW));