// stack slot reference to depend on the instruction that does the
// modification.
const TargetLowering &TLI = *MF.getTarget().getTargetLowering();
- if (MI->definesRegister(TLI.getStackPointerRegisterToSaveRestore()))
+ const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
+ if (MI->modifiesRegister(TLI.getStackPointerRegisterToSaveRestore(), TRI))
return true;
return false;
--- /dev/null
+; RUN: llc -march=ppc64 -enable-misched < %s | FileCheck %s
+;
+; PR14315: misched should not move the physreg copy of %t below the calls.
+
+@.str89 = external unnamed_addr constant [6 x i8], align 1
+
+declare void @init() nounwind
+
+declare void @clock() nounwind
+
+; CHECK: %entry
+; CHECK: fmr f31, f1
+; CHECK: bl _init
+define void @s332(double %t) nounwind {
+entry:
+ tail call void @init()
+ tail call void @clock() nounwind
+ br label %for.cond2
+
+for.cond2: ; preds = %for.body4, %entry
+ %i.0 = phi i32 [ %inc, %for.body4 ], [ 0, %entry ]
+ %cmp3 = icmp slt i32 undef, 16000
+ br i1 %cmp3, label %for.body4, label %L20
+
+for.body4: ; preds = %for.cond2
+ %cmp5 = fcmp ogt double undef, %t
+ %inc = add nsw i32 %i.0, 1
+ br i1 %cmp5, label %L20, label %for.cond2
+
+L20: ; preds = %for.body4, %for.cond2
+ %index.0 = phi i32 [ -2, %for.cond2 ], [ %i.0, %for.body4 ]
+ unreachable
+}