}
static void
+i965_render_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling)
+{
+ switch (tiling) {
+ case I915_TILING_NONE:
+ ss->ss3.tiled_surface = 0;
+ ss->ss3.tile_walk = 0;
+ break;
+ case I915_TILING_X:
+ ss->ss3.tiled_surface = 1;
+ ss->ss3.tile_walk = I965_TILEWALK_XMAJOR;
+ break;
+ case I915_TILING_Y:
+ ss->ss3.tiled_surface = 1;
+ ss->ss3.tile_walk = I965_TILEWALK_YMAJOR;
+ break;
+ }
+}
+
+static void
i965_render_src_surface_state(VADriverContextP ctx,
int index,
dri_bo *region,
struct i965_render_state *render_state = &i965->render_state;
struct i965_surface_state *ss;
dri_bo *ss_bo = render_state->wm.surface_state_binding_table_bo;
+ unsigned int tiling;
+ unsigned int swizzle;
assert(index < MAX_RENDER_SURFACES);
+
dri_bo_map(ss_bo, 1);
assert(ss_bo->virtual);
ss = (struct i965_surface_state *)((char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index));
ss->ss3.pitch = pitch - 1;
+ dri_bo_get_tiling(region, &tiling, &swizzle);
+ i965_render_set_surface_tiling(ss, tiling);
+
dri_bo_emit_reloc(ss_bo,
I915_GEM_DOMAIN_SAMPLER, 0,
offset,
}
static void
-i965_render_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling)
-{
- switch (tiling) {
- case I915_TILING_NONE:
- ss->ss3.tiled_surface = 0;
- ss->ss3.tile_walk = 0;
- break;
- case I915_TILING_X:
- ss->ss3.tiled_surface = 1;
- ss->ss3.tile_walk = I965_TILEWALK_XMAJOR;
- break;
- case I915_TILING_Y:
- ss->ss3.tiled_surface = 1;
- ss->ss3.tile_walk = I965_TILEWALK_YMAJOR;
- break;
- }
-}
-
-static void
i965_render_dest_surface_state(VADriverContextP ctx, int index)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);