arm64: gpr-num: support W registers

In subsequent patches we'll want to map W registers to their register
numbers. Update gpr-num.h so that we can do this.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20211019160219.5202-7-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/gpr-num.h b/arch/arm64/include/asm/gpr-num.h
index f936aa3..05da4a7 100644 (file)
--- a/arch/arm64/include/asm/gpr-num.h
+++ b/arch/arm64/include/asm/gpr-num.h
@@ -6,16 +6,20 @@
 
        .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
        .equ    .L__gpr_num_x\num, \num
+       .equ    .L__gpr_num_w\num, \num
        .endr
        .equ    .L__gpr_num_xzr, 31
+       .equ    .L__gpr_num_wzr, 31
 
 #else /* __ASSEMBLY__ */
 
 #define __DEFINE_ASM_GPR_NUMS                                  \
 "      .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" \
 "      .equ    .L__gpr_num_x\\num, \\num\n"                    \
+"      .equ    .L__gpr_num_w\\num, \\num\n"                    \
 "      .endr\n"                                                \
-"      .equ    .L__gpr_num_xzr, 31\n"
+"      .equ    .L__gpr_num_xzr, 31\n"                          \
+"      .equ    .L__gpr_num_wzr, 31\n"
 
 #endif /* __ASSEMBLY__ */