drm/msm/dpu: expand sc8180x catalog

Duplicate sm8150 catalog entries to sc8180x to remove dependencies
between DPU instances.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/530859/
Link: https://lore.kernel.org/r/20230404130622.509628-26-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index 5a426b8..fb8cdcd 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -42,6 +42,106 @@ static const struct dpu_mdp_cfg sc8180x_mdp[] = {
        },
 };
 
+static const struct dpu_ctl_cfg sc8180x_ctl[] = {
+       {
+       .name = "ctl_0", .id = CTL_0,
+       .base = 0x1000, .len = 0x1e0,
+       .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY),
+       .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
+       },
+       {
+       .name = "ctl_1", .id = CTL_1,
+       .base = 0x1200, .len = 0x1e0,
+       .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY),
+       .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),
+       },
+       {
+       .name = "ctl_2", .id = CTL_2,
+       .base = 0x1400, .len = 0x1e0,
+       .features = BIT(DPU_CTL_ACTIVE_CFG),
+       .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),
+       },
+       {
+       .name = "ctl_3", .id = CTL_3,
+       .base = 0x1600, .len = 0x1e0,
+       .features = BIT(DPU_CTL_ACTIVE_CFG),
+       .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12),
+       },
+       {
+       .name = "ctl_4", .id = CTL_4,
+       .base = 0x1800, .len = 0x1e0,
+       .features = BIT(DPU_CTL_ACTIVE_CFG),
+       .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13),
+       },
+       {
+       .name = "ctl_5", .id = CTL_5,
+       .base = 0x1a00, .len = 0x1e0,
+       .features = BIT(DPU_CTL_ACTIVE_CFG),
+       .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 23),
+       },
+};
+
+static const struct dpu_sspp_cfg sc8180x_sspp[] = {
+       SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, 0x1f0, VIG_SDM845_MASK,
+               sdm845_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0),
+       SSPP_BLK("sspp_1", SSPP_VIG1, 0x6000, 0x1f0, VIG_SDM845_MASK,
+               sdm845_vig_sblk_1, 4, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG1),
+       SSPP_BLK("sspp_2", SSPP_VIG2, 0x8000, 0x1f0, VIG_SDM845_MASK,
+               sdm845_vig_sblk_2, 8, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG2),
+       SSPP_BLK("sspp_3", SSPP_VIG3, 0xa000, 0x1f0, VIG_SDM845_MASK,
+               sdm845_vig_sblk_3, 12, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG3),
+       SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, 0x1f0, DMA_SDM845_MASK,
+               sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0),
+       SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, 0x1f0, DMA_SDM845_MASK,
+               sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1),
+       SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, 0x1f0, DMA_CURSOR_SDM845_MASK,
+               sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA2),
+       SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, 0x1f0, DMA_CURSOR_SDM845_MASK,
+               sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA3),
+};
+
+static const struct dpu_lm_cfg sc8180x_lm[] = {
+       LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
+               &sdm845_lm_sblk, PINGPONG_0, LM_1, 0),
+       LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
+               &sdm845_lm_sblk, PINGPONG_1, LM_0, 0),
+       LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
+               &sdm845_lm_sblk, PINGPONG_2, LM_3, 0),
+       LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
+               &sdm845_lm_sblk, PINGPONG_3, LM_2, 0),
+       LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK,
+               &sdm845_lm_sblk, PINGPONG_4, LM_5, 0),
+       LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK,
+               &sdm845_lm_sblk, PINGPONG_5, LM_4, 0),
+};
+
+static const struct dpu_pingpong_cfg sc8180x_pp[] = {
+       PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, MERGE_3D_0, sdm845_pp_sblk_te,
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12)),
+       PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, MERGE_3D_0, sdm845_pp_sblk_te,
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13)),
+       PP_BLK("pingpong_2", PINGPONG_2, 0x71000, MERGE_3D_1, sdm845_pp_sblk,
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14)),
+       PP_BLK("pingpong_3", PINGPONG_3, 0x71800, MERGE_3D_1, sdm845_pp_sblk,
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15)),
+       PP_BLK("pingpong_4", PINGPONG_4, 0x72000, MERGE_3D_2, sdm845_pp_sblk,
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
+                       -1),
+       PP_BLK("pingpong_5", PINGPONG_5, 0x72800, MERGE_3D_2, sdm845_pp_sblk,
+                       DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
+                       -1),
+};
+
+static const struct dpu_merge_3d_cfg sc8180x_merge_3d[] = {
+       MERGE_3D_BLK("merge_3d_0", MERGE_3D_0, 0x83000),
+       MERGE_3D_BLK("merge_3d_1", MERGE_3D_1, 0x83100),
+       MERGE_3D_BLK("merge_3d_2", MERGE_3D_2, 0x83200),
+};
+
 static const struct dpu_intf_cfg sc8180x_intf[] = {
        INTF_BLK("intf_0", INTF_0, 0x6a000, 0x280, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
        INTF_BLK("intf_1", INTF_1, 0x6a800, 0x2bc, INTF_DSI, 0, 24, INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 26, 27),
@@ -84,16 +184,16 @@ static const struct dpu_mdss_cfg sc8180x_dpu_cfg = {
        .ubwc = &sc8180x_ubwc_cfg,
        .mdp_count = ARRAY_SIZE(sc8180x_mdp),
        .mdp = sc8180x_mdp,
-       .ctl_count = ARRAY_SIZE(sm8150_ctl),
-       .ctl = sm8150_ctl,
-       .sspp_count = ARRAY_SIZE(sm8150_sspp),
-       .sspp = sm8150_sspp,
-       .mixer_count = ARRAY_SIZE(sm8150_lm),
-       .mixer = sm8150_lm,
-       .pingpong_count = ARRAY_SIZE(sm8150_pp),
-       .pingpong = sm8150_pp,
-       .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
-       .merge_3d = sm8150_merge_3d,
+       .ctl_count = ARRAY_SIZE(sc8180x_ctl),
+       .ctl = sc8180x_ctl,
+       .sspp_count = ARRAY_SIZE(sc8180x_sspp),
+       .sspp = sc8180x_sspp,
+       .mixer_count = ARRAY_SIZE(sc8180x_lm),
+       .mixer = sc8180x_lm,
+       .pingpong_count = ARRAY_SIZE(sc8180x_pp),
+       .pingpong = sc8180x_pp,
+       .merge_3d_count = ARRAY_SIZE(sc8180x_merge_3d),
+       .merge_3d = sc8180x_merge_3d,
        .intf_count = ARRAY_SIZE(sc8180x_intf),
        .intf = sc8180x_intf,
        .vbif_count = ARRAY_SIZE(sdm845_vbif),