Document 68hc11 & 68hc12 port

From-SVN: r36393

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ef68665..39e07b2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2000-09-13  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
+
+       * md.texi (Machine Constraints): Document the 68HC11 constraints.
+       * install.texi (Configurations): Document the 68HC11&68HC12 port.
+       * invoke.texi (Option Summary, M68hc1x Options): Document the options.
+
 Tue Sep 12 13:51:13 2000  Denis Chertykov  <denisc@overta.ru>
 
        * config/avr/avr.h (ASSEMBLER_DIALECT): New macro declared.

diff --git a/gcc/install.texi b/gcc/install.texi
index bd365fe..10b6e94 100644 (file)
--- a/gcc/install.texi
+++ b/gcc/install.texi
@@ -751,9 +751,9 @@ Here are the possible CPU types:
 @c gmicro, fx80, spur and tahoe omitted since they don't work.
 1750a, a29k, alpha, arm, avr, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
 hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860, i960, m32r,
-m68000, m68k, m88k, mcore, mips, mipsel, mips64, mips64el, mn10200, mn10300,
-ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc, sparclite,
-sparc64, v850, vax, we32k.
+m68000, m68k, m6811, m6812, m88k, mcore, mips, mipsel, mips64, mips64el,
+mn10200, mn10300, ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc,
+sparclite, sparc64, v850, vax, we32k.
 @end quotation
 
 Here are the recognized company names.  As you can see, customary
@@ -1343,6 +1343,14 @@ point traps inherently cannot work with the FPA.
 See @ref{Sun Install}, for information on installing GNU CC on Sun
 systems.
 
+@item m6811-elf
+Motorola 68HC11 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+@item m6812-elf
+Motorola 68HC12 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
 @item m88k-*-svr3
 Motorola m88k running the AT&T/Unisoft/Motorola V.3 reference port.
 These systems tend to use the Green Hills C, revision 1.8.5, as the

diff --git a/gcc/invoke.texi b/gcc/invoke.texi
index 885978f..acd8c53 100644 (file)
--- a/gcc/invoke.texi
+++ b/gcc/invoke.texi
@@ -233,6 +233,10 @@ in the following sections.
 -mfpa -mnobitfield  -mrtd  -mshort  -msoft-float  -mpcrel
 -malign-int -mstrict-align
 
+@emph{M68hc1x Options}
+-m6811  -m6812  -m68hc11  -m68hc12
+-mauto-incdec  -mshort  -msoft-reg-count=@var{count}
+
 @emph{VAX Options}
 -mg  -mgnu  -munix
 
@@ -2360,6 +2364,9 @@ standard error.
 Annotate the assembler output with a comment indicating which
 pattern and alternative was used.  The length of each instruction is
 also printed.
+@item P
+Dump the RTL in the assembler output as a comment before each instruction.
+Also turns on @samp{-dp} annotation.
 @item v
 For each of the other indicated dump files (except for
 @file{@var{file}.00.rtl}), dump a representation of the control flow graph
@@ -3889,6 +3896,7 @@ that macro, which enables you to change the defaults.
 
 @menu
 * M680x0 Options::
+* M68hc1x Options::
 * VAX Options::
 * SPARC Options::
 * Convex Options::
@@ -4069,6 +4077,41 @@ the system.
 
 @end table
 
+@node M68hc1x Options
+@subsection M68hc1x Options
+@cindex M68hc1x options
+
+These are the @samp{-m} options defined for the 68hc11 and 68hc12
+microcontrollers.  The default values for these options depends on 
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
+
+@table @code
+@item -m6811
+@itemx -m68hc11
+Generate output for a 68HC11.  This is the default
+when the compiler is configured for 68HC11-based systems.
+
+@item -m6812
+@itemx -m68hc12
+Generate output for a 68HC12.  This is the default
+when the compiler is configured for 68HC12-based systems.
+
+@item -mauto-incdec
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
+
+@item -mshort
+Consider type @code{int} to be 16 bits wide, like @code{short int}.
+
+@item -msoft-reg-count=@var{count}
+Specify the number of pseudo-soft registers which are used for the
+code generation.  The maximum number is 32.  Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
+
+@end table
+
 @node VAX Options
 @subsection VAX Options
 @cindex VAX options

diff --git a/gcc/md.texi b/gcc/md.texi
index 111b991..3b77c4b 100644 (file)
--- a/gcc/md.texi
+++ b/gcc/md.texi
@@ -1660,6 +1660,64 @@ Floating point constant that is not a 68881 constant
 Floating point constant that can be used by Sun FPA
 @end table
 
+@item Motorola 68HC11 & 68HC12 families---@file{m68hc11.h}
+@table @code
+@item a
+Register 'a'
+
+@item b
+Register 'b'
+
+@item d
+Register 'd'
+
+@item q
+An 8-bit register
+
+@item t
+Temporary soft register _.tmp
+
+@item u
+A soft register _.d1 to _.d31
+
+@item w
+Stack pointer register
+
+@item x
+Register 'x'
+
+@item y
+Register 'y'
+
+@item z
+Pseudo register 'z' (replaced by 'x' or 'y' at the end)
+
+@item A
+An address register: x, y or z
+
+@item B
+An address register: x or y
+
+@item D
+Register pair (x:d) to form a 32-bit value
+
+@item L
+Constants in the range -65536 to 65535
+
+@item M
+Constants whose 16-bit low part is zero
+
+@item N
+Constant integer 1 or -1
+
+@item O
+Constant integer 16
+
+@item P
+Constants in the range -8 to 2
+
+@end table
+
 @need 1000
 @item SPARC---@file{sparc.h}
 @table @code