test: unittest: hal-api-power-unittest when building package 85/276385/3
authorChanwoo Choi <cw00.choi@samsung.com>
Tue, 14 Jun 2022 04:28:41 +0000 (13:28 +0900)
committerChanwoo Choi <cw00.choi@samsung.com>
Tue, 21 Jun 2022 01:30:09 +0000 (10:30 +0900)
Add new hal-api-power unittest code in order to
test the hal-api-power functions when building package.

Change-Id: Ide409a1a197971589fa364c1ed7ac0fe1673c2b0
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
CMakeLists.txt
packaging/hal-api-power.spec
tests/CMakeLists.txt [new file with mode: 0644]
tests/unittest/CMakeLists.txt [new file with mode: 0644]
tests/unittest/test-hal-api-power.cc [new file with mode: 0644]
tests/unittest/test-main.cc [new file with mode: 0644]

index c44e9b4..5658519 100644 (file)
@@ -1,5 +1,5 @@
 CMAKE_MINIMUM_REQUIRED(VERSION 2.6)
-PROJECT(hal-api-power C)
+PROJECT(hal-api-power)
 
 SET(VERSION_MAJOR 0)
 SET(VERSION "${VERSION_MAJOR}.1.0")
@@ -47,3 +47,5 @@ INSTALL(DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/include/
        FILES_MATCHING PATTERN "*.h")
 INSTALL(FILES ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_NAME}.pc
        DESTINATION ${LIBDIR}/pkgconfig)
+
+ADD_SUBDIRECTORY(tests)
index f280309..07b2aa0 100644 (file)
@@ -17,6 +17,7 @@ Requires(postun): /sbin/ldconfig
 BuildRequires: cmake
 BuildRequires: pkgconfig(dlog)
 BuildRequires: pkgconfig(hal-api-common)
+BuildRequires: pkgconfig(gmock)
 
 %description
 %{name} interface
@@ -40,6 +41,9 @@ cmake . -DCMAKE_INSTALL_PREFIX=%{_prefix} -DCMAKE_LIBDIR_PREFIX=%{_libdir}
 cp %{SOURCE1} .
 make %{?jobs:-j%jobs}
 
+%check
+(cd tests/unittest && LD_LIBRARY_PATH=../../ ctest -V)
+
 %install
 rm -rf %{buildroot}
 %make_install
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
new file mode 100644 (file)
index 0000000..7e297a2
--- /dev/null
@@ -0,0 +1 @@
+ADD_SUBDIRECTORY(unittest)
diff --git a/tests/unittest/CMakeLists.txt b/tests/unittest/CMakeLists.txt
new file mode 100644 (file)
index 0000000..39fc0f2
--- /dev/null
@@ -0,0 +1,28 @@
+ENABLE_TESTING()
+SET(HAL_HAL_API_POWER_UNITTEST "hal-api-power-unittest")
+
+SET(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -g -Wall -Werror")
+SET(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${EXTRA_CFLAGS} -std=c++14 -Wall -Werror")
+
+AUX_SOURCE_DIRECTORY(${CMAKE_CURRENT_SOURCE_DIR}/ UNITTEST_SRCS)
+ADD_EXECUTABLE(${HAL_HAL_API_POWER_UNITTEST} ${UNITTEST_SRCS})
+
+TARGET_INCLUDE_DIRECTORIES(${HAL_HAL_API_POWER_UNITTEST} PUBLIC
+       "${CMAKE_CURRENT_SOURCE_DIR}/../../include"
+)
+
+INCLUDE(FindPkgConfig)
+pkg_check_modules(hal_api_power_unittest_pkgs REQUIRED gmock)
+
+FOREACH(flag ${hal_HAL_API_POWER_unittest_pkgs_CFLAGS})
+       SET(EXTRA_CFLAGS "${EXTRA_CFLAGS} ${flag}")
+ENDFOREACH(flag)
+
+TARGET_LINK_LIBRARIES(${HAL_HAL_API_POWER_UNITTEST} ${hal_api_power_unittest_pkgs_LDFLAGS} ${PROJECT_NAME})
+SET_TARGET_PROPERTIES(${HAL_HAL_API_POWER_UNITTEST} PROPERTIES COMPILE_FLAGS "-fPIE -fvisibility=default")
+SET_TARGET_PROPERTIES(${HAL_HAL_API_POWER_UNITTEST} PROPERTIES LINK_FLAGS "-pie")
+
+ADD_TEST(
+       NAME ${HAL_HAL_API_POWER_UNITTEST}
+       COMMAND ${HAL_HAL_API_POWER_UNITTEST}
+)
diff --git a/tests/unittest/test-hal-api-power.cc b/tests/unittest/test-hal-api-power.cc
new file mode 100644 (file)
index 0000000..bf444df
--- /dev/null
@@ -0,0 +1,432 @@
+/*
+ * Copyright (c) 2022 Samsung Electronics Co., Ltd.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+#include <gmock/gmock.h>
+
+#include <hal/hal-common.h>
+#include <hal/hal-common-interface.h>
+
+#include "hal-power.h"
+#include "hal-power-interface.h"
+
+#define ARRAY_SIZE(name)               (int)(sizeof(name)/sizeof(name[0]))
+
+#define MAX_BUFF                       255
+#define DEFAULT_FREQ                   1000000
+#define DEFAULT_FAULT_AROUND_BYTES     4096
+
+class HalApiPowerTest : public testing::Test {
+       public:
+               HalApiPowerTest() {}
+               virtual ~HalApiPowerTest() {}
+               virtual void SetUp() {}
+               virtual void TearDown() {}
+};
+
+static int resources[] = {
+       PASS_RESOURCE_CPU_ID,
+       PASS_RESOURCE_BUS_ID,
+       PASS_RESOURCE_GPU_ID,
+       PASS_RESOURCE_MEMORY_ID,
+};
+
+static int test_begin(void)
+{
+       int ret, i;
+
+       for (i = 0; i < ARRAY_SIZE(resources); i++) {
+               ret = hal_power_get_backend(resources[i]);
+               if (ret < 0)
+                       return ret;
+       }
+
+       return 0;
+}
+
+static int test_end(void)
+{
+       int ret, i;
+
+       for (i = 0; i < ARRAY_SIZE(resources); i++) {
+               ret = hal_power_put_backend();
+               if (ret < 0)
+                       return ret;
+       }
+
+       return 0;
+}
+
+TEST(HalApiPowerTest, hal_power_get_backend_with_cpu_id) {
+       int ret = hal_power_get_backend(PASS_RESOURCE_CPU_ID);
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_put_backend();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_get_backend_with_bus_id) {
+       int ret = hal_power_get_backend(PASS_RESOURCE_BUS_ID);
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_put_backend();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_get_backend_with_gpu_id) {
+       int ret = hal_power_get_backend(PASS_RESOURCE_GPU_ID);
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_put_backend();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_get_backend_with_memory_id) {
+       int ret = hal_power_get_backend(PASS_RESOURCE_MEMORY_ID);
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_put_backend();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_get_backend_with_nonstandard_id) {
+       int ret = hal_power_get_backend(PASS_RESOURCE_NONSTANDARD_ID);
+       EXPECT_TRUE(ret != 0);
+
+       ret = hal_power_put_backend();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_curr_governor_valid) {
+       int ret;
+       char governor[MAX_BUFF];
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_CPU_ID, res_name, governor);
+       EXPECT_TRUE(ret == 0);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_BUS_ID, res_name, governor);
+       EXPECT_TRUE(ret == 0);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_GPU_ID, res_name, governor);
+       EXPECT_TRUE(ret == 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_curr_governor_invalid) {
+       int ret;
+       char governor[MAX_BUFF];
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_CPU_ID, NULL, governor);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_CPU_ID, res_name, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_BUS_ID, NULL, governor);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_BUS_ID, res_name, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_GPU_ID, NULL, governor);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_GPU_ID, res_name, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_MEMORY_ID, res_name, governor);
+       EXPECT_TRUE(ret == -EPERM);
+       ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_NONSTANDARD_ID, res_name, governor);
+       EXPECT_TRUE(ret == -EPERM);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_curr_freq_valid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_CPU_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_BUS_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_GPU_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_curr_freq_invalid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_UNKNOWN, res_name);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_UNKNOWN, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_CPU_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_BUS_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_GPU_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_MEMORY_ID, res_name);
+       EXPECT_TRUE(ret == -EPERM);
+       ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_NONSTANDARD_ID, res_name);
+       EXPECT_TRUE(ret == -EPERM);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_min_freq_valid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_CPU_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_BUS_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_GPU_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_min_freq_invalid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_UNKNOWN, res_name);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_UNKNOWN, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_CPU_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_BUS_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_GPU_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_MEMORY_ID, res_name);
+       EXPECT_TRUE(ret == -EPERM);
+       ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_NONSTANDARD_ID, res_name);
+       EXPECT_TRUE(ret == -EPERM);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_max_freq_valid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_CPU_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_BUS_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_GPU_ID, res_name);
+       EXPECT_TRUE(ret > 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_get_max_freq_invalid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_UNKNOWN, res_name);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_UNKNOWN, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_CPU_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_BUS_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_GPU_ID, NULL);
+       EXPECT_TRUE(ret == -EINVAL);
+
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_MEMORY_ID, res_name);
+       EXPECT_TRUE(ret == -EPERM);
+       ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_NONSTANDARD_ID, res_name);
+       EXPECT_TRUE(ret == -EPERM);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_set_min_freq_valid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_CPU_ID, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret == 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_BUS_ID, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret == 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_GPU_ID, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret == 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_set_min_freq_invalid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_UNKNOWN, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_UNKNOWN, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_UNKNOWN, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_CPU_ID, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_CPU_ID, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_BUS_ID, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_BUS_ID, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_GPU_ID, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_GPU_ID, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_MEMORY_ID, res_name, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_NONSTANDARD_ID, res_name, 0);
+       EXPECT_TRUE(ret != 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_set_max_freq_valid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_CPU_ID, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret == 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_BUS_ID, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret == 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_GPU_ID, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret == 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_dvfs_set_max_freq_invalid) {
+       int ret;
+       char res_name[] = "resource_name";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_UNKNOWN, res_name, DEFAULT_FREQ);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_UNKNOWN, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_UNKNOWN, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_CPU_ID, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_CPU_ID, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_BUS_ID, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_BUS_ID, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_GPU_ID, res_name, -1);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_GPU_ID, NULL, 0);
+       EXPECT_TRUE(ret != 0);
+
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_MEMORY_ID, res_name, 0);
+       EXPECT_TRUE(ret != 0);
+       ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_NONSTANDARD_ID, res_name, 0);
+       EXPECT_TRUE(ret != 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_memory_set_fault_around_bytes_valid) {
+       int ret;
+       char res_name[] = "memory";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_memory_set_fault_around_bytes(PASS_RESOURCE_MEMORY_ID, res_name, DEFAULT_FAULT_AROUND_BYTES);
+       EXPECT_TRUE(ret == 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
+
+TEST(HalApiPowerTest, hal_power_memory_set_fault_around_bytes_invalid) {
+       int ret;
+       char res_name[] = "memory";
+
+       ret = test_begin();
+       EXPECT_TRUE(ret == 0);
+
+       ret = hal_power_memory_set_fault_around_bytes(PASS_RESOURCE_MEMORY_ID, res_name, 0);
+       EXPECT_TRUE(ret != 0);
+
+       ret = hal_power_memory_set_fault_around_bytes(PASS_RESOURCE_MEMORY_ID, res_name, 6000);
+       EXPECT_TRUE(ret != 0);
+
+       ret = test_end();
+       EXPECT_TRUE(ret == 0);
+}
diff --git a/tests/unittest/test-main.cc b/tests/unittest/test-main.cc
new file mode 100644 (file)
index 0000000..44fb148
--- /dev/null
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2022 Samsung Electronics Co., Ltd.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+#include <gmock/gmock.h>
+
+int main(int argc, char** argv) {
+       int ret = -1;
+
+       try {
+               testing::InitGoogleTest(&argc, argv);
+       } catch(...) {
+               std::cout << "Exception occurred" << std::endl;
+       }
+
+       try {
+               ret = RUN_ALL_TESTS();
+       } catch (const ::testing::internal::GoogleTestFailureException& e) {
+               ret = -1;
+               std::cout << "GoogleTestFailureException was thrown:" << e.what() << std::endl;
+       }
+
+       return ret;
+}