[media] lgdt3305: add support for fixed tp clock mode
authorMichael Ira Krufky <mkrufky@linuxtv.org>
Sun, 21 Dec 2014 21:54:50 +0000 (18:54 -0300)
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>
Thu, 29 Jan 2015 20:32:01 +0000 (18:32 -0200)
Add support for controlling TP clock mode for VSB and QAM annex-B/C mode.
Gated clock mode is the default value, and does not support QAM annex-C.
The patch enables setting this control to fixed clock mode.

Signed-off-by: Michael Ira Krufky <mkrufky@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
drivers/media/dvb-frontends/lgdt3305.c
drivers/media/dvb-frontends/lgdt3305.h

index 13dddaf..d08570a 100644 (file)
@@ -241,6 +241,7 @@ static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state)
        u8 val;
        int ret;
        enum lgdt3305_tp_clock_edge edge = state->cfg->tpclk_edge;
+       enum lgdt3305_tp_clock_mode mode = state->cfg->tpclk_mode;
        enum lgdt3305_tp_valid_polarity valid = state->cfg->tpvalid_polarity;
 
        lg_dbg("edge = %d, valid = %d\n", edge, valid);
@@ -253,6 +254,8 @@ static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state)
 
        if (edge)
                val |= 0x08;
+       if (mode)
+               val |= 0x40;
        if (valid)
                val |= 0x01;
 
index d9ab556..9c03e53 100644 (file)
@@ -37,6 +37,11 @@ enum lgdt3305_tp_clock_edge {
        LGDT3305_TPCLK_FALLING_EDGE = 1,
 };
 
+enum lgdt3305_tp_clock_mode {
+       LGDT3305_TPCLK_GATED = 0,
+       LGDT3305_TPCLK_FIXED = 1,
+};
+
 enum lgdt3305_tp_valid_polarity {
        LGDT3305_TP_VALID_LOW = 0,
        LGDT3305_TP_VALID_HIGH = 1,
@@ -70,6 +75,7 @@ struct lgdt3305_config {
 
        enum lgdt3305_mpeg_mode mpeg_mode;
        enum lgdt3305_tp_clock_edge tpclk_edge;
+       enum lgdt3305_tp_clock_mode tpclk_mode;
        enum lgdt3305_tp_valid_polarity tpvalid_polarity;
        enum lgdt_demod_chip_type demod_chip;
 };