ARM: shmobile: bockw: add SMSC ethernet support

This patch adds SMSC ethernet support on Bock-W

Bock-W SMSC needs FPGA settings which enables interrupt.
This patch does it on bockw_init() function.
As notes for future, this FPGA settings should be updated,
since this FPGA is using cascaded interrupt.
Current code is assuming that this FPGA interrupt user is only SMSC.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 549e059..1a517e2 100644 (file)
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -133,6 +133,7 @@ config MACH_BOCKW
        bool "BOCK-W platform"
        depends on ARCH_R8A7778
        select ARCH_REQUIRE_GPIOLIB
+       select RENESAS_INTC_IRQPIN
        select USE_OF
 
 config MACH_MARZEN

diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index 56ab56e..38e5e50 100644 (file)
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -19,14 +19,52 @@
  */
 
 #include <linux/platform_device.h>
+#include <linux/smsc911x.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <mach/r8a7778.h>
 #include <asm/mach/arch.h>
 
+static struct smsc911x_platform_config smsc911x_data = {
+       .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+       .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
+       .flags          = SMSC911X_USE_32BIT,
+       .phy_interface  = PHY_INTERFACE_MODE_MII,
+};
+
+static struct resource smsc911x_resources[] = {
+       DEFINE_RES_MEM(0x18300000, 0x1000),
+       DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
+};
+
+#define IRQ0MR 0x30
 static void __init bockw_init(void)
 {
+       void __iomem *fpga;
+
        r8a7778_clock_init();
+       r8a7778_init_irq_extpin(1);
        r8a7778_add_standard_devices();
+
+       fpga = ioremap_nocache(0x18200000, SZ_1M);
+       if (fpga) {
+               /*
+                * CAUTION
+                *
+                * IRQ0/1 is cascaded interrupt from FPGA.
+                * it should be cared in the future
+                * Now, it is assuming IRQ0 was used only from SMSC.
+                */
+               u16 val = ioread16(fpga + IRQ0MR);
+               val &= ~(1 << 4); /* enable SMSC911x */
+               iowrite16(val, fpga + IRQ0MR);
+               iounmap(fpga);
+
+               platform_device_register_resndata(
+                       &platform_bus, "smsc911x", -1,
+                       smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
+                       &smsc911x_data, sizeof(smsc911x_data));
+       }
 }
 
 static const char *bockw_boards_compat_dt[] __initdata = {