arm64: dts: qcom: sm6115: Move SDHC node(s)'s 'pinctrl' properties to dts

Normally the 'pinctrl' properties of a SDHC controller and the
chip detect pin settings are dependent on the type of the slots
(for e.g uSD card slot), regulators and GPIO(s) available on the
board(s).

So, move the same from the sm6115 dtsi file to the respective
board file(s).

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314074001.1873781-1-bhupesh.sharma@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
index 3f39f25..a1f0622 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
+++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
@@ -202,12 +202,22 @@
        vqmmc-supply = <&vreg_l5a>;
 
        cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&sdc2_state_on &sdc2_card_det_n>;
+       pinctrl-1 = <&sdc2_state_off &sdc2_card_det_n>;
 
        status = "okay";
 };
 
 &tlmm {
        gpio-reserved-ranges = <14 4>;
+
+       sdc2_card_det_n: sd-card-det-n-state {
+               pins = "gpio88";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-pull-up;
+       };
 };
 
 &ufs_mem_hc {

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index fdad0f1..840a453 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -603,13 +603,6 @@
                                        bias-pull-up;
                                        drive-strength = <10>;
                                };
-
-                               sd-cd-pins {
-                                       pins = "gpio88";
-                                       function = "gpio";
-                                       bias-pull-up;
-                                       drive-strength = <2>;
-                               };
                        };
 
                        sdc2_state_off: sdc2-off-state {
@@ -630,13 +623,6 @@
                                        bias-pull-up;
                                        drive-strength = <2>;
                                };
-
-                               sd-cd-pins {
-                                       pins = "gpio88";
-                                       function = "gpio";
-                                       bias-disable;
-                                       drive-strength = <2>;
-                               };
                        };
                };
 
@@ -739,10 +725,6 @@
                                 <&gcc GCC_SDCC1_ICE_CORE_CLK>;
                        clock-names = "iface", "core", "xo", "ice";
 
-                       pinctrl-0 = <&sdc1_state_on>;
-                       pinctrl-1 = <&sdc1_state_off>;
-                       pinctrl-names = "default", "sleep";
-
                        bus-width = <8>;
                        status = "disabled";
                };
@@ -761,10 +743,6 @@
                                 <&rpmcc RPM_SMD_XO_CLK_SRC>;
                        clock-names = "iface", "core", "xo";
 
-                       pinctrl-0 = <&sdc2_state_on>;
-                       pinctrl-1 = <&sdc2_state_off>;
-                       pinctrl-names = "default", "sleep";
-
                        power-domains = <&rpmpd SM6115_VDDCX>;
                        operating-points-v2 = <&sdhc2_opp_table>;
                        iommus = <&apps_smmu 0x00a0 0x0>;