rcode = RCODE_TYPE_ERROR;
break;
+ case CSR_BUSY_TIMEOUT:
+ if (tcode == TCODE_READ_QUADLET_REQUEST)
+ *data = cpu_to_be32(card->driver->
+ read_csr_reg(card, CSR_BUSY_TIMEOUT));
+ else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
+ card->driver->write_csr_reg(card, CSR_BUSY_TIMEOUT,
+ be32_to_cpu(*data));
+ else
+ rcode = RCODE_TYPE_ERROR;
+ break;
+
case CSR_BROADCAST_CHANNEL:
if (tcode == TCODE_READ_QUADLET_REQUEST)
*data = cpu_to_be32(card->broadcast_channel);
BUG();
break;
- case CSR_BUSY_TIMEOUT:
- /* FIXME: Implement this. */
-
default:
rcode = RCODE_ADDRESS_ERROR;
break;
reg_write(ohci, OHCI1394_ATRetries,
OHCI1394_MAX_AT_REQ_RETRIES |
(OHCI1394_MAX_AT_RESP_RETRIES << 4) |
- (OHCI1394_MAX_PHYS_RESP_RETRIES << 8));
+ (OHCI1394_MAX_PHYS_RESP_RETRIES << 8) |
+ (200 << 16));
seconds = lower_32_bits(get_seconds());
reg_write(ohci, OHCI1394_IsochronousCycleTimer, seconds << 25);
spin_unlock_irqrestore(&ohci->lock, flags);
return value;
+ case CSR_BUSY_TIMEOUT:
+ value = reg_read(ohci, OHCI1394_ATRetries);
+ return (value >> 4) & 0x0ffff00f;
+
default:
WARN_ON(1);
return 0;
spin_unlock_irqrestore(&ohci->lock, flags);
break;
+ case CSR_BUSY_TIMEOUT:
+ value = (value & 0xf) | ((value & 0xf) << 4) |
+ ((value & 0xf) << 8) | ((value & 0x0ffff000) << 4);
+ reg_write(ohci, OHCI1394_ATRetries, value);
+ flush_writes(ohci);
+ break;
+
default:
WARN_ON(1);
break;