Merge branch 'CR_877_Timer_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'
authorandy.hu <andy.hu@starfivetech.com>
Sun, 24 Apr 2022 13:55:18 +0000 (13:55 +0000)
committerandy.hu <andy.hu@starfivetech.com>
Sun, 24 Apr 2022 13:55:18 +0000 (13:55 +0000)
risv:dts:starfive:Add timer clocktree

See merge request sdk/sft-riscvpi-linux-5.10!26


Trivial merge