drm/msm/dpu: Fix Wunused-const-variable

Clang produces the following warning

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:477:32: warning: unused
variable 'dpu_format_map_tile' [-Wunused-const-variable] static const
struct dpu_format dpu_format_map_tile[] = { ^

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:602:32: warning: unused
variable 'dpu_format_map_p010' [-Wunused-const-variable] static const
struct dpu_format dpu_format_map_p010[] = { ^

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:610:32: warning: unused
variable 'dpu_format_map_p010_ubwc' [-Wunused-const-variable] static
const struct dpu_format dpu_format_map_p010_ubwc[] = { ^

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c:619:32: warning: unused
variable 'dpu_format_map_tp10_ubwc' [-Wunused-const-variable] static
const struct dpu_format dpu_format_map_tp10_ubwc[] = { ^

Removing the unimplemented modifiers that cause the warning.

Cc: clang-built-linux@googlegroups.com
Link: https://github.com/ClangBuiltLinux/linux/issues/528
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
index f59fe1a..9a74cac 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
@@ -479,90 +479,6 @@ static const struct dpu_format dpu_format_map[] = {
 };
 
 /*
- * A5x tile formats tables:
- * These tables hold the A5x tile formats supported.
- */
-static const struct dpu_format dpu_format_map_tile[] = {
-       INTERLEAVED_RGB_FMT_TILED(BGR565,
-               0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT,
-               C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
-               false, 2, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(ARGB8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
-               true, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(ABGR8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
-               true, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(XBGR8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
-               false, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(RGBA8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
-               true, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(BGRA8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
-               true, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(BGRX8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
-               false, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(XRGB8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
-               false, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(RGBX8888,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
-               false, 4, 0,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(ABGR2101010,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
-               true, 4, DPU_FORMAT_FLAG_DX,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       INTERLEAVED_RGB_FMT_TILED(XBGR2101010,
-               COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
-               true, 4, DPU_FORMAT_FLAG_DX,
-               DPU_FETCH_UBWC, 1, DPU_TILE_HEIGHT_TILED),
-
-       PSEUDO_YUV_FMT_TILED(NV12,
-               0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C1_B_Cb, C2_R_Cr,
-               DPU_CHROMA_420, DPU_FORMAT_FLAG_YUV,
-               DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_NV12),
-
-       PSEUDO_YUV_FMT_TILED(NV21,
-               0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C2_R_Cr, C1_B_Cb,
-               DPU_CHROMA_420, DPU_FORMAT_FLAG_YUV,
-               DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_NV12),
-};
-
-/*
  * UBWC formats table:
  * This table holds the UBWC formats supported.
  * If a compression ratio needs to be used for this or any other format,
@@ -607,32 +523,6 @@ static const struct dpu_format dpu_format_map_ubwc[] = {
                DPU_FETCH_UBWC, 4, DPU_TILE_HEIGHT_NV12),
 };
 
-static const struct dpu_format dpu_format_map_p010[] = {
-       PSEUDO_YUV_FMT_LOOSE(NV12,
-               0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C1_B_Cb, C2_R_Cr,
-               DPU_CHROMA_420, (DPU_FORMAT_FLAG_YUV | DPU_FORMAT_FLAG_DX),
-               DPU_FETCH_LINEAR, 2),
-};
-
-static const struct dpu_format dpu_format_map_p010_ubwc[] = {
-       PSEUDO_YUV_FMT_LOOSE_TILED(NV12,
-               0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C1_B_Cb, C2_R_Cr,
-               DPU_CHROMA_420, (DPU_FORMAT_FLAG_YUV | DPU_FORMAT_FLAG_DX |
-                               DPU_FORMAT_FLAG_COMPRESSED),
-               DPU_FETCH_UBWC, 4, DPU_TILE_HEIGHT_NV12),
-};
-
-static const struct dpu_format dpu_format_map_tp10_ubwc[] = {
-       PSEUDO_YUV_FMT_TILED(NV12,
-               0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-               C1_B_Cb, C2_R_Cr,
-               DPU_CHROMA_420, (DPU_FORMAT_FLAG_YUV | DPU_FORMAT_FLAG_DX |
-                               DPU_FORMAT_FLAG_COMPRESSED),
-               DPU_FETCH_UBWC, 4, DPU_TILE_HEIGHT_NV12),
-};
-
 /* _dpu_get_v_h_subsample_rate - Get subsample rates for all formats we support
  *   Note: Not using the drm_format_*_subsampling since we have formats
  */