xilinx: Enable uartlite driver for Versal/ZynqMP
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Fri, 14 Aug 2020 09:02:17 +0000 (03:02 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 23 Sep 2020 08:31:40 +0000 (10:31 +0200)
Add CONFIG_XILINX_UARTLITE config to versal/zynqmp defconfig to
enable uartlite driver support by default.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
configs/xilinx_versal_virt_defconfig
configs/xilinx_zynqmp_virt_defconfig

index f9edc72..c84bf2e 100644 (file)
@@ -79,6 +79,7 @@ CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_ARM_DCC=y
 CONFIG_PL01X_SERIAL=y
+CONFIG_XILINX_UARTLITE=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
index 00a53f3..23d7ddf 100644 (file)
@@ -122,6 +122,7 @@ CONFIG_ZYNQ_GEM=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
 CONFIG_ARM_DCC=y
+CONFIG_XILINX_UARTLITE=y
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_SPI=y
 CONFIG_ZYNQ_SPI=y