bool "MCF5206"
depends on !MMU
select COLDFIRE_SW_A7
+ select COLDFIRE_TIMERS
select HAVE_MBAR
select CPU_NO_EFFICIENT_FFS
help
bool "MCF5206e"
depends on !MMU
select COLDFIRE_SW_A7
+ select COLDFIRE_TIMERS
select HAVE_MBAR
select CPU_NO_EFFICIENT_FFS
help
config M520x
bool "MCF520x"
depends on !MMU
- select GENERIC_CLOCKEVENTS
+ select COLDFIRE_PIT_TIMER
select HAVE_CACHE_SPLIT
help
Freescale Coldfire 5207/5208 processor support.
config M523x
bool "MCF523x"
depends on !MMU
- select GENERIC_CLOCKEVENTS
+ select COLDFIRE_PIT_TIMER
select HAVE_CACHE_SPLIT
select HAVE_IPSBAR
help
bool "MCF5249"
depends on !MMU
select COLDFIRE_SW_A7
+ select COLDFIRE_TIMERS
select HAVE_MBAR
select CPU_NO_EFFICIENT_FFS
help
bool "MCF525x"
depends on !MMU
select COLDFIRE_SW_A7
+ select COLDFIRE_TIMERS
select HAVE_MBAR
select CPU_NO_EFFICIENT_FFS
help
config M5271
bool "MCF5271"
depends on !MMU
+ select COLDFIRE_PIT_TIMER
select M527x
select HAVE_CACHE_SPLIT
select HAVE_IPSBAR
- select GENERIC_CLOCKEVENTS
help
Freescale (Motorola) ColdFire 5270/5271 processor support.
bool "MCF5272"
depends on !MMU
select COLDFIRE_SW_A7
+ select COLDFIRE_TIMERS
select HAVE_MBAR
select CPU_NO_EFFICIENT_FFS
help
config M5275
bool "MCF5275"
depends on !MMU
+ select COLDFIRE_PIT_TIMER
select M527x
select HAVE_CACHE_SPLIT
select HAVE_IPSBAR
- select GENERIC_CLOCKEVENTS
help
Freescale (Motorola) ColdFire 5274/5275 processor support.
config M528x
bool "MCF528x"
depends on !MMU
- select GENERIC_CLOCKEVENTS
+ select COLDFIRE_PIT_TIMER
select HAVE_CACHE_SPLIT
select HAVE_IPSBAR
help
config M5307
bool "MCF5307"
depends on !MMU
+ select COLDFIRE_TIMERS
select COLDFIRE_SW_A7
select HAVE_CACHE_CB
select HAVE_MBAR
config M532x
bool "MCF532x"
depends on !MMU
+ select COLDFIRE_TIMERS
select M53xx
select HAVE_CACHE_CB
help
config M537x
bool "MCF537x"
depends on !MMU
+ select COLDFIRE_TIMERS
select M53xx
select HAVE_CACHE_CB
help
bool "MCF5407"
depends on !MMU
select COLDFIRE_SW_A7
+ select COLDFIRE_TIMERS
select HAVE_CACHE_CB
select HAVE_MBAR
select CPU_NO_EFFICIENT_FFS
config M547x
bool "MCF547x"
select M54xx
+ select COLDFIRE_SLTIMERS
select MMU_COLDFIRE if MMU
select FPU if MMU
select HAVE_CACHE_CB
config M548x
bool "MCF548x"
+ select COLDFIRE_SLTIMERS
select MMU_COLDFIRE if MMU
select FPU if MMU
select M54xx
config M5441x
bool "MCF5441x"
+ select COLDFIRE_PIT_TIMER
select MMU_COLDFIRE if MMU
- select GENERIC_CLOCKEVENTS
select HAVE_CACHE_CB
help
Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
select HAVE_PCI
bool
+config COLDFIRE_PIT_TIMER
+ bool
+ select GENERIC_CLOCKEVENTS
+
+config COLDFIRE_TIMERS
+ bool
+ select LEGACY_TIMER_TICK
+
+config COLDFIRE_SLTIMERS
+ bool
+ select LEGACY_TIMER_TICK
+
endif # COLDFIRE
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o
-obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
-obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
-obj-$(CONFIG_M520x) += m520x.o pit.o intc-simr.o reset.o
-obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o
-obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
-obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
-obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
-obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
-obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
-obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
-obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
-obj-$(CONFIG_M5407) += m5407.o timers.o intc.o reset.o
-obj-$(CONFIG_M54xx) += m54xx.o sltimers.o intc-2.o
-obj-$(CONFIG_M5441x) += m5441x.o pit.o intc-simr.o reset.o
+obj-$(CONFIG_M5206) += m5206.o intc.o reset.o
+obj-$(CONFIG_M5206e) += m5206.o intc.o reset.o
+obj-$(CONFIG_M520x) += m520x.o intc-simr.o reset.o
+obj-$(CONFIG_M523x) += m523x.o dma_timer.o intc-2.o reset.o
+obj-$(CONFIG_M5249) += m5249.o intc.o intc-5249.o reset.o
+obj-$(CONFIG_M525x) += m525x.o intc.o intc-525x.o reset.o
+obj-$(CONFIG_M527x) += m527x.o intc-2.o reset.o
+obj-$(CONFIG_M5272) += m5272.o intc-5272.o
+obj-$(CONFIG_M528x) += m528x.o intc-2.o reset.o
+obj-$(CONFIG_M5307) += m5307.o intc.o reset.o
+obj-$(CONFIG_M53xx) += m53xx.o intc-simr.o reset.o
+obj-$(CONFIG_M5407) += m5407.o intc.o reset.o
+obj-$(CONFIG_M54xx) += m54xx.o intc-2.o
+obj-$(CONFIG_M5441x) += m5441x.o intc-simr.o reset.o
+
+obj-$(CONFIG_COLDFIRE_PIT_TIMER) += pit.o
+obj-$(CONFIG_COLDFIRE_TIMERS) += timers.o
+obj-$(CONFIG_COLDFIRE_SLTIMERS) += sltimers.o
obj-$(CONFIG_NETtel) += nettel.o
obj-$(CONFIG_CLEOPATRA) += nettel.o
static u32 mcfslt_cycles_per_jiffy;
static u32 mcfslt_cnt;
-static irq_handler_t timer_interrupt;
-
static irqreturn_t mcfslt_tick(int irq, void *dummy)
{
/* Reset Slice Timer 0 */
__raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
mcfslt_cnt += mcfslt_cycles_per_jiffy;
- return timer_interrupt(irq, dummy);
+ legacy_timer_tick(1);
+ return IRQ_HANDLED;
}
static u64 mcfslt_read_clk(struct clocksource *cs)
/* initialize mcfslt_cnt knowing that slice timers count down */
mcfslt_cnt = mcfslt_cycles_per_jiffy;
- timer_interrupt = handler;
r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL);
if (r) {
pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
static u32 mcftmr_cycles_per_jiffy;
static u32 mcftmr_cnt;
-static irq_handler_t timer_interrupt;
-
/***************************************************************************/
static void init_timer_irq(void)
__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
mcftmr_cnt += mcftmr_cycles_per_jiffy;
- return timer_interrupt(irq, dummy);
+ legacy_timer_tick(1);
+ return IRQ_HANDLED;
}
/***************************************************************************/
clocksource_register_hz(&mcftmr_clk, FREQ);
- timer_interrupt = handler;
init_timer_irq();
r = request_irq(MCF_IRQ_TIMER, mcftmr_tick, IRQF_TIMER, "timer", NULL);
if (r) {
projects / platform / kernel / linux-rpi.git / commitdiff