state->stencil_mask_misc.stencil_mask_back = zsa->stencil_mask_back;
state->stencil_mask_misc.stencil_enable = zsa->base.stencil[0].enabled;
state->stencil_mask_misc.alpha_to_coverage = alpha_to_coverage;
- state->stencil_mask_misc.alpha_test_compare_function = MALI_FUNC_ALWAYS;
+ state->stencil_mask_misc.alpha_test_compare_function = zsa->alpha_func;
state->stencil_mask_misc.depth_range_1 = rast->offset_tri;
state->stencil_mask_misc.depth_range_2 = rast->offset_tri;
state->stencil_mask_misc.single_sampled_lines = !rast->multisample;
state->stencil_back = zsa->stencil_back;
state->stencil_front.reference_value = ctx->stencil_ref.ref_value[0];
state->stencil_back.reference_value = ctx->stencil_ref.ref_value[back_enab ? 1 : 0];
+
+ /* v6+ fits register preload here, no alpha testing */
+ if (dev->arch <= 5)
+ state->alpha_reference = zsa->base.alpha_ref_value;
}
so->stencil_mask_back = so->stencil_mask_front;
}
- /* Alpha lowered by frontend */
- assert(!zsa->alpha_enabled);
+ so->alpha_func = zsa->alpha_enabled ?
+ panfrost_translate_compare_func(zsa->alpha_func) :
+ MALI_FUNC_ALWAYS;
/* TODO: Bounds test should be easy */
assert(!zsa->depth_bounds_test);
struct panfrost_zsa_state {
struct pipe_depth_stencil_alpha_state base;
+ enum mali_func alpha_func;
/* Precomputed stencil state */
struct MALI_STENCIL stencil_front;
case PIPE_CAP_MAX_VARYINGS:
return 16;
+ /* Removed in v6 (Bifrost) */
case PIPE_CAP_ALPHA_TEST:
+ return dev->arch <= 5;
+
case PIPE_CAP_FLATSHADE:
case PIPE_CAP_TWO_SIDED_COLOR:
case PIPE_CAP_CLIP_PLANES: