tests: Add core and strip tests for RISC-V

Signed-off-by: Andreas Schwab <schwab@suse.de>

diff --git a/tests/ChangeLog b/tests/ChangeLog
index f8b69be..70cc9b6 100644 (file)
--- a/tests/ChangeLog
+++ b/tests/ChangeLog
@@ -1,3 +1,15 @@
+2018-07-19  Andreas Schwab  <schwab@suse.de>
+
+       * Makefile.am (TESTS): Add run-strip-test12.sh.
+       (EXTRA_DIST): Add run-strip-test12.sh, testfile-riscv64.bz2,
+       testfile-riscv64-s.bz2, testfile-riscv64-core.bz2.
+       (run-strip-test11.sh): New file.
+       (testfile-riscv64.bz2): New file.
+       (testfile-riscv64-s.bz2): New file.
+       (testfile-riscv64-core.bz2): New file.
+       * run-allregs.sh: Add test for testfile-riscv64-core.
+       * run-readelf-mixed-corenote.sh: Likewise.
+
 2018-07-16  Ulf Hermann  <ulf.hermann@qt.io>
 
        * run-strip-reloc.sh: Remove previous testfiles before running the

diff --git a/tests/Makefile.am b/tests/Makefile.am
index ecc2d68..e04bd7d 100644 (file)
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -86,6 +86,7 @@ TESTS = run-arextract.sh run-arsymtest.sh run-ar.sh newfile test-nlist \
        run-strip-test3.sh run-strip-test4.sh run-strip-test5.sh \
        run-strip-test6.sh run-strip-test7.sh run-strip-test8.sh \
        run-strip-test9.sh run-strip-test10.sh run-strip-test11.sh \
+       run-strip-test12.sh \
        run-strip-nothing.sh run-strip-g.sh \
        run-strip-groups.sh run-strip-reloc.sh run-strip-strmerge.sh \
        run-strip-nobitsalign.sh run-strip-remove-keep.sh \
@@ -191,6 +192,7 @@ EXTRA_DIST = run-arextract.sh run-arsymtest.sh run-ar.sh \
             run-strip-test4.sh run-strip-test5.sh run-strip-test6.sh \
             run-strip-test7.sh run-strip-test8.sh run-strip-groups.sh \
             run-strip-test9.sh run-strip-test10.sh run-strip-test11.sh \
+            run-strip-test12.sh \
             run-strip-nothing.sh run-strip-remove-keep.sh run-strip-g.sh \
             run-strip-strmerge.sh run-strip-nobitsalign.sh \
             testfile-nobitsalign.bz2 testfile-nobitsalign.strip.bz2 \
@@ -397,7 +399,9 @@ EXTRA_DIST = run-arextract.sh run-arsymtest.sh run-ar.sh \
             run-attr-integrate-skel.sh \
             run-all-dwarf-ranges.sh testfilesplitranges4.debug.bz2 \
             testfile-ranges-hello.dwo.bz2 testfile-ranges-world.dwo.bz2 \
-            run-unit-info.sh run-next-cfi.sh run-next-cfi-self.sh
+            run-unit-info.sh run-next-cfi.sh run-next-cfi-self.sh \
+            testfile-riscv64.bz2 testfile-riscv64-s.bz2 \
+            testfile-riscv64-core.bz2
 
 if USE_VALGRIND
 valgrind_cmd='valgrind -q --leak-check=full --error-exitcode=1'

diff --git a/tests/run-allregs.sh b/tests/run-allregs.sh
index 7ddd452..1422bd6 100755 (executable)
--- a/tests/run-allregs.sh
+++ b/tests/run-allregs.sh
@@ -2902,4 +2902,75 @@ FPU registers:
         22: %fp6 (fp6), float 96 bits
         23: %fp7 (fp7), float 96 bits
 EOF
+
+# See run-readelf-mixed-corenote.sh for instructions to regenerate
+# this core file.
+regs_test testfile-riscv64-core <<\EOF
+integer registers:
+         0: zero (zero), signed 64 bits
+         1: ra (ra), address 64 bits
+         2: sp (sp), address 64 bits
+         3: gp (gp), address 64 bits
+         4: tp (tp), address 64 bits
+         5: t0 (t0), signed 64 bits
+         6: t1 (t1), signed 64 bits
+         7: t2 (t2), signed 64 bits
+         8: s0 (s0), signed 64 bits
+         9: s1 (s1), signed 64 bits
+        10: a0 (a0), signed 64 bits
+        11: a1 (a1), signed 64 bits
+        12: a2 (a2), signed 64 bits
+        13: a3 (a3), signed 64 bits
+        14: a4 (a4), signed 64 bits
+        15: a5 (a5), signed 64 bits
+        16: a6 (a6), signed 64 bits
+        17: a7 (a7), signed 64 bits
+        18: s2 (s2), signed 64 bits
+        19: s3 (s3), signed 64 bits
+        20: s4 (s4), signed 64 bits
+        21: s5 (s5), signed 64 bits
+        22: s6 (s6), signed 64 bits
+        23: s7 (s7), signed 64 bits
+        24: s8 (s8), signed 64 bits
+        25: s9 (s9), signed 64 bits
+        26: s10 (s10), signed 64 bits
+        27: s11 (s11), signed 64 bits
+        28: t3 (t3), signed 64 bits
+        29: t4 (t4), signed 64 bits
+        30: t5 (t5), signed 64 bits
+        31: t6 (t6), signed 64 bits
+FPU registers:
+        32: ft0 (ft0), float 64 bits
+        33: ft1 (ft1), float 64 bits
+        34: ft2 (ft2), float 64 bits
+        35: ft3 (ft3), float 64 bits
+        36: ft4 (ft4), float 64 bits
+        37: ft5 (ft5), float 64 bits
+        38: ft6 (ft6), float 64 bits
+        39: ft7 (ft7), float 64 bits
+        40: fs0 (fs0), float 64 bits
+        41: fs1 (fs1), float 64 bits
+        42: fa0 (fa0), float 64 bits
+        43: fa1 (fa1), float 64 bits
+        44: fa2 (fa2), float 64 bits
+        45: fa3 (fa3), float 64 bits
+        46: fa4 (fa4), float 64 bits
+        47: fa5 (fa5), float 64 bits
+        48: fa6 (fa6), float 64 bits
+        49: fa7 (fa7), float 64 bits
+        50: fs2 (fs2), float 64 bits
+        51: fs3 (fs3), float 64 bits
+        52: fs4 (fs4), float 64 bits
+        53: fs5 (fs5), float 64 bits
+        54: fs6 (fs6), float 64 bits
+        55: fs7 (fs7), float 64 bits
+        56: fs8 (fs8), float 64 bits
+        57: fs9 (fs9), float 64 bits
+        58: fs10 (fs10), float 64 bits
+        59: fs11 (fs11), float 64 bits
+        60: ft8 (ft8), float 64 bits
+        61: ft9 (ft9), float 64 bits
+        62: ft10 (ft10), float 64 bits
+        63: ft11 (ft11), float 64 bits
+EOF
 exit 0

diff --git a/tests/run-readelf-mixed-corenote.sh b/tests/run-readelf-mixed-corenote.sh
index 86171c4..07cfc39 100755 (executable)
--- a/tests/run-readelf-mixed-corenote.sh
+++ b/tests/run-readelf-mixed-corenote.sh
@@ -646,4 +646,74 @@ Note segment of 1056 bytes at offset 0x1f4:
     fp6: 0x7fff0000ffffffffffffffff  fp7: 0x7fff0000ffffffffffffffff
 EOF
 
+# To reproduce this core dump, do this on a riscv64 machine:
+# $ gcc -x c <(echo 'int main () { return *(int *)0x12345678; }')
+# $ ./a.out
+testfiles testfile-riscv64-core
+testrun_compare ${abs_top_builddir}/src/readelf -n testfile-riscv64-core <<\EOF
+
+Note segment of 1408 bytes at offset 0x388:
+  Owner          Data size  Type
+  CORE                 376  PRSTATUS
+    info.si_signo: 11, info.si_code: 0, info.si_errno: 0, cursig: 11
+    sigpend: <>
+    sighold: <>
+    pid: 6801, ppid: 1155, pgrp: 6801, sid: 1155
+    utime: 0.000000, stime: 0.110000, cutime: 0.000000, cstime: 0.000000
+    fpvalid: 0
+    ra:    0x9a00000000000104  sp:    0x400000002000051c
+    gp:    0x280000003fff9812  tp:    0xd000000000000128
+    t0:   5764607523571106577  t1:   -432345563690696255
+    t2:  -5764607522497362661  s0:   5764607523034235171
+    s1:  -6629298650415654894  a0:     72057594037928196
+    a1:  -6341068275337658368  a2:  -5188146769657096173
+    a3:            1073715219  a4:   8646911284551352320
+    a5:   8646911285625067538  a6:   1729382256911463510
+    a7:             536876397  s2:  -1152921504606846976
+    s3:   1152921505322686797  s4:             536871337
+    s5:  -3458764513820540928  s6:  -9223372036138925403
+    s7:             715843991  s8:  -2594073385365405696
+    s9:   4611686019143218592  s10:            715850259
+    s11:            715850393  t3:   -432345564227567616
+    t4:    144115188075856379  t5:    216172782113783808
+    t6:   1152921504606846976
+  CORE                 136  PRPSINFO
+    state: 0, sname: R, zomb: 0, nice: 0, flag: 0x0000000000400600
+    uid: 0, gid: 0, pid: 6801, ppid: 1155, pgrp: 6801, sid: 1155
+    fname: a.out, psargs: /tmp/a.out 
+  CORE                 128  SIGINFO
+    si_signo: 11, si_errno: 0, si_code: 1
+    fault address: 0x12345678
+  CORE                 288  AUXV
+    SYSINFO_EHDR: 0x200001d000
+    HWCAP: 0x1105
+    PAGESZ: 4096
+    CLKTCK: 100
+    PHDR: 0x10040
+    PHENT: 56
+    PHNUM: 9
+    BASE: 0x2000000000
+    FLAGS: 0
+    ENTRY: 0x103e0
+    UID: 0
+    EUID: 0
+    GID: 0
+    EGID: 0
+    SECURE: 0
+    RANDOM: 0x3fff9816d6
+    EXECFN: 0x3fff981fed
+    NULL
+  CORE                 379  FILE
+    9 files:
+      00010000-00011000 00000000 4096                /tmp/a.out
+      00011000-00012000 00000000 4096                /tmp/a.out
+      00012000-00013000 00001000 4096                /tmp/a.out
+      2000000000-200001a000 00000000 106496          /lib64/ld-2.27.so
+      200001a000-200001b000 00019000 4096            /lib64/ld-2.27.so
+      200001b000-200001c000 0001a000 4096            /lib64/ld-2.27.so
+      2000032000-2000151000 00000000 1175552         /lib64/libc-2.27.so
+      2000151000-2000155000 0011e000 16384           /lib64/libc-2.27.so
+      2000155000-2000157000 00122000 8192            /lib64/libc-2.27.so
+EOF
+
 exit 0

diff --git a/tests/run-strip-test12.sh b/tests/run-strip-test12.sh
new file mode 100755 (executable)
index 0000000..cb12098
--- /dev/null
+++ b/tests/run-strip-test12.sh
@@ -0,0 +1,4 @@
+original=testfile-riscv64
+stripped=testfile-riscv64-s
+
+. $srcdir/run-strip-test.sh

diff --git a/tests/testfile-riscv64-core.bz2 b/tests/testfile-riscv64-core.bz2
new file mode 100644 (file)
index 0000000..f5b472b
Binary files /dev/null and b/tests/testfile-riscv64-core.bz2 differ

diff --git a/tests/testfile-riscv64-s.bz2 b/tests/testfile-riscv64-s.bz2
new file mode 100755 (executable)
index 0000000..149ae41
Binary files /dev/null and b/tests/testfile-riscv64-s.bz2 differ

diff --git a/tests/testfile-riscv64.bz2 b/tests/testfile-riscv64.bz2
new file mode 100755 (executable)
index 0000000..cae4919
Binary files /dev/null and b/tests/testfile-riscv64.bz2 differ