anv: ensure descriptor addresses are used with bindless stages
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Tue, 25 Apr 2023 13:39:02 +0000 (16:39 +0300)
committerMarge Bot <emma+marge@anholt.net>
Tue, 30 May 2023 06:36:38 +0000 (06:36 +0000)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>

src/intel/vulkan/anv_nir_compute_push_layout.c

index 1f59482..4c1bbef 100644 (file)
@@ -177,6 +177,7 @@ anv_nir_compute_push_layout(nir_shader *nir,
                }
 
                case nir_intrinsic_load_desc_set_address_intel: {
+                  assert(brw_shader_stage_requires_bindless_resources(nir->info.stage));
                   b->cursor = nir_before_instr(&intrin->instr);
                   nir_ssa_def *pc_load = nir_load_uniform(b, 1, 32,
                      nir_imul_imm(b, intrin->src[0].ssa, sizeof(uint32_t)),