[Hexagon] Add patterns for shifts of v2i16

This fixes https://llvm.org/PR39983.

llvm-svn: 349202

diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td
index 0a7f578..311b5a7 100644 (file)
--- a/llvm/lib/Target/Hexagon/HexagonPatterns.td
+++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td
@@ -1170,6 +1170,18 @@ def: Pat<(srl V4I16:$b, (v4i16 (HexagonVSPLAT u4_0ImmPred:$c))),
 def: Pat<(shl V4I16:$b, (v4i16 (HexagonVSPLAT u4_0ImmPred:$c))),
          (S2_asl_i_vh V4I16:$b, imm:$c)>;
 
+def: Pat<(HexagonVASR V2I16:$Rs, u4_0ImmPred:$S),
+         (LoReg (S2_asr_i_vh (ToAext64 $Rs), imm:$S))>;
+def: Pat<(HexagonVASL V2I16:$Rs, u4_0ImmPred:$S),
+         (LoReg (S2_asl_i_vh (ToAext64 $Rs), imm:$S))>;
+def: Pat<(HexagonVLSR V2I16:$Rs, u4_0ImmPred:$S),
+         (LoReg (S2_lsr_i_vh (ToAext64 $Rs), imm:$S))>;
+def: Pat<(HexagonVASR V2I16:$Rs, I32:$Rt),
+         (LoReg (S2_asr_i_vh (ToAext64 $Rs), I32:$Rt))>;
+def: Pat<(HexagonVASL V2I16:$Rs, I32:$Rt),
+         (LoReg (S2_asl_i_vh (ToAext64 $Rs), I32:$Rt))>;
+def: Pat<(HexagonVLSR V2I16:$Rs, I32:$Rt),
+         (LoReg (S2_lsr_i_vh (ToAext64 $Rs), I32:$Rt))>;
 
 // --(9) Arithmetic/bitwise ----------------------------------------------
 //

diff --git a/llvm/test/CodeGen/Hexagon/isel-vlsr-v2i16.ll b/llvm/test/CodeGen/Hexagon/isel-vlsr-v2i16.ll
new file mode 100644 (file)
index 0000000..995ce06
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/isel-vlsr-v2i16.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; This used to crash with "cannot select" error.
+; CHECK: vlsrh(r1:0,#4)
+
+target triple = "hexagon-unknown-linux-gnu"
+
+define <2 x i16> @foo(<2 x i32>* nocapture %v) nounwind {
+  %vec = load <2 x i32>, <2 x i32>* %v, align 8
+  %trunc = trunc <2 x i32> %vec to <2 x i16>
+  %r = lshr <2 x i16> %trunc, <i16 4, i16 4>
+  ret <2 x i16> %r
+}
+
+attributes #0 = { nounwind "target-cpu"="hexagonv60" }
+