asahi: clang-format the world again
authorAsahi Lina <lina@asahilina.net>
Fri, 3 Mar 2023 13:01:45 +0000 (22:01 +0900)
committerMarge Bot <emma+marge@anholt.net>
Fri, 3 Mar 2023 22:55:59 +0000 (22:55 +0000)
Some things were missed (like winsys) and there's still some bad include
orders lying around and some other randomness.

We should set up CI checks for this soon... ^^;;

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21687>

src/asahi/compiler/agx_compile.c
src/asahi/lib/decode.c
src/asahi/lib/wrap.c
src/gallium/drivers/asahi/agx_state.c
src/gallium/winsys/asahi/drm/asahi_drm_winsys.c

index 6206960..2d69bac 100644 (file)
  * SOFTWARE.
  */
 
+#include "agx_compile.h"
 #include "compiler/nir/nir_builder.h"
 #include "compiler/nir_types.h"
 #include "util/glheader.h"
 #include "util/u_debug.h"
 #include "agx_builder.h"
-#include "agx_compile.h"
 #include "agx_compiler.h"
 #include "agx_internal_formats.h"
 
@@ -1122,7 +1122,8 @@ agx_emit_alu(agx_builder *b, nir_alu_instr *instr)
       return agx_asr_to(b, dst, s0, s1);
 
    case nir_op_extr_agx:
-      return agx_extr_to(b, dst, s0, s1, s2, nir_src_as_uint(instr->src[3].src));
+      return agx_extr_to(b, dst, s0, s1, s2,
+                         nir_src_as_uint(instr->src[3].src));
 
    case nir_op_bcsel:
       return agx_icmpsel_to(b, dst, s0, i0, s2, s1, AGX_ICOND_UEQ);
index 2f15a71..1379891 100644 (file)
 
 #include "decode.h"
 #include "hexdump.h"
-#ifdef  __APPLE__
+#ifdef __APPLE__
 #include "agx_iokit.h"
 #endif
 
-UNUSED static const char *agx_alloc_types[AGX_NUM_ALLOC] = {"mem", "map", "cmd"};
+UNUSED static const char *agx_alloc_types[AGX_NUM_ALLOC] = {"mem", "map",
+                                                            "cmd"};
 
 static void
 agx_disassemble(void *_code, size_t maxlen, FILE *fp)
index dca6519..188d93a 100644 (file)
 #include <mach/mach.h>
 
 #include "util/compiler.h"
+#include "agx_iokit.h"
 #include "decode.h"
 #include "dyld_interpose.h"
 #include "hexdump.h"
-#include "agx_iokit.h"
 #include "util.h"
 
 /*
index bd6073f..b8f8c9e 100644 (file)
@@ -23,6 +23,7 @@
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
+#include "agx_state.h"
 #include <errno.h>
 #include <stdio.h>
 #include "asahi/compiler/agx_compile.h"
@@ -51,7 +52,6 @@
 #include "util/u_prim.h"
 #include "util/u_resource.h"
 #include "util/u_transfer.h"
-#include "agx_state.h"
 #include "agx_disk_cache.h"
 
 static struct pipe_stream_output_target *
@@ -108,18 +108,18 @@ agx_set_stream_output_targets(struct pipe_context *pctx, unsigned num_targets,
 }
 
 static void
-agx_set_shader_images(
-        struct pipe_context *pctx,
-        enum pipe_shader_type shader,
-        unsigned start_slot, unsigned count, unsigned unbind_num_trailing_slots,
-        const struct pipe_image_view *iviews)
+agx_set_shader_images(struct pipe_context *pctx, enum pipe_shader_type shader,
+                      unsigned start_slot, unsigned count,
+                      unsigned unbind_num_trailing_slots,
+                      const struct pipe_image_view *iviews)
 {
    struct agx_context *ctx = agx_context(pctx);
    ctx->stage[shader].dirty = ~0;
 
    /* Unbind start_slot...start_slot+count */
    if (!iviews) {
-      for (int i = start_slot; i < start_slot + count + unbind_num_trailing_slots; i++) {
+      for (int i = start_slot;
+           i < start_slot + count + unbind_num_trailing_slots; i++) {
          pipe_resource_reference(&ctx->stage[shader].images[i].resource, NULL);
       }
 
@@ -137,34 +137,33 @@ agx_set_shader_images(
          ctx->stage[shader].image_mask &= ~BITFIELD_BIT(start_slot + i);
 
       if (!image->resource) {
-         util_copy_image_view(&ctx->stage[shader].images[start_slot+i], NULL);
+         util_copy_image_view(&ctx->stage[shader].images[start_slot + i], NULL);
          continue;
       }
 
       /* FIXME: Decompress here once we have texture compression */
-      util_copy_image_view(&ctx->stage[shader].images[start_slot+i], image);
+      util_copy_image_view(&ctx->stage[shader].images[start_slot + i], image);
    }
 
    /* Unbind start_slot+count...start_slot+count+unbind_num_trailing_slots */
    for (int i = 0; i < unbind_num_trailing_slots; i++) {
       ctx->stage[shader].image_mask &= ~BITFIELD_BIT(start_slot + count + i);
-      util_copy_image_view(&ctx->stage[shader].images[start_slot+count+i], NULL);
+      util_copy_image_view(&ctx->stage[shader].images[start_slot + count + i],
+                           NULL);
    }
 }
 
 static void
-agx_set_shader_buffers(
-        struct pipe_context *pctx,
-        enum pipe_shader_type shader,
-        unsigned start, unsigned count,
-        const struct pipe_shader_buffer *buffers,
-        unsigned writable_bitmask)
+agx_set_shader_buffers(struct pipe_context *pctx, enum pipe_shader_type shader,
+                       unsigned start, unsigned count,
+                       const struct pipe_shader_buffer *buffers,
+                       unsigned writable_bitmask)
 {
    struct agx_context *ctx = agx_context(pctx);
 
    util_set_shader_buffers_mask(ctx->stage[shader].ssbo,
-                                &ctx->stage[shader].ssbo_mask,
-                                buffers, start, count);
+                                &ctx->stage[shader].ssbo_mask, buffers, start,
+                                count);
 
    ctx->stage[shader].dirty = ~0;
 }
@@ -1245,12 +1244,14 @@ asahi_fs_shader_key_equal(const void *a, const void *b)
 }
 
 /* No compute variants */
-static uint32_t asahi_cs_shader_key_hash(const void *key)
+static uint32_t
+asahi_cs_shader_key_hash(const void *key)
 {
    return 0;
 }
 
-static bool asahi_cs_shader_key_equal(const void *a, const void *b)
+static bool
+asahi_cs_shader_key_equal(const void *a, const void *b)
 {
    return true;
 }
@@ -1604,7 +1605,7 @@ agx_create_compute_state(struct pipe_context *pctx,
    so->variants = _mesa_hash_table_create(NULL, asahi_cs_shader_key_hash,
                                           asahi_cs_shader_key_equal);
 
-   union asahi_shader_key key = { 0 };
+   union asahi_shader_key key = {0};
 
    assert(cso->ir_type == PIPE_SHADER_IR_NIR && "TGSI kernels unsupported");
    nir_shader *nir = nir_shader_clone(NULL, cso->prog);
index fc1c9ce..4730504 100644 (file)
@@ -23,8 +23,8 @@
  */
 
 #include <errno.h>
-#include <unistd.h>
 #include <fcntl.h>
+#include <unistd.h>
 
 #include "util/format/u_format.h"
 #include "util/os_file.h"
 #include "util/u_memory.h"
 #include "util/u_screen.h"
 
+#include "asahi/agx_public.h"
 #include "drm-uapi/drm.h"
 #include "renderonly/renderonly.h"
 #include "asahi_drm_public.h"
-#include "asahi/agx_public.h"
 
 static struct pipe_screen *
 asahi_screen_create(int fd, const struct pipe_screen_config *config,
@@ -47,13 +47,13 @@ asahi_screen_create(int fd, const struct pipe_screen_config *config,
 struct pipe_screen *
 asahi_drm_screen_create(int fd)
 {
-   return u_pipe_screen_lookup_or_create(os_dupfd_cloexec(fd), NULL,
-                                         NULL, asahi_screen_create);
+   return u_pipe_screen_lookup_or_create(os_dupfd_cloexec(fd), NULL, NULL,
+                                         asahi_screen_create);
 }
 
 struct pipe_screen *
 asahi_drm_screen_create_renderonly(struct renderonly *ro)
 {
-   return u_pipe_screen_lookup_or_create(os_dupfd_cloexec(ro->gpu_fd), NULL,
-                                         ro, asahi_screen_create);
+   return u_pipe_screen_lookup_or_create(os_dupfd_cloexec(ro->gpu_fd), NULL, ro,
+                                         asahi_screen_create);
 }