arch: arm64: dts: msm8996: Add CCI node

Add CCI controller node, which can be used to communicate with
camera sensors (I2C subset). MSM8996 CCI offers two masters,
i2c-bus@0 and i2c-bus@1.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1587470425-13726-2-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 2538083..fe91870 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1093,6 +1093,43 @@
                        };
                };
 
+               cci: cci@a0c000 {
+                       compatible = "qcom,msm8996-cci";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xa0c000 0x1000>;
+                       interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
+                       power-domains = <&mmcc CAMSS_GDSC>;
+                       clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
+                                <&mmcc CAMSS_CCI_AHB_CLK>,
+                                <&mmcc CAMSS_CCI_CLK>,
+                                <&mmcc CAMSS_AHB_CLK>;
+                       clock-names = "camss_top_ahb",
+                                     "cci_ahb",
+                                     "cci",
+                                     "camss_ahb";
+                       assigned-clocks = <&mmcc CAMSS_CCI_AHB_CLK>,
+                                         <&mmcc CAMSS_CCI_CLK>;
+                       assigned-clock-rates = <80000000>, <37500000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&cci0_default &cci1_default>;
+                       status = "disabled";
+
+                       cci_i2c0: i2c-bus@0 {
+                               reg = <0>;
+                               clock-frequency = <400000>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       cci_i2c1: i2c-bus@1 {
+                               reg = <1>;
+                               clock-frequency = <400000>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
+
                adreno_smmu: iommu@b40000 {
                        compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2";
                        reg = <0x00b40000 0x10000>;