[X86] Make the post machine scheduler macrofusion-aware.

Summary:
Given that X86 does not use this currently, this is an NFC. I'll
experiment with enabling and will report numbers.

Reviewers: andreadb, lebedev.ri

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60185

llvm-svn: 357568

diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index b40b8b6..89c5d2d 100644 (file)
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -355,6 +355,13 @@ public:
     return DAG;
   }
 
+  ScheduleDAGInstrs *
+  createPostMachineScheduler(MachineSchedContext *C) const override {
+    ScheduleDAGMI *DAG = createGenericSchedPostRA(C);
+    DAG->addMutation(createX86MacroFusionDAGMutation());
+    return DAG;
+  }
+
   void addIRPasses() override;
   bool addInstSelector() override;
   bool addIRTranslator() override;

diff --git a/llvm/test/CodeGen/X86/testb-je-fusion.ll b/llvm/test/CodeGen/X86/testb-je-fusion.ll
index 73e56d4..e631d89 100644 (file)
--- a/llvm/test/CodeGen/X86/testb-je-fusion.ll
+++ b/llvm/test/CodeGen/X86/testb-je-fusion.ll
@@ -72,8 +72,8 @@ define i32 @macrofuse_test_je(i32 %flags, i8* %p) nounwind {
 ; BRANCHFUSION_MISCHEDPOSTRA-LABEL: macrofuse_test_je:
 ; BRANCHFUSION_MISCHEDPOSTRA:       # %bb.0: # %entry
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    xorl %eax, %eax
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    testl $512, %edi # imm = 0x200
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
+; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    testl $512, %edi # imm = 0x200
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    je .LBB0_2
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:  # %bb.1: # %if.then
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movl $1, %eax
@@ -156,8 +156,8 @@ define i32 @macrofuse_cmp_je(i32 %flags, i8* %p) nounwind {
 ;
 ; BRANCHFUSION_MISCHEDPOSTRA-LABEL: macrofuse_cmp_je:
 ; BRANCHFUSION_MISCHEDPOSTRA:       # %bb.0: # %entry
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    cmpl $512, %edi # imm = 0x200
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
+; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    cmpl $512, %edi # imm = 0x200
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    je .LBB1_1
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:  # %bb.2: # %if.then
 ; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movl $1, %eax
@@ -246,16 +246,27 @@ define i32 @macrofuse_alu_je(i32 %flags, i8* %p) nounwind {
 ; NOFUSION_MISCHEDPOSTRA-NEXT:  .LBB2_2: # %if.end
 ; NOFUSION_MISCHEDPOSTRA-NEXT:    retq
 ;
-; BRANCHFUSION_MISCHEDPOSTRA-LABEL: macrofuse_alu_je:
-; BRANCHFUSION_MISCHEDPOSTRA:       # %bb.0: # %entry
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movl %edi, %eax
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    addl $-512, %eax # imm = 0xFE00
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    je .LBB2_2
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:  # %bb.1: # %if.then
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movl $1, %eax
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:  .LBB2_2: # %if.end
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    retq
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-LABEL: macrofuse_alu_je:
+; BRANCHFUSIONONLY_MISCHEDPOSTRA:       # %bb.0: # %entry
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    movl %edi, %eax
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    addl $-512, %eax # imm = 0xFE00
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    je .LBB2_2
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:  # %bb.1: # %if.then
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    movl $1, %eax
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:  .LBB2_2: # %if.end
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    retq
+;
+; MACROFUSION_MISCHEDPOSTRA-LABEL: macrofuse_alu_je:
+; MACROFUSION_MISCHEDPOSTRA:       # %bb.0: # %entry
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    movl %edi, %eax
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    addl $-512, %eax # imm = 0xFE00
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    je .LBB2_2
+; MACROFUSION_MISCHEDPOSTRA-NEXT:  # %bb.1: # %if.then
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    movl $1, %eax
+; MACROFUSION_MISCHEDPOSTRA-NEXT:  .LBB2_2: # %if.end
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    retq
 entry:
   %sub = sub i32 %flags, 512
   %tobool = icmp eq i32 %sub, 0
@@ -337,16 +348,27 @@ define i32 @macrofuse_dec_je(i32 %flags, i8* %p) nounwind {
 ; NOFUSION_MISCHEDPOSTRA-NEXT:  .LBB3_2: # %if.end
 ; NOFUSION_MISCHEDPOSTRA-NEXT:    retq
 ;
-; BRANCHFUSION_MISCHEDPOSTRA-LABEL: macrofuse_dec_je:
-; BRANCHFUSION_MISCHEDPOSTRA:       # %bb.0: # %entry
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movl %edi, %eax
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    decl %eax
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    je .LBB3_2
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:  # %bb.1: # %if.then
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    movl $1, %eax
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:  .LBB3_2: # %if.end
-; BRANCHFUSION_MISCHEDPOSTRA-NEXT:    retq
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-LABEL: macrofuse_dec_je:
+; BRANCHFUSIONONLY_MISCHEDPOSTRA:       # %bb.0: # %entry
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    movl %edi, %eax
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    decl %eax
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    je .LBB3_2
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:  # %bb.1: # %if.then
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    movl $1, %eax
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:  .LBB3_2: # %if.end
+; BRANCHFUSIONONLY_MISCHEDPOSTRA-NEXT:    retq
+;
+; MACROFUSION_MISCHEDPOSTRA-LABEL: macrofuse_dec_je:
+; MACROFUSION_MISCHEDPOSTRA:       # %bb.0: # %entry
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    movl %edi, %eax
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    movb $1, (%rsi)
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    decl %eax
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    je .LBB3_2
+; MACROFUSION_MISCHEDPOSTRA-NEXT:  # %bb.1: # %if.then
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    movl $1, %eax
+; MACROFUSION_MISCHEDPOSTRA-NEXT:  .LBB3_2: # %if.end
+; MACROFUSION_MISCHEDPOSTRA-NEXT:    retq
 entry:
   %sub = sub i32 %flags, 1
   %tobool = icmp eq i32 %sub, 0