2014-08-11 Yvan Roux <yvan.roux@linaro.org>

	Backport from trunk r212358.
	2014-07-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm.c (cortexa5_extra_costs): New table.
	(arm_cortex_a5_tune): Use cortexa5_extra_costs.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213795 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog.linaro b/gcc/ChangeLog.linaro
index c107da4..33644b9 100644 (file)
--- a/gcc/ChangeLog.linaro
+++ b/gcc/ChangeLog.linaro
@@ -1,5 +1,12 @@
 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
 
+       Backport from trunk r212358.
+       2014-07-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/arm/arm.c (cortexa5_extra_costs): New table.
+       (arm_cortex_a5_tune): Use cortexa5_extra_costs.
+
+2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
 
        Backport from trunk r212296.
        2014-07-04  Tom de Vries  <tom@codesourcery.com>

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8a1bd5a..4ed0639 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1177,6 +1177,107 @@ const struct cpu_cost_table cortexa8_extra_costs =
   }
 };
 
+const struct cpu_cost_table cortexa5_extra_costs =
+{
+  /* ALU */
+  {
+    0,                 /* arith.  */
+    0,                 /* logical.  */
+    COSTS_N_INSNS (1), /* shift.  */
+    COSTS_N_INSNS (1), /* shift_reg.  */
+    COSTS_N_INSNS (1), /* arith_shift.  */
+    COSTS_N_INSNS (1), /* arith_shift_reg.  */
+    COSTS_N_INSNS (1), /* log_shift.  */
+    COSTS_N_INSNS (1), /* log_shift_reg.  */
+    COSTS_N_INSNS (1), /* extend.  */
+    COSTS_N_INSNS (1), /* extend_arith.  */
+    COSTS_N_INSNS (1), /* bfi.  */
+    COSTS_N_INSNS (1), /* bfx.  */
+    COSTS_N_INSNS (1), /* clz.  */
+    COSTS_N_INSNS (1), /* rev.  */
+    0,                 /* non_exec.  */
+    true               /* non_exec_costs_exec.  */
+  },
+
+  {
+    /* MULT SImode */
+    {
+      0,                       /* simple.  */
+      COSTS_N_INSNS (1),       /* flag_setting.  */
+      COSTS_N_INSNS (1),       /* extend.  */
+      COSTS_N_INSNS (1),       /* add.  */
+      COSTS_N_INSNS (1),       /* extend_add.  */
+      COSTS_N_INSNS (7)                /* idiv.  */
+    },
+    /* MULT DImode */
+    {
+      0,                       /* simple (N/A).  */
+      0,                       /* flag_setting (N/A).  */
+      COSTS_N_INSNS (1),       /* extend.  */
+      0,                       /* add.  */
+      COSTS_N_INSNS (2),       /* extend_add.  */
+      0                                /* idiv (N/A).  */
+    }
+  },
+  /* LD/ST */
+  {
+    COSTS_N_INSNS (1), /* load.  */
+    COSTS_N_INSNS (1), /* load_sign_extend.  */
+    COSTS_N_INSNS (6), /* ldrd.  */
+    COSTS_N_INSNS (1), /* ldm_1st.  */
+    1,                 /* ldm_regs_per_insn_1st.  */
+    2,                 /* ldm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (2), /* loadf.  */
+    COSTS_N_INSNS (4), /* loadd.  */
+    COSTS_N_INSNS (1), /* load_unaligned.  */
+    COSTS_N_INSNS (1), /* store.  */
+    COSTS_N_INSNS (3), /* strd.  */
+    COSTS_N_INSNS (1), /* stm_1st.  */
+    1,                 /* stm_regs_per_insn_1st.  */
+    2,                 /* stm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (2), /* storef.  */
+    COSTS_N_INSNS (2), /* stored.  */
+    COSTS_N_INSNS (1)  /* store_unaligned.  */
+  },
+  {
+    /* FP SFmode */
+    {
+      COSTS_N_INSNS (15),      /* div.  */
+      COSTS_N_INSNS (3),       /* mult.  */
+      COSTS_N_INSNS (7),       /* mult_addsub. */
+      COSTS_N_INSNS (7),       /* fma.  */
+      COSTS_N_INSNS (3),       /* addsub.  */
+      COSTS_N_INSNS (3),       /* fpconst.  */
+      COSTS_N_INSNS (3),       /* neg.  */
+      COSTS_N_INSNS (3),       /* compare.  */
+      COSTS_N_INSNS (3),       /* widen.  */
+      COSTS_N_INSNS (3),       /* narrow.  */
+      COSTS_N_INSNS (3),       /* toint.  */
+      COSTS_N_INSNS (3),       /* fromint.  */
+      COSTS_N_INSNS (3)                /* roundint.  */
+    },
+    /* FP DFmode */
+    {
+      COSTS_N_INSNS (30),      /* div.  */
+      COSTS_N_INSNS (6),       /* mult.  */
+      COSTS_N_INSNS (10),      /* mult_addsub.  */
+      COSTS_N_INSNS (7),       /* fma.  */
+      COSTS_N_INSNS (3),       /* addsub.  */
+      COSTS_N_INSNS (3),       /* fpconst.  */
+      COSTS_N_INSNS (3),       /* neg.  */
+      COSTS_N_INSNS (3),       /* compare.  */
+      COSTS_N_INSNS (3),       /* widen.  */
+      COSTS_N_INSNS (3),       /* narrow.  */
+      COSTS_N_INSNS (3),       /* toint.  */
+      COSTS_N_INSNS (3),       /* fromint.  */
+      COSTS_N_INSNS (3)                /* roundint.  */
+    }
+  },
+  /* Vector */
+  {
+    COSTS_N_INSNS (1)  /* alu.  */
+  }
+};
 
 
 const struct cpu_cost_table cortexa7_extra_costs =
@@ -1798,7 +1899,7 @@ const struct tune_params arm_cortex_a57_tune =
 const struct tune_params arm_cortex_a5_tune =
 {
   arm_9e_rtx_costs,
-  NULL,
+  &cortexa5_extra_costs,
   NULL,                                                /* Sched adj cost.  */
   1,                                           /* Constant limit.  */
   1,                                           /* Max cond insns.  */