radv: implement VK_EXT_depth_bias_control

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23696>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index d3bcf9b..011c7a7 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -180,6 +180,7 @@ radv_bind_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const struct radv_dy
    RADV_CMP_COPY(vk.rs.depth_bias.constant, RADV_DYNAMIC_DEPTH_BIAS);
    RADV_CMP_COPY(vk.rs.depth_bias.clamp, RADV_DYNAMIC_DEPTH_BIAS);
    RADV_CMP_COPY(vk.rs.depth_bias.slope, RADV_DYNAMIC_DEPTH_BIAS);
+   RADV_CMP_COPY(vk.rs.depth_bias.representation, RADV_DYNAMIC_DEPTH_BIAS);
    RADV_CMP_COPY(vk.rs.line.stipple.factor, RADV_DYNAMIC_LINE_STIPPLE);
    RADV_CMP_COPY(vk.rs.line.stipple.pattern, RADV_DYNAMIC_LINE_STIPPLE);
    RADV_CMP_COPY(vk.rs.cull_mode, RADV_DYNAMIC_CULL_MODE);
@@ -2080,8 +2081,31 @@ radv_emit_depth_bounds(struct radv_cmd_buffer *cmd_buffer)
 static void
 radv_emit_depth_bias(struct radv_cmd_buffer *cmd_buffer)
 {
+   const struct radv_device *device = cmd_buffer->device;
    const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
+   struct radv_rendering_state *render = &cmd_buffer->state.render;
    unsigned slope = fui(d->vk.rs.depth_bias.slope * 16.0f);
+   unsigned pa_su_poly_offset_db_fmt_cntl = 0;
+
+   if (render->ds_att.iview && vk_format_has_depth(render->ds_att.iview->image->vk.format) &&
+       d->vk.rs.depth_bias.representation != VK_DEPTH_BIAS_REPRESENTATION_FLOAT_EXT &&
+       !device->instance->absolute_depth_bias) {
+      const struct radv_image_view *iview = render->ds_att.iview;
+      VkFormat format = vk_format_depth_only(iview->image->vk.format);
+
+      if (format == VK_FORMAT_D16_UNORM) {
+         pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16);
+      } else {
+         assert(format == VK_FORMAT_D32_SFLOAT);
+         if (d->vk.rs.depth_bias.representation ==
+             VK_DEPTH_BIAS_REPRESENTATION_LEAST_REPRESENTABLE_VALUE_FORCE_UNORM_EXT) {
+            pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24);
+         } else {
+            pa_su_poly_offset_db_fmt_cntl =
+               S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) | S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
+         }
+      }
+   }
 
    radeon_set_context_reg_seq(cmd_buffer->cs, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 5);
    radeon_emit(cmd_buffer->cs, fui(d->vk.rs.depth_bias.clamp));    /* CLAMP */
@@ -2089,6 +2113,8 @@ radv_emit_depth_bias(struct radv_cmd_buffer *cmd_buffer)
    radeon_emit(cmd_buffer->cs, fui(d->vk.rs.depth_bias.constant)); /* FRONT OFFSET */
    radeon_emit(cmd_buffer->cs, slope);                             /* BACK SCALE */
    radeon_emit(cmd_buffer->cs, fui(d->vk.rs.depth_bias.constant)); /* BACK OFFSET */
+
+   radeon_set_context_reg(cmd_buffer->cs, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, pa_su_poly_offset_db_fmt_cntl);
 }
 
 static void
@@ -2872,8 +2898,6 @@ radv_emit_fb_ds_state(struct radv_cmd_buffer *cmd_buffer, struct radv_ds_buffer_
 
    /* Update the ZRANGE_PRECISION value for the TC-compat bug. */
    radv_update_zrange_precision(cmd_buffer, ds, iview, layout, true);
-
-   radeon_set_context_reg(cmd_buffer->cs, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, ds->pa_su_poly_offset_db_fmt_cntl);
 }
 
 static void
@@ -6655,20 +6679,6 @@ radv_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth)
 }
 
 VKAPI_ATTR void VKAPI_CALL
-radv_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp,
-                     float depthBiasSlopeFactor)
-{
-   RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
-   struct radv_cmd_state *state = &cmd_buffer->state;
-
-   state->dynamic.vk.rs.depth_bias.constant = depthBiasConstantFactor;
-   state->dynamic.vk.rs.depth_bias.clamp = depthBiasClamp;
-   state->dynamic.vk.rs.depth_bias.slope = depthBiasSlopeFactor;
-
-   state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
-}
-
-VKAPI_ATTR void VKAPI_CALL
 radv_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4])
 {
    RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
@@ -7339,6 +7349,24 @@ radv_CmdSetAttachmentFeedbackLoopEnableEXT(VkCommandBuffer commandBuffer, VkImag
 }
 
 VKAPI_ATTR void VKAPI_CALL
+radv_CmdSetDepthBias2EXT(VkCommandBuffer commandBuffer, const VkDepthBiasInfoEXT *pDepthBiasInfo)
+{
+   RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
+   struct radv_cmd_state *state = &cmd_buffer->state;
+
+   const VkDepthBiasRepresentationInfoEXT *dbr_info =
+      vk_find_struct_const(pDepthBiasInfo->pNext, DEPTH_BIAS_REPRESENTATION_INFO_EXT);
+
+   state->dynamic.vk.rs.depth_bias.constant = pDepthBiasInfo->depthBiasConstantFactor;
+   state->dynamic.vk.rs.depth_bias.clamp = pDepthBiasInfo->depthBiasClamp;
+   state->dynamic.vk.rs.depth_bias.slope = pDepthBiasInfo->depthBiasSlopeFactor;
+   state->dynamic.vk.rs.depth_bias.representation =
+      dbr_info ? dbr_info->depthBiasRepresentation : VK_DEPTH_BIAS_REPRESENTATION_LEAST_REPRESENTABLE_VALUE_FORMAT_EXT;
+
+   state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
+}
+
+VKAPI_ATTR void VKAPI_CALL
 radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer *pCmdBuffers)
 {
    RADV_FROM_HANDLE(radv_cmd_buffer, primary, commandBuffer);
@@ -7677,6 +7705,8 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
    if (cmd_buffer->device->physical_device->rad_info.rbplus_allowed)
       cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RBPLUS;
 
+   cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
+
    if (render->vrs_att.iview && cmd_buffer->device->physical_device->rad_info.gfx_level == GFX10_3) {
       if (render->ds_att.iview) {
          /* When we have a VRS attachment and a depth/stencil attachment, we just need to copy the

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 31712c3..6dc957d 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1693,8 +1693,6 @@ radv_initialise_vrs_surface(struct radv_image *image, struct radv_buffer *htile_
    assert(image->vk.format == VK_FORMAT_D16_UNORM);
    memset(ds, 0, sizeof(*ds));
 
-   ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16);
-
    ds->db_z_info = S_028038_FORMAT(V_028040_Z_16) | S_028038_SW_MODE(surf->u.gfx9.swizzle_mode) |
                    S_028038_ZRANGE_PRECISION(1) | S_028038_TILE_SURFACE_ENABLE(1);
    ds->db_stencil_info = S_02803C_FORMAT(V_028044_STENCIL_INVALID);
@@ -1720,25 +1718,6 @@ radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buff
    assert(vk_format_get_plane_count(iview->image->vk.format) == 1);
 
    memset(ds, 0, sizeof(*ds));
-   if (!device->instance->absolute_depth_bias) {
-      switch (iview->image->vk.format) {
-      case VK_FORMAT_D24_UNORM_S8_UINT:
-      case VK_FORMAT_X8_D24_UNORM_PACK32:
-         ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24);
-         break;
-      case VK_FORMAT_D16_UNORM:
-      case VK_FORMAT_D16_UNORM_S8_UINT:
-         ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16);
-         break;
-      case VK_FORMAT_D32_SFLOAT:
-      case VK_FORMAT_D32_SFLOAT_S8_UINT:
-         ds->pa_su_poly_offset_db_fmt_cntl =
-            S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) | S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
-         break;
-      default:
-         break;
-      }
-   }
 
    format = radv_translate_dbformat(iview->image->vk.format);
    stencil_format = surf->has_stencil ? V_028044_STENCIL_8 : V_028044_STENCIL_INVALID;

diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c
index a8790a9..f6ee0d4 100644 (file)
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -943,6 +943,7 @@ radv_pipeline_init_dynamic_state(const struct radv_device *device, struct radv_g
       dynamic->vk.rs.depth_bias.constant = state->rs->depth_bias.constant;
       dynamic->vk.rs.depth_bias.clamp = state->rs->depth_bias.clamp;
       dynamic->vk.rs.depth_bias.slope = state->rs->depth_bias.slope;
+      dynamic->vk.rs.depth_bias.representation = state->rs->depth_bias.representation;
    }
 
    if (states & RADV_DYNAMIC_CULL_MODE) {

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index b7f779d..10f2bfc 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1495,7 +1495,6 @@ struct radv_ds_buffer_info {
    uint32_t db_depth_size;
    uint32_t db_depth_slice;
    uint32_t db_htile_surface;
-   uint32_t pa_su_poly_offset_db_fmt_cntl;
    uint32_t db_z_info2;       /* GFX9 only */
    uint32_t db_stencil_info2; /* GFX9 only */
    uint32_t db_render_override2;