-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-#gdb_memory_map enable\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-$_TARGETNAME configure -event gdb-attach { cortex_r4 dbginit }\r
-\r
-gdb_breakpoint_override hard\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- cortex_r4 maskisr on\r
- gdb_breakpoint_override on\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+#gdb_memory_map enable
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+$_TARGETNAME configure -event gdb-attach { cortex_r4 dbginit }
+
+gdb_breakpoint_override hard
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ cortex_r4 maskisr on
+ gdb_breakpoint_override on
+}
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-#gdb_memory_map enable\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-$_TARGETNAME configure -event gdb-attach { cortex_r4 dbginit }\r
-\r
-gdb_breakpoint_override hard\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- cortex_r4 maskisr on\r
- gdb_breakpoint_override on\r
-\r
- # set entry address\r
- reg pc 0x04004060\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+#gdb_memory_map enable
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+$_TARGETNAME configure -event gdb-attach { cortex_r4 dbginit }
+
+gdb_breakpoint_override hard
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ cortex_r4 maskisr on
+ gdb_breakpoint_override on
+
+ # set entry address
+ reg pc 0x04004060
+}
###########################################################################
#
-# Copyright 2016 Samsung Electronics All Rights Reserved.
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
proc fusing_image_os_ota0 {} {
echo "----------------------------------------------------------------------"
- echo "Fusing Tinyara OTA0"
+ echo "Fusing TinyAra OTA0"
echo "----------------------------------------------------------------------"
set OS_PATH "../../../output/bin/tinyara_head.bin"
load_image $OS_PATH 0x6000C000
proc fusing_image_os_ota1 {} {
echo "----------------------------------------------------------------------"
- echo "Fusing Tinyara OTA1"
+ echo "Fusing TinyAra OTA1"
echo "----------------------------------------------------------------------"
set OS_PATH "../../../output/bin/tinyara_ota1_head.bin"
load_image $OS_PATH 0x60400000
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- cmu_init\r
- enable_region\r
- flash_erase_romfs\r
- fusing_image_romfs\r
- reset\r
- shutdown\r
-}\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_romfs {} {\r
- echo "Erase ROMFS region @ mirror_addr 0x60690000 (phy_addr:0x04690000) size 512K"\r
- echo "Please confirm romfs partition phy addr in bootup log"\r
- flash_erase 0x60690000 0x80000\r
-}\r
-\r
-proc flash_erase {write_addr write_size} {\r
- global flash_write_addr flash_base target_addr end_addr\r
- set flash_write_addr $write_addr\r
- set flash_base 0x04000000\r
- set target_addr [expr $flash_write_addr-$flash_base]\r
- set end_addr [expr $target_addr+$write_size]\r
- while {$target_addr<$end_addr} {\r
- mww 0x80310010 $target_addr\r
- mwb 0x8031005E 0xff\r
- set target_addr [expr $target_addr+0x1000]\r
- flash_erase_wait\r
- }\r
-}\r
-\r
-proc flash_erase_wait {} {\r
- set SFLASH_RDSR 0x803100dc\r
- while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }\r
-}\r
-\r
-# mrw: "memory read word", returns value of $reg\r
-proc mrw {reg} {\r
- set value ""\r
- mem2array value 32 $reg 1\r
- return $value(0)\r
-}\r
-\r
-proc fusing_image_romfs {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing ROMFS @ mirror_addr 0x60690000 (phy_addr:0x04690000) "\r
- echo "----------------------------------------------------------------------"\r
- set ROMFS_PATH "../../../../../tinyara/build/output/bin/romfs.img"\r
- load_image $ROMFS_PATH 0x60690000\r
- echo "Done"\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ cmu_init
+ enable_region
+ flash_erase_romfs
+ fusing_image_romfs
+ reset
+ shutdown
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc flash_erase_romfs {} {
+ echo "Erase ROMFS region @ mirror_addr 0x60690000 (phy_addr:0x04690000) size 512K"
+ echo "Please confirm romfs partition phy addr in bootup log"
+ flash_erase 0x60690000 0x80000
+}
+
+proc flash_erase {write_addr write_size} {
+ global flash_write_addr flash_base target_addr end_addr
+ set flash_write_addr $write_addr
+ set flash_base 0x04000000
+ set target_addr [expr $flash_write_addr-$flash_base]
+ set end_addr [expr $target_addr+$write_size]
+ while {$target_addr<$end_addr} {
+ mww 0x80310010 $target_addr
+ mwb 0x8031005E 0xff
+ set target_addr [expr $target_addr+0x1000]
+ flash_erase_wait
+ }
+}
+
+proc flash_erase_wait {} {
+ set SFLASH_RDSR 0x803100dc
+ while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }
+}
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+ set value ""
+ mem2array value 32 $reg 1
+ return $value(0)
+}
+
+proc fusing_image_romfs {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing ROMFS @ mirror_addr 0x60690000 (phy_addr:0x04690000) "
+ echo "----------------------------------------------------------------------"
+ set ROMFS_PATH "../../../output/bin/romfs.img"
+ load_image $ROMFS_PATH 0x60690000
+ echo "Done"
+}
###########################################################################
#
-# Copyright 2016 Samsung Electronics All Rights Reserved.
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
proc fusing_image_os_ota0 {} {
echo "----------------------------------------------------------------------"
- echo "Fusing Tinyara OTA0"
+ echo "Fusing TinyAra OTA0"
echo "----------------------------------------------------------------------"
set OS_PATH "../../../output/bin/tinyara_head.bin"
load_image $OS_PATH 0x6000C000
###########################################################################
#
-# Copyright 2016 Samsung Electronics All Rights Reserved.
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
proc fusing_image_os_ota1 {} {
echo "----------------------------------------------------------------------"
- echo "Fusing Tinyara OTA1"
+ echo "Fusing TinyAra OTA1"
echo "----------------------------------------------------------------------"
set OS_PATH "../../../output/bin/tinyara_ota1_head.bin"
load_image $OS_PATH 0x60400000
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-$_TARGETNAME configure -event gdb-attach { reset init }\r
-$_TARGETNAME configure -event reset-init { \r
- echo "GDB connected.." \r
-}\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- halt\r
- #reg \r
- flash_init\r
- flash_erase_boot \r
- flash_erase_os \r
- sleep 500 \r
- fusing_image_os \r
- reg pc 0x04004020\r
- echo "now Attach GDB..(gdb target remote localhost:3333"\r
-}\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
-}\r
-\r
-proc flash_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80040020 0x00222222\r
- mww 0x80040028 0x00333333\r
- sleep 100\r
- mww 0x80310004 0x8010001A\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_boot {} {\r
- echo "erase bootloader in flash"\r
- flash_erase 0x04000000 0x4000\r
-}\r
-\r
-proc flash_erase_os {} {\r
- echo "erase flash 2MB for tinyara_head.bin, check bin size"\r
- flash_erase 0x04004000 0x200000\r
-}\r
-\r
-proc flash_erase {write_addr write_size} {\r
- global flash_write_addr flash_base target_addr end_addr\r
- set flash_write_addr $write_addr\r
- set flash_base 0x04000000\r
- set target_addr [expr $flash_write_addr-$flash_base]\r
- set end_addr [expr $target_addr+$write_size]\r
- while {$target_addr<$end_addr} {\r
- mww 0x80310010 $target_addr\r
- mwb 0x8031005E 0xff\r
- set target_addr [expr $target_addr+0x1000]\r
- flash_erase_wait\r
- }\r
-}\r
-\r
-proc flash_erase_wait {} {\r
- set SFLASH_RDSR 0x803100dc\r
- while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }\r
-}\r
-\r
-# mrw: "memory read word", returns value of $reg\r
-proc mrw {reg} {\r
- set value ""\r
- mem2array value 32 $reg 1\r
- return $value(0)\r
-}\r
-\r
-proc fusing_image_os {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing Tinyara"\r
- echo "----------------------------------------------------------------------"\r
- set OS_PATH "../../../bin/tinyara_head.bin"\r
- load_image $OS_PATH 0x0400C000\r
- echo "Done"\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+$_TARGETNAME configure -event gdb-attach { reset init }
+$_TARGETNAME configure -event reset-init {
+ echo "GDB connected.."
+}
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ halt
+ flash_init
+ flash_erase_boot
+ flash_erase_os
+ sleep 500
+ fusing_image_os
+ reg pc 0x04004020
+ echo "now Attach GDB..(gdb target remote localhost:3333"
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc flash_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80040020 0x00222222
+ mww 0x80040028 0x00333333
+ sleep 100
+ mww 0x80310004 0x8010001A
+ echo "Done"
+}
+
+proc flash_erase_boot {} {
+ echo "erase bootloader in flash"
+ flash_erase 0x04000000 0x4000
+}
+
+proc flash_erase_os {} {
+ echo "erase flash 2MB for tinyara_head.bin, check bin size"
+ flash_erase 0x04004000 0x200000
+}
+
+proc flash_erase {write_addr write_size} {
+ global flash_write_addr flash_base target_addr end_addr
+ set flash_write_addr $write_addr
+ set flash_base 0x04000000
+ set target_addr [expr $flash_write_addr-$flash_base]
+ set end_addr [expr $target_addr+$write_size]
+ while {$target_addr<$end_addr} {
+ mww 0x80310010 $target_addr
+ mwb 0x8031005E 0xff
+ set target_addr [expr $target_addr+0x1000]
+ flash_erase_wait
+ }
+}
+
+proc flash_erase_wait {} {
+ set SFLASH_RDSR 0x803100dc
+ while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }
+}
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+ set value ""
+ mem2array value 32 $reg 1
+ return $value(0)
+}
+
+proc fusing_image_os {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing TinyAra"
+ echo "----------------------------------------------------------------------"
+ set OS_PATH "../../../output/bin/tinyara_head.bin"
+ load_image $OS_PATH 0x0400C000
+ echo "Done"
+}
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 3000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- cmu_init\r
- enable_region\r
- flash_init\r
- flash_erase_all\r
- reset\r
- shutdown\r
-}\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
-}\r
-\r
-proc flash_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80040020 0x00222222\r
- mww 0x80040028 0x00333333\r
- sleep 100\r
- mww 0x80310004 0x8010001A\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_all {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Flash erase"\r
- echo "----------------------------------------------------------------------"\r
- flash_erase_boot\r
- flash_erase_os\r
- flash_erase_wlan\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_boot {} {\r
- echo "erase bootloader in flash"\r
- flash_erase 0x60000000 0x4000\r
-}\r
-\r
-proc flash_erase_os {} {\r
- echo "erase flash 3MB for tinyara_head.bin, check bin size"\r
- flash_erase 0x60004000 0x300000\r
-}\r
-\r
-proc flash_erase_wlan {} {\r
- echo "erase WLAN F/W region"\r
- flash_erase 0x60304000 0x80000\r
-}\r
-\r
-proc flash_erase {write_addr write_size} {\r
- global flash_write_addr flash_base target_addr end_addr\r
- set flash_write_addr $write_addr\r
- set flash_base 0x04000000\r
- set target_addr [expr $flash_write_addr-$flash_base]\r
- set end_addr [expr $target_addr+$write_size]\r
- while {$target_addr<$end_addr} {\r
- mww 0x80310010 $target_addr\r
- mwb 0x8031005E 0xff\r
- set target_addr [expr $target_addr+0x1000]\r
- flash_erase_wait\r
- }\r
-}\r
-\r
-proc flash_erase_wait {} {\r
- set SFLASH_RDSR 0x803100dc\r
- while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }\r
-}\r
-\r
-# mrw: "memory read word", returns value of $reg\r
-proc mrw {reg} {\r
- set value ""\r
- mem2array value 32 $reg 1\r
- return $value(0)\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 3000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ cmu_init
+ enable_region
+ flash_init
+ flash_erase_all
+ reset
+ shutdown
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc flash_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80040020 0x00222222
+ mww 0x80040028 0x00333333
+ sleep 100
+ mww 0x80310004 0x8010001A
+ echo "Done"
+}
+
+proc flash_erase_all {} {
+ echo "----------------------------------------------------------------------"
+ echo "Flash erase"
+ echo "----------------------------------------------------------------------"
+ flash_erase_boot
+ flash_erase_os
+ flash_erase_wlan
+ echo "Done"
+}
+
+proc flash_erase_boot {} {
+ echo "erase bootloader in flash"
+ flash_erase 0x60000000 0x4000
+}
+
+proc flash_erase_os {} {
+ echo "erase flash 3MB for tinyara_head.bin, check bin size"
+ flash_erase 0x60004000 0x300000
+}
+
+proc flash_erase_wlan {} {
+ echo "erase WLAN F/W region"
+ flash_erase 0x60304000 0x80000
+}
+
+proc flash_erase {write_addr write_size} {
+ global flash_write_addr flash_base target_addr end_addr
+ set flash_write_addr $write_addr
+ set flash_base 0x04000000
+ set target_addr [expr $flash_write_addr-$flash_base]
+ set end_addr [expr $target_addr+$write_size]
+ while {$target_addr<$end_addr} {
+ mww 0x80310010 $target_addr
+ mwb 0x8031005E 0xff
+ set target_addr [expr $target_addr+0x1000]
+ flash_erase_wait
+ }
+}
+
+proc flash_erase_wait {} {
+ set SFLASH_RDSR 0x803100dc
+ while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }
+}
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+ set value ""
+ mem2array value 32 $reg 1
+ return $value(0)
+}
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- cmu_init\r
- enable_region\r
- flash_init\r
- flash_erase_boot\r
- reset\r
- shutdown\r
-}\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
-}\r
-\r
-proc flash_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80040020 0x00222222\r
- mww 0x80040028 0x00333333\r
- sleep 100\r
- mww 0x80310004 0x8010001A\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_boot {} {\r
- echo "erase bootloader in flash"\r
- flash_erase 0x60000000 0x4000\r
-}\r
-\r
-proc flash_erase {write_addr write_size} {\r
- global flash_write_addr flash_base target_addr end_addr\r
- set flash_write_addr $write_addr\r
- set flash_base 0x04000000\r
- set target_addr [expr $flash_write_addr-$flash_base]\r
- set end_addr [expr $target_addr+$write_size]\r
- while {$target_addr<$end_addr} {\r
- mww 0x80310010 $target_addr\r
- mwb 0x8031005E 0xff\r
- set target_addr [expr $target_addr+0x1000]\r
- flash_erase_wait\r
- }\r
-}\r
-\r
-proc flash_erase_wait {} {\r
- set SFLASH_RDSR 0x803100dc\r
- while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }\r
-}\r
-\r
-# mrw: "memory read word", returns value of $reg\r
-proc mrw {reg} {\r
- set value ""\r
- mem2array value 32 $reg 1\r
- return $value(0)\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ cmu_init
+ enable_region
+ flash_init
+ flash_erase_boot
+ reset
+ shutdown
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc flash_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80040020 0x00222222
+ mww 0x80040028 0x00333333
+ sleep 100
+ mww 0x80310004 0x8010001A
+ echo "Done"
+}
+
+proc flash_erase_boot {} {
+ echo "erase bootloader in flash"
+ flash_erase 0x60000000 0x4000
+}
+
+proc flash_erase {write_addr write_size} {
+ global flash_write_addr flash_base target_addr end_addr
+ set flash_write_addr $write_addr
+ set flash_base 0x04000000
+ set target_addr [expr $flash_write_addr-$flash_base]
+ set end_addr [expr $target_addr+$write_size]
+ while {$target_addr<$end_addr} {
+ mww 0x80310010 $target_addr
+ mwb 0x8031005E 0xff
+ set target_addr [expr $target_addr+0x1000]
+ flash_erase_wait
+ }
+}
+
+proc flash_erase_wait {} {
+ set SFLASH_RDSR 0x803100dc
+ while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }
+}
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+ set value ""
+ mem2array value 32 $reg 1
+ return $value(0)
+}
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 3000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- cmu_init\r
- enable_region\r
- flash_init\r
- flash_erase_os\r
- reset\r
- shutdown\r
-}\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
-}\r
-\r
-proc flash_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80040020 0x00222222\r
- mww 0x80040028 0x00333333\r
- sleep 100\r
- mww 0x80310004 0x8010001A\r
- echo "Done"\r
-}\r
-\r
-proc flash_chiperase {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash Chiperase(Entire flash)"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x803100CE 0xFF\r
-\r
- flash_erase_wait\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_os {} {\r
- echo "erase flash 3MB for tinyara_head.bin, check bin size"\r
- flash_erase 0x60004000 0x300000\r
-}\r
-\r
-proc flash_erase {write_addr write_size} {\r
- global flash_write_addr flash_base target_addr end_addr\r
- set flash_write_addr $write_addr\r
- set flash_base 0x04000000\r
- set target_addr [expr $flash_write_addr-$flash_base]\r
- set end_addr [expr $target_addr+$write_size]\r
- while {$target_addr<$end_addr} {\r
- mww 0x80310010 $target_addr\r
- mwb 0x8031005E 0xff\r
- set target_addr [expr $target_addr+0x1000]\r
- flash_erase_wait\r
- }\r
-}\r
-\r
-proc flash_erase_wait {} {\r
- set SFLASH_RDSR 0x803100dc\r
- while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }\r
-}\r
-\r
-# mrw: "memory read word", returns value of $reg\r
-proc mrw {reg} {\r
- set value ""\r
- mem2array value 32 $reg 1\r
- return $value(0)\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 3000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ cmu_init
+ enable_region
+ flash_init
+ flash_erase_os
+ reset
+ shutdown
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc flash_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80040020 0x00222222
+ mww 0x80040028 0x00333333
+ sleep 100
+ mww 0x80310004 0x8010001A
+ echo "Done"
+}
+
+proc flash_chiperase {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash Chiperase(Entire flash)"
+ echo "----------------------------------------------------------------------"
+ mww 0x803100CE 0xFF
+
+ flash_erase_wait
+ echo "Done"
+}
+
+proc flash_erase_os {} {
+ echo "erase flash 3MB for tinyara_head.bin, check bin size"
+ flash_erase 0x60004000 0x300000
+}
+
+proc flash_erase {write_addr write_size} {
+ global flash_write_addr flash_base target_addr end_addr
+ set flash_write_addr $write_addr
+ set flash_base 0x04000000
+ set target_addr [expr $flash_write_addr-$flash_base]
+ set end_addr [expr $target_addr+$write_size]
+ while {$target_addr<$end_addr} {
+ mww 0x80310010 $target_addr
+ mwb 0x8031005E 0xff
+ set target_addr [expr $target_addr+0x1000]
+ flash_erase_wait
+ }
+}
+
+proc flash_erase_wait {} {
+ set SFLASH_RDSR 0x803100dc
+ while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }
+}
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+ set value ""
+ mem2array value 32 $reg 1
+ return $value(0)
+}
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- wdt_disable\r
- cmu_init\r
- enable_region\r
- flash_init\r
- #flash_erase_all\r
- flash_chiperase\r
- #set scriptDir [ getScriptDirectory ]\r
- fusing_image_all\r
- reset\r
-}\r
-\r
-proc s5j_set_ft2232_serial { arg1 } {\r
- echo "----------------------------------------------------------------------"\r
- echo "set serial number $arg1"\r
- echo "----------------------------------------------------------------------" \r
- ft2232_serial $arg1 \r
-}\r
-\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc wdt_disable {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "DISABLE Watchdog reset"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80030000 0x00000000\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
-#initialize mpu setting\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x1\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x2\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x3\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x5\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x6\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x7\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x8\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0x9\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0xA\r
- arm mcr 15 0 6 1 2 0x8\r
- arm mcr 15 0 6 2 0 0xB\r
- arm mcr 15 0 6 1 2 0x8 \r
- \r
- \r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
- \r
- \r
-}\r
-\r
-proc flash_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80040020 0x00222222\r
- mww 0x80040028 0x00333333\r
- sleep 100\r
- mww 0x80310004 0x8010000A\r
- echo "Done"\r
-}\r
-\r
-proc flash_chiperase {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash Chiperase(Entire flash)"\r
- echo "----------------------------------------------------------------------"\r
- mwb 0x803100CE 0xFF\r
- \r
- flash_erase_wait_echo_sec\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_all {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Flash erase"\r
- echo "----------------------------------------------------------------------"\r
- flash_erase_boot\r
- flash_erase_os\r
- flash_erase_sss\r
- flash_erase_wlan\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_boot {} {\r
- echo "erase bootloader in flash"\r
- flash_erase 0x60000000 0x4000\r
-}\r
-\r
-proc flash_erase_os {} {\r
- echo "erase flash 3MB for tinyara_head.bin, check bin size"\r
- flash_erase 0x6000C000 0x2F8000\r
-}\r
-\r
-proc flash_erase_sss {} {\r
- echo "erase SSS F/W region"\r
- flash_erase 0x602FC000 0x8000\r
-}\r
-\r
-proc flash_erase_wlan {} {\r
- echo "erase WLAN F/W region"\r
- flash_erase 0x60304000 0x80000\r
-}\r
-\r
-proc flash_erase {write_addr write_size} {\r
- global flash_write_addr flash_base target_addr end_addr\r
- set flash_write_addr $write_addr\r
- set flash_base 0x04000000\r
- set target_addr [expr $flash_write_addr-$flash_base]\r
- set end_addr [expr $target_addr+$write_size]\r
- while {$target_addr<$end_addr} {\r
- mww 0x80310010 $target_addr\r
- mwb 0x8031005E 0xff\r
- set target_addr [expr $target_addr+0x1000]\r
- flash_erase_wait\r
- }\r
-}\r
-\r
-proc flash_erase_wait {} {\r
- set SFLASH_RDSR 0x803100dc\r
- while {[expr [mrb $SFLASH_RDSR] & 0x01] != 0} {sleep 1}\r
-}\r
-\r
-proc flash_erase_wait_echo_sec {} {\r
- set SFLASH_RDSR 0x803100dc\r
- global count\r
- set count 0\r
- while {[expr [mrb $SFLASH_RDSR] & 0x01] != 0} {\r
- sleep 1000\r
- set count [expr $count+1]\r
- echo "please wait ($count)sec"\r
- }\r
-}\r
-\r
-# mrw: "memory read word", returns value of $reg\r
-proc mrw {reg} {\r
- set value ""\r
- mem2array value 32 $reg 1\r
- return $value(0)\r
-}\r
-\r
-# mrb: "memory read byte", returns value of $reg\r
-proc mrb {reg} {\r
- set value ""\r
- mem2array value 8 $reg 1\r
- return $value(0)\r
-}\r
-\r
-proc getScriptDirectory {} {\r
- set dispScriptFile [file normalize [info script]]\r
- set scriptFolder [file dirname $dispScriptFile]\r
- return $scriptFolder\r
-}\r
-\r
-proc fusing_image_all {} {\r
- fusing_image_boot\r
- fusing_image_os\r
- fusing_image_sss\r
- fusing_image_wlan\r
-}\r
-\r
-proc fusing_image_boot {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing nBL1"\r
- echo "----------------------------------------------------------------------"\r
- set BL1_PATH "../boot_bin/t20.nbl1.bin"\r
- load_image $BL1_PATH 0x60000000\r
- echo "Done"\r
-\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing BL2"\r
- echo "----------------------------------------------------------------------"\r
- set BL2_PATH "../boot_bin/t20.bl2.head.bin"\r
- load_image $BL2_PATH 0x60004000\r
- \r
- echo "Done"\r
-}\r
-\r
-proc fusing_image_os {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing Tizen RT"\r
- echo "----------------------------------------------------------------------"\r
- set OS_PATH "../../../output/bin/tinyara_head.bin"\r
- load_image $OS_PATH 0x6000C000\r
- echo "Done"\r
-}\r
-\r
-proc fusing_image_sss {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing SSS F/W..(size under 32KB)"\r
- echo "----------------------------------------------------------------------"\r
- set SSS_PATH "../boot_bin/t20.sss.fw.bin"\r
- load_image $SSS_PATH 0x602FC000\r
- echo "Done"\r
-}\r
-\r
-proc fusing_image_wlan {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing WLAN F/W..(size under 500KB)"\r
- echo "----------------------------------------------------------------------"\r
- set WLAN_PATH "../boot_bin/t20.wlan.bin"\r
- load_image $WLAN_PATH 0x60304000\r
- echo "Done"\r
-}\r
-\r
-proc s5jt200_shutdown {} {\r
- init\r
- catch {halt}\r
- echo "s5jt200_shutdown"\r
- shutdown\r
-}\r
-s5jt200_shutdown\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ wdt_disable
+ cmu_init
+ enable_region
+ flash_init
+ flash_chiperase
+ fusing_image_all
+ reset
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc wdt_disable {} {
+ echo "----------------------------------------------------------------------"
+ echo "DISABLE Watchdog reset"
+ echo "----------------------------------------------------------------------"
+ mww 0x80030000 0x00000000
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+#initialize mpu setting
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x1
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x2
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x3
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x5
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x6
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x7
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x8
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0x9
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0xA
+ arm mcr 15 0 6 1 2 0x8
+ arm mcr 15 0 6 2 0 0xB
+ arm mcr 15 0 6 1 2 0x8
+
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc flash_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80040020 0x00222222
+ mww 0x80040028 0x00333333
+ sleep 100
+ mww 0x80310004 0x8010000A
+ echo "Done"
+}
+
+proc flash_chiperase {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash Chiperase(Entire flash)"
+ echo "----------------------------------------------------------------------"
+ mwb 0x803100CE 0xFF
+
+ flash_erase_wait_echo_sec
+ echo "Done"
+}
+
+proc flash_erase_wait_echo_sec {} {
+ set SFLASH_RDSR 0x803100dc
+ global count
+ set count 0
+ while {[expr [mrb $SFLASH_RDSR] & 0x01] != 0} {
+ sleep 1000
+ set count [expr $count+1]
+ echo "please wait ($count)sec"
+ }
+}
+
+# mrb: "memory read byte", returns value of $reg
+proc mrb {reg} {
+ set value ""
+ mem2array value 8 $reg 1
+ return $value(0)
+}
+
+proc fusing_image_all {} {
+ fusing_image_boot
+ fusing_image_os
+ fusing_image_sss
+ fusing_image_wlan
+}
+
+proc fusing_image_boot {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing nBL1"
+ echo "----------------------------------------------------------------------"
+ set BL1_PATH "../boot_bin/t20.nbl1.bin"
+ load_image $BL1_PATH 0x60000000
+ echo "Done"
+
+ echo "----------------------------------------------------------------------"
+ echo "Fusing BL2"
+ echo "----------------------------------------------------------------------"
+ set BL2_PATH "../boot_bin/t20.bl2.head.bin"
+ load_image $BL2_PATH 0x60004000
+
+ echo "Done"
+}
+
+proc fusing_image_os {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing TinyAra"
+ echo "----------------------------------------------------------------------"
+ set OS_PATH "../../../output/bin/tinyara_head.bin"
+ load_image $OS_PATH 0x6000C000
+ echo "Done"
+}
+
+proc fusing_image_sss {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing SSS F/W..(size under 32KB)"
+ echo "----------------------------------------------------------------------"
+ set SSS_PATH "../boot_bin/t20.sss.fw.bin"
+ load_image $SSS_PATH 0x602FC000
+ echo "Done"
+}
+
+proc fusing_image_wlan {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing WLAN F/W..(size under 500KB)"
+ echo "----------------------------------------------------------------------"
+ set WLAN_PATH "../boot_bin/t20.wlan.bin"
+ load_image $WLAN_PATH 0x60304000
+ echo "Done"
+}
+
+proc s5jt200_shutdown {} {
+ init
+ catch {halt}
+ echo "s5jt200_shutdown"
+ shutdown
+}
+s5jt200_shutdown
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- wdt_disable \r
- cmu_init\r
- enable_region\r
- fusing_image_boot\r
- reset\r
- shutdown\r
-}\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc wdt_disable {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "DISABLE Watchdog reset"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80030000 0x00000000\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
-}\r
-\r
-proc fusing_image_boot {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing nBL1"\r
- echo "----------------------------------------------------------------------"\r
- set BL1_PATH "../boot_bin/t20.nbl1.bin"\r
- load_image $BL1_PATH 0x60000000\r
- echo "Done"\r
-\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing BL2"\r
- echo "----------------------------------------------------------------------"\r
- set BL2_PATH "../boot_bin/t20.bl2.head.bin"\r
- load_image $BL2_PATH 0x60004000\r
- \r
- echo "Done"\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ wdt_disable
+ cmu_init
+ enable_region
+ fusing_image_boot
+ reset
+ shutdown
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc wdt_disable {} {
+ echo "----------------------------------------------------------------------"
+ echo "DISABLE Watchdog reset"
+ echo "----------------------------------------------------------------------"
+ mww 0x80030000 0x00000000
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc fusing_image_boot {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing nBL1"
+ echo "----------------------------------------------------------------------"
+ set BL1_PATH "../boot_bin/t20.nbl1.bin"
+ load_image $BL1_PATH 0x60000000
+ echo "Done"
+
+ echo "----------------------------------------------------------------------"
+ echo "Fusing BL2"
+ echo "----------------------------------------------------------------------"
+ set BL2_PATH "../boot_bin/t20.bl2.head.bin"
+ load_image $BL2_PATH 0x60004000
+
+ echo "Done"
+}
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- reset halt\r
- cmu_init\r
- enable_region\r
- fusing_image_os\r
- reset\r
- shutdown\r
-}\r
-\r
-proc cmu_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "CMU initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80081818 0x00000002\r
- mww 0x8008181c 0x00000001\r
- mww 0x80081814 0x00000001\r
- mww 0x80081804 0x00000000\r
- mww 0x80081808 0x00000000\r
- mww 0x8008180c 0x00000000\r
- mww 0x80081810 0x00000000\r
- mww 0x80081800 0x00000003\r
- mww 0x80080000 0x007f0000\r
- mww 0x80080004 0x03104000\r
- mww 0x80080014 0x1071bf00\r
- mww 0x80081000 0x00000000\r
- mww 0x8008100c 0x00000000\r
- mww 0x80080180 0x00000010\r
- echo "Done"\r
-}\r
-\r
-proc enable_region {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Region enable"\r
- echo "----------------------------------------------------------------------"\r
- arm mcr 15 0 6 2 0 0x0\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x0\r
- \r
- arm mcr 15 0 6 2 0 0x4\r
- arm mcr 15 0 6 1 4 0x300\r
- arm mcr 15 0 6 1 2 0x3F\r
- arm mcr 15 0 6 1 0 0x60000000\r
- \r
- arm mcr 15 0 1 0 0 0x00e50879\r
- echo "Done"\r
-}\r
-\r
-proc fusing_image_os {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing Tizen RT"\r
- echo "----------------------------------------------------------------------"\r
- set OS_PATH "../../../output/bin/tinyara_head.bin"\r
- load_image $OS_PATH 0x6000C000\r
- echo "Done"\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ reset halt
+ cmu_init
+ enable_region
+ fusing_image_os
+ reset
+ shutdown
+}
+
+proc cmu_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "CMU initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80081818 0x00000002
+ mww 0x8008181c 0x00000001
+ mww 0x80081814 0x00000001
+ mww 0x80081804 0x00000000
+ mww 0x80081808 0x00000000
+ mww 0x8008180c 0x00000000
+ mww 0x80081810 0x00000000
+ mww 0x80081800 0x00000003
+ mww 0x80080000 0x007f0000
+ mww 0x80080004 0x03104000
+ mww 0x80080014 0x1071bf00
+ mww 0x80081000 0x00000000
+ mww 0x8008100c 0x00000000
+ mww 0x80080180 0x00000010
+ echo "Done"
+}
+
+proc enable_region {} {
+ echo "----------------------------------------------------------------------"
+ echo "Region enable"
+ echo "----------------------------------------------------------------------"
+ arm mcr 15 0 6 2 0 0x0
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x0
+
+ arm mcr 15 0 6 2 0 0x4
+ arm mcr 15 0 6 1 4 0x300
+ arm mcr 15 0 6 1 2 0x3F
+ arm mcr 15 0 6 1 0 0x60000000
+
+ arm mcr 15 0 1 0 0 0x00e50879
+ echo "Done"
+}
+
+proc fusing_image_os {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing TinyAra"
+ echo "----------------------------------------------------------------------"
+ set OS_PATH "../../../output/bin/tinyara_head.bin"
+ load_image $OS_PATH 0x6000C000
+ echo "Done"
+}
-###########################################################################\r
-#\r
-# Copyright 2016 Samsung Electronics All Rights Reserved.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing,\r
-# software distributed under the License is distributed on an\r
-# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,\r
-# either express or implied. See the License for the specific\r
-# language governing permissions and limitations under the License.\r
-#\r
-###########################################################################\r
-\r
-# OpenOCD config used to write firmware to\r
-# S5J internal flash memory via FTDI\r
-# USB FT2232H (SIDK S5JT200 Board)\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_layout "usbjtag"\r
-ft2232_vid_pid 0x0403 0x6010\r
-ft2232_device_desc "Dual RS232-HS A"\r
-\r
-#ft2232_serial SIDK_S5JT200_8A\r
-reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst\r
-\r
-set _CHIPNAME s5jt200\r
-set _ENDIAN little\r
-set _CPUTAPID 0x4BA00477\r
-\r
-adapter_khz 2000\r
-\r
-# jtag scan chain\r
-set _ARM_CR4_JTAGID1 0x3ba00477\r
-set _ARM_CR4_JTAGID2 0x4ba00477\r
-set _ARM_CR4_JTAGID3 0x5ba00477\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME $_CHIPNAME.cpu\r
-\r
-target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000\r
-$_TARGETNAME configure -event gdb-attach { reset init }\r
-$_TARGETNAME configure -event reset-init { \r
- echo "GDB connected.." \r
-}\r
-\r
-proc jtag_init {} {\r
- debug_level -1\r
- global _TARGETNAME\r
- jtag_reset 0 0\r
- jtag arp_init\r
- $_TARGETNAME arp_examine\r
- halt\r
- wdt_disable \r
- #reg \r
- flash_init\r
- flash_erase_boot \r
- fusing_image_os \r
- echo "now Attach GDB..(gdb target remote localhost:3333"\r
-}\r
-\r
-proc wdt_disable {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "DISABLE Watchdog reset"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80030000 0x00000000\r
- echo "Done"\r
-}\r
-\r
-proc flash_init {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "SFlash initialize"\r
- echo "----------------------------------------------------------------------"\r
- mww 0x80040020 0x00222222\r
- mww 0x80040028 0x00333333\r
- sleep 100\r
- mww 0x80310004 0x8010001A\r
- echo "Done"\r
-}\r
-\r
-proc flash_erase_boot {} {\r
- echo "erase bootloader in flash"\r
- flash_erase 0x04000000 0x4000\r
-}\r
-\r
-proc flash_erase {write_addr write_size} {\r
- global flash_write_addr flash_base target_addr end_addr\r
- set flash_write_addr $write_addr\r
- set flash_base 0x04000000\r
- set target_addr [expr $flash_write_addr-$flash_base]\r
- set end_addr [expr $target_addr+$write_size]\r
- while {$target_addr<$end_addr} {\r
- mww 0x80310010 $target_addr\r
- mwb 0x8031005E 0xff\r
- set target_addr [expr $target_addr+0x1000]\r
- flash_erase_wait\r
- }\r
-}\r
-\r
-proc flash_erase_wait {} {\r
- set SFLASH_RDSR 0x803100dc\r
- while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }\r
-}\r
-\r
-# mrw: "memory read word", returns value of $reg\r
-proc mrw {reg} {\r
- set value ""\r
- mem2array value 32 $reg 1\r
- return $value(0)\r
-}\r
-\r
-proc fusing_image_os {} {\r
- echo "----------------------------------------------------------------------"\r
- echo "Fusing Tinyara"\r
- echo "----------------------------------------------------------------------"\r
- set OS_PATH "../../../output/bin/tinyara.bin"\r
- load_image $OS_PATH 0x02020000\r
- echo "Done"\r
-}\r
+###########################################################################
+#
+# Copyright 2016-2017 Samsung Electronics All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###########################################################################
+
+# OpenOCD config used to write firmware to
+# S5J internal flash memory via FTDI
+# USB FT2232H (SIDK S5JT200 Board)
+
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+#interface
+interface ft2232
+ft2232_layout "usbjtag"
+ft2232_vid_pid 0x0403 0x6010
+ft2232_device_desc "Dual RS232-HS A"
+
+#ft2232_serial SIDK_S5JT200_8A
+reset_config trst_and_srst srst_push_pull srst_nogate connect_assert_srst
+
+set _CHIPNAME s5jt200
+set _ENDIAN little
+set _CPUTAPID 0x4BA00477
+
+adapter_khz 2000
+
+# jtag scan chain
+set _ARM_CR4_JTAGID1 0x3ba00477
+set _ARM_CR4_JTAGID2 0x4ba00477
+set _ARM_CR4_JTAGID3 0x5ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME cortex_r4 -endian $_ENDIAN -chain-position $_TARGETNAME -dbgbase 0x801E0000
+$_TARGETNAME configure -event gdb-attach { reset init }
+$_TARGETNAME configure -event reset-init {
+ echo "GDB connected.."
+}
+
+proc jtag_init {} {
+ debug_level -1
+ global _TARGETNAME
+ jtag_reset 0 0
+ jtag arp_init
+ $_TARGETNAME arp_examine
+ halt
+ wdt_disable
+ flash_init
+ flash_erase_boot
+ fusing_image_os
+ echo "now Attach GDB..(gdb target remote localhost:3333"
+}
+
+proc wdt_disable {} {
+ echo "----------------------------------------------------------------------"
+ echo "DISABLE Watchdog reset"
+ echo "----------------------------------------------------------------------"
+ mww 0x80030000 0x00000000
+ echo "Done"
+}
+
+proc flash_init {} {
+ echo "----------------------------------------------------------------------"
+ echo "SFlash initialize"
+ echo "----------------------------------------------------------------------"
+ mww 0x80040020 0x00222222
+ mww 0x80040028 0x00333333
+ sleep 100
+ mww 0x80310004 0x8010001A
+ echo "Done"
+}
+
+proc flash_erase_boot {} {
+ echo "erase bootloader in flash"
+ flash_erase 0x04000000 0x4000
+}
+
+proc flash_erase {write_addr write_size} {
+ global flash_write_addr flash_base target_addr end_addr
+ set flash_write_addr $write_addr
+ set flash_base 0x04000000
+ set target_addr [expr $flash_write_addr-$flash_base]
+ set end_addr [expr $target_addr+$write_size]
+ while {$target_addr<$end_addr} {
+ mww 0x80310010 $target_addr
+ mwb 0x8031005E 0xff
+ set target_addr [expr $target_addr+0x1000]
+ flash_erase_wait
+ }
+}
+
+proc flash_erase_wait {} {
+ set SFLASH_RDSR 0x803100dc
+ while {[expr [mrw $SFLASH_RDSR] & 0x01] != 0} { sleep 1 }
+}
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+ set value ""
+ mem2array value 32 $reg 1
+ return $value(0)
+}
+
+proc fusing_image_os {} {
+ echo "----------------------------------------------------------------------"
+ echo "Fusing TinyAra"
+ echo "----------------------------------------------------------------------"
+ set OS_PATH "../../../output/bin/tinyara.bin"
+ load_image $OS_PATH 0x02020000
+ echo "Done"
+}
projects / rtos / tinyara.git / commitdiff