amvecm: Revert "amvecm: add sharpness0 cvbs table in driver" [2/4]

PD#SWPL-8450

Problem:
add cvbs table in db

Solution:
remove cvbs table in driver

Verify:
U212

Change-Id: I5db52c6bbf8f00f94834d8bf151135892602b56a
Signed-off-by: Bencheng Jing <bencheng.jing@amlogic.com>

diff --git a/drivers/amlogic/media/enhancement/amvecm/amcm_regmap.h b/drivers/amlogic/media/enhancement/amvecm/amcm_regmap.h
index bf8a1aa..1c2c3d3 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amcm_regmap.h
+++ b/drivers/amlogic/media/enhancement/amvecm/amcm_regmap.h
@@ -918,172 +918,6 @@ static struct am_regs_s cmreg_enhancement = {
        }
 };
 
-/*sr0 sharpness reg*/
-struct am_regs_s sr0reg_cvbs = {
-       109,
-       {
-       {REG_TYPE_VCBUS, SHARP0_SHARP_HVSIZE, 0xffffffff, 0x02d00240},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_HVBLANK_NUM, 0xffffffff, 0x00001e58},
-       {REG_TYPE_VCBUS, SHARP0_NR_GAUSSIAN_MODE, 0xffffffff, 0x00000010},
-       {REG_TYPE_VCBUS, SHARP0_PKOSHT_VSLUMA_LUT_L, 0xffffffff, 0x56667ac8},
-       {REG_TYPE_VCBUS, SHARP0_PKOSHT_VSLUMA_LUT_H, 0xffffffff, 0x00000004},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2CIRHPGAIN_TH_RATE,
-               0xffffffff, 0x14323218},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2CIRHPGAIN_LIMIT,
-               0xffffffff, 0x50845e00},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2CIRBPGAIN_TH_RATE,
-               0xffffffff, 0x14323218},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2CIRBPGAIN_LIMIT,
-               0xffffffff, 0x508d5000},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2DRTHPGAIN_TH_RATE,
-               0xffffffff, 0x14323218},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2DRTHPGAIN_LIMIT,
-               0xffffffff, 0x3d3d1f00},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2DRTBPGAIN_TH_RATE,
-               0xffffffff, 0x14323218},
-       {REG_TYPE_VCBUS, SHARP0_PK_CON_2DRTBPGAIN_LIMIT,
-               0xffffffff, 0x38390c00},
-       {REG_TYPE_VCBUS, SHARP0_PK_CIRFB_LPF_MODE, 0xffffffff, 0x22202220},
-       {REG_TYPE_VCBUS, SHARP0_PK_DRTFB_LPF_MODE, 0xffffffff, 0x22202220},
-       {REG_TYPE_VCBUS, SHARP0_PK_CIRFB_HP_CORING, 0xffffffff, 0x00020202},
-       {REG_TYPE_VCBUS, SHARP0_PK_CIRFB_BP_CORING, 0xffffffff, 0x00020202},
-       {REG_TYPE_VCBUS, SHARP0_PK_DRTFB_HP_CORING, 0xffffffff, 0x00020202},
-       {REG_TYPE_VCBUS, SHARP0_PK_DRTFB_BP_CORING, 0xffffffff, 0x00020202},
-       {REG_TYPE_VCBUS, SHARP0_PK_CIRFB_BLEND_GAIN, 0xffffffff, 0x38402840},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALPY_SSD_GAIN_OFST,
-               0xffffffff, 0x0000103e},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP0Y_ERR2CURV_TH_RATE,
-               0xffffffff, 0x0a195040},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP0Y_ERR2CURV_LIMIT,
-               0xffffffff, 0x3f003f00},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP0C_ERR2CURV_TH_RATE,
-               0xffffffff, 0x0a195040},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP0C_ERR2CURV_LIMIT,
-               0xffffffff, 0x3f003f00},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP0_MIN_MAX, 0xffffffff, 0x003f003f},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP1_MIERR_CORING,
-               0xffffffff, 0x00000003},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP1_ERR2CURV_TH_RATE,
-               0xffffffff, 0x00180014},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP1_ERR2CURV_LIMIT,
-               0xffffffff, 0x00103f00},
-       {REG_TYPE_VCBUS, SHARP0_NR_ALP1_MIN_MAX, 0xffffffff, 0x003f003f},
-       {REG_TYPE_VCBUS, SHARP0_PK_ALP2_MIERR_CORING,
-               0xffffffff, 0x00010001},
-       {REG_TYPE_VCBUS, SHARP0_PK_ALP2_ERR2CURV_TH_RATE,
-               0xffffffff, 0x0018000a},
-       {REG_TYPE_VCBUS, SHARP0_PK_ALP2_ERR2CURV_LIMIT,
-               0xffffffff, 0x00402000},
-       {REG_TYPE_VCBUS, SHARP0_PK_ALP2_MIN_MAX, 0xffffffff, 0x0000003f},
-       {REG_TYPE_VCBUS, SHARP0_PK_FINALGAIN_HP_BP,
-               0xffffffff, 0x00001414},
-       {REG_TYPE_VCBUS, SHARP0_PK_OS_HORZ_CORE_GAIN,
-               0xffffffff, 0x08140214},
-       {REG_TYPE_VCBUS, SHARP0_PK_OS_VERT_CORE_GAIN,
-               0xffffffff, 0x08140214},
-       {REG_TYPE_VCBUS, SHARP0_PK_OS_ADPT_MISC,
-               0xffffffff, 0x2806c814},
-       {REG_TYPE_VCBUS, SHARP0_PK_OS_STATIC, 0xffffffff, 0x2203f03f},
-       {REG_TYPE_VCBUS, SHARP0_PK_NR_ENABLE, 0xffffffff, 0x00000000},
-       {REG_TYPE_VCBUS, SHARP0_PK_DRT_SAD_MISC, 0xffffffff, 0x12120018},
-       {REG_TYPE_VCBUS, SHARP0_NR_TI_DNLP_BLEND, 0xffffffff, 0x00000407},
-       {REG_TYPE_VCBUS, SHARP0_TI_DIR_CORE_ALPHA, 0xffffffff, 0x0a00003f},
-       {REG_TYPE_VCBUS, SHARP0_CTI_DIR_ALPHA, 0xffffffff, 0x0400003f},
-       {REG_TYPE_VCBUS, SHARP0_LTI_CTI_DF_GAIN, 0xffffffff, 0x0c0c0c0c},
-       {REG_TYPE_VCBUS, SHARP0_LTI_CTI_DIR_AC_DBG, 0xffffffff, 0x56ee0000},
-       {REG_TYPE_VCBUS, SHARP0_HCTI_FLT_CLP_DC, 0xffffffff, 0x05555300},
-       {REG_TYPE_VCBUS, SHARP0_HCTI_BST_GAIN, 0xffffffff, 0x050a0a00},
-       {REG_TYPE_VCBUS, SHARP0_HCTI_BST_CORE, 0xffffffff, 0x03030303},
-       {REG_TYPE_VCBUS, SHARP0_HCTI_CON_2_GAIN_0, 0xffffffff, 0x24193c05},
-       {REG_TYPE_VCBUS, SHARP0_HCTI_CON_2_GAIN_1, 0xffffffff, 0x4b055014},
-       {REG_TYPE_VCBUS, SHARP0_HCTI_OS_MARGIN, 0xffffffff, 0x00000000},
-       {REG_TYPE_VCBUS, SHARP0_HLTI_FLT_CLP_DC, 0xffffffff, 0x00152100},
-       {REG_TYPE_VCBUS, SHARP0_HLTI_BST_GAIN, 0xffffffff, 0x06060600},
-       {REG_TYPE_VCBUS, SHARP0_HLTI_BST_CORE, 0xffffffff, 0x03030303},
-       {REG_TYPE_VCBUS, SHARP0_HLTI_CON_2_GAIN_0, 0xffffffff, 0x24193c05},
-       {REG_TYPE_VCBUS, SHARP0_HLTI_CON_2_GAIN_1, 0xffffffff, 0x66635e24},
-       {REG_TYPE_VCBUS, SHARP0_HLTI_OS_MARGIN, 0xffffffff, 0x00000000},
-       {REG_TYPE_VCBUS, SHARP0_VLTI_FLT_CON_CLP, 0xffffffff, 0x00002a94},
-       {REG_TYPE_VCBUS, SHARP0_VLTI_BST_GAIN, 0xffffffff, 0x00202020},
-       {REG_TYPE_VCBUS, SHARP0_VLTI_BST_CORE, 0xffffffff, 0x00050503},
-       {REG_TYPE_VCBUS, SHARP0_VLTI_CON_2_GAIN_0, 0xffffffff, 0x193c0560},
-       {REG_TYPE_VCBUS, SHARP0_VLTI_CON_2_GAIN_1, 0xffffffff, 0x5f501400},
-       {REG_TYPE_VCBUS, SHARP0_VCTI_FLT_CON_CLP, 0xffffffff, 0x00002a94},
-       {REG_TYPE_VCBUS, SHARP0_VCTI_BST_GAIN, 0xffffffff, 0x00101010},
-       {REG_TYPE_VCBUS, SHARP0_VCTI_BST_CORE, 0xffffffff, 0x00050503},
-       {REG_TYPE_VCBUS, SHARP0_VCTI_CON_2_GAIN_0, 0xffffffff, 0x193c0560},
-       {REG_TYPE_VCBUS, SHARP0_VCTI_CON_2_GAIN_1, 0xffffffff, 0x5f501400},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_3DLIMIT, 0xffffffff, 0x03c0021c},
-       /*{REG_TYPE_VCBUS, SHARP0_SHARP_SR2_CTRL, 0xffffffff, 0x0018103c},*/
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_YBIC_HCOEF0,
-               0xffffffff, 0x00004000},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_YBIC_HCOEF1,
-               0xffffffff, 0xfc2424fc},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_CBIC_HCOEF0,
-               0xffffffff, 0x00004000},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_CBIC_HCOEF1,
-               0xffffffff, 0xfc2424fc},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_YBIC_VCOEF0,
-               0xffffffff, 0x00004000},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_YBIC_VCOEF1,
-               0xffffffff, 0xfc2424fc},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_CBIC_VCOEF0,
-               0xffffffff, 0x00004000},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_CBIC_VCOEF1,
-               0xffffffff, 0xfc2424fc},
-       {REG_TYPE_VCBUS, SHARP0_SHARP_SR2_MISC, 0xffffffff, 0x00000000},
-       {REG_TYPE_VCBUS, SHARP0_SR3_SAD_CTRL, 0xffffffff, 0x060606ff},
-       {REG_TYPE_VCBUS, SHARP0_SR3_PK_CTRL0, 0xffffffff, 0x00000ffc},
-       {REG_TYPE_VCBUS, SHARP0_SR3_PK_CTRL1, 0xffffffff, 0x112020cc},
-       {REG_TYPE_VCBUS, SHARP0_DEJ_CTRL, 0xffffffff, 0x0000000f},
-       {REG_TYPE_VCBUS, SHARP0_DEJ_ALPHA, 0xffffffff, 0x0f0f4646},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DRTLPF_EN, 0xffffffff, 0x00000037},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DRTLPF_ALPHA_0,
-               0xffffffff, 0x0405050c},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DRTLPF_ALPHA_1,
-               0xffffffff, 0x01040708},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DRTLPF_ALPHA_2,
-               0xffffffff, 0x00000000},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DRTLPF_ALPHA_OFST,
-               0xffffffff, 0x000e000e},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_CTRL,
-               0xffffffff, 0x1392281c},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_LUMA2PKGAIN_0TO3,
-               0xffffffff, 0xffffc81e},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_LUMA2PKGAIN_4TO6,
-               0xffffffff, 0x001832ff},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_LUMA2PKOS_0TO3,
-               0xffffffff, 0xffffc81e},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_LUMA2PKOS_4TO6,
-               0xffffffff, 0x001832ff},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_GAINVS_MADSAD,
-               0xffffffff, 0x00000048},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_GAINVS_VR2MAX,
-               0xffffffff, 0xffffec20},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DERING_PARAM0,
-               0xffffffff, 0x000a2010},
-       {REG_TYPE_VCBUS, SHARP0_SR3_DRTLPF_THETA,
-               0xffffffff, 0xfec96420},
-       {REG_TYPE_VCBUS, SHARP0_SATPRT_CTRL, 0xffffffff, 0x00054006},
-       {REG_TYPE_VCBUS, SHARP0_SATPRT_DIVM, 0xffffffff, 0x00808080},
-       {REG_TYPE_VCBUS, SHARP0_DB_FLT_CTRL, 0xffffffff, 0x06e222fa},
-       {REG_TYPE_VCBUS, SHARP0_DB_FLT_YC_THRD,
-               0xffffffff, 0x97659765},
-       {REG_TYPE_VCBUS, SHARP0_DB_FLT_RANDLUT,
-               0xffffffff, 0x00249249},
-       {REG_TYPE_VCBUS, SHARP0_DB_FLT_PXI_THRD,
-               0xffffffff, 0x00000000},
-       {REG_TYPE_VCBUS, SHARP0_DB_FLT_SEED_Y, 0xffffffff, 0x60a52f20},
-       {REG_TYPE_VCBUS, SHARP0_DB_FLT_SEED_U, 0xffffffff, 0x60a52f27},
-       {REG_TYPE_VCBUS, SHARP0_DB_FLT_SEED_V, 0xffffffff, 0x60a52f22},
-       {REG_TYPE_VCBUS, SHARP0_PKGAIN_VSLUMA_LUT_L,
-               0xffffffff, 0x56667ac8},
-       {REG_TYPE_VCBUS, SHARP0_PKGAIN_VSLUMA_LUT_H,
-               0xffffffff, 0x00000004},
-       {0}
-       }
-};
-
 /*sr1 sharpness reg*/
 struct am_regs_s sr1reg_sd_scale = {
        109,

diff --git a/drivers/amlogic/media/enhancement/amvecm/amve.c b/drivers/amlogic/media/enhancement/amvecm/amve.c
index ec05583..e9e8e07 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amve.c
+++ b/drivers/amlogic/media/enhancement/amvecm/amve.c
@@ -1310,9 +1310,6 @@ void amvecm_3d_sync_process(void)
 #define SR_NOSCALE_LEVEL 0x10
 static void amve_sr_reg_setting(unsigned int adaptive_level)
 {
-       if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-               is_meson_sm1_cpu())
-               goto g12_sr_reg_setting;
        if (adaptive_level & SR_SD_SCALE_LEVEL)
                am_set_regmap(&sr1reg_sd_scale);
        else if (adaptive_level & SR_HD_SCALE_LEVEL)
@@ -1329,12 +1326,6 @@ static void amve_sr_reg_setting(unsigned int adaptive_level)
                am_set_regmap(&sr1reg_cvbs);
        else if (adaptive_level & SR_NOSCALE_LEVEL)
                am_set_regmap(&sr1reg_hv_noscale);
-       return;
-g12_sr_reg_setting:
-       /*for g12a and g12b, load sr0 cvbs table when output cvbs mode*/
-       if (adaptive_level & SR_CVBS_LEVEL)
-               am_set_regmap(&sr0reg_cvbs);
-       return;
 }
 void amve_sharpness_adaptive_setting(struct vframe_s *vf,
         unsigned int sps_h_en, unsigned int sps_v_en)

diff --git a/drivers/amlogic/media/enhancement/amvecm/amve.h b/drivers/amlogic/media/enhancement/amvecm/amve.h
index 3a7faee..d90c1e0 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amve.h
+++ b/drivers/amlogic/media/enhancement/amvecm/amve.h
@@ -155,7 +155,6 @@ extern void amve_sharpness_adaptive_setting(struct vframe_s *vf,
 extern void amve_sharpness_init(void);
 extern struct am_regs_s sr1reg_sd_scale;
 extern struct am_regs_s sr1reg_hd_scale;
-extern struct am_regs_s sr0reg_cvbs;
 extern struct am_regs_s sr1reg_cvbs;
 extern struct am_regs_s sr1reg_hv_noscale;
 extern void amvecm_fresh_overscan(struct vframe_s *vf);

diff --git a/drivers/amlogic/media/enhancement/amvecm/amvecm.c b/drivers/amlogic/media/enhancement/amvecm/amvecm.c
index 4a54c83..fdb4f36 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amvecm.c
+++ b/drivers/amlogic/media/enhancement/amvecm/amvecm.c
@@ -1110,8 +1110,7 @@ int amvecm_on_vs(
        /* add some flag to trigger */
        if (vf) {
                /*gxlx sharpness adaptive setting*/
-               if (is_meson_gxlx_cpu() || is_meson_g12a_cpu()
-               || is_meson_g12b_cpu() || is_meson_sm1_cpu())
+               if (is_meson_gxlx_cpu())
                        amve_sharpness_adaptive_setting(vf,
                                sps_h_en, sps_v_en);
                amvecm_bricon_process(