arm64: dts: exynos: add a specific compatible to MCT
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 4 Apr 2022 16:52:55 +0000 (18:52 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 4 Apr 2022 16:52:55 +0000 (18:52 +0200)
One compatible is used for the Multi-Core Timer on most of the Samsung
Exynos SoCs, which is correct but not specific enough.  These MCT blocks
have different number of interrupts, so add a second specific
compatible to Exynos5433 and Exynos850.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220304122424.307885-4-krzysztof.kozlowski@canonical.com
arch/arm64/boot/dts/exynos/exynos5433.dtsi
arch/arm64/boot/dts/exynos/exynos850.dtsi

index 661567d..017ccc2 100644 (file)
                };
 
                timer@101c0000 {
-                       compatible = "samsung,exynos4210-mct";
+                       compatible = "samsung,exynos5433-mct",
+                                    "samsung,exynos4210-mct";
                        reg = <0x101c0000 0x800>;
                        interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
index 1c6d8fd..9076afd 100644 (file)
                };
 
                timer@10040000 {
-                       compatible = "samsung,exynos4210-mct";
+                       compatible = "samsung,exynos850-mct",
+                                    "samsung,exynos4210-mct";
                        reg = <0x10040000 0x800>;
                        interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,