ret i1 %cmp
}
+define i1 @ctlz_ugt_other_multiuse_i32(i32 %x, i32* %p) {
+; CHECK-LABEL: @ctlz_ugt_other_multiuse_i32(
+; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
+; CHECK-NEXT: store i32 [[LZ]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[LZ]], 16
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %lz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+ store i32 %lz, i32* %p
+ %cmp = icmp ugt i32 %lz, 16
+ ret i1 %cmp
+}
+
define i1 @ctlz_ugt_bw_minus_one_i32(i32 %x) {
; CHECK-LABEL: @ctlz_ugt_bw_minus_one_i32(
; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
ret i1 %cmp
}
-define i1 @ctlz_ult_one_i32(i32 %x) {
-; CHECK-LABEL: @ctlz_ult_one_i32(
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
-; CHECK-NEXT: ret i1 [[CMP]]
+define <2 x i1> @ctlz_ult_one_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @ctlz_ult_one_v2i32(
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
- %lz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
- %cmp = icmp ult i32 %lz, 1
- ret i1 %cmp
+ %lz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %lz, <i32 1, i32 1>
+ ret <2 x i1> %cmp
}
-define i1 @ctlz_ult_other_i32(i32 %x) {
-; CHECK-LABEL: @ctlz_ult_other_i32(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[LZ]], 16
-; CHECK-NEXT: ret i1 [[CMP]]
+define <2 x i1> @ctlz_ult_other_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @ctlz_ult_other_v2i32(
+; CHECK-NEXT: [[LZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[LZ]], <i32 16, i32 16>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
- %lz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
- %cmp = icmp ult i32 %lz, 16
- ret i1 %cmp
+ %lz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %lz, <i32 16, i32 16>
+ ret <2 x i1> %cmp
}
-define i1 @ctlz_ult_bw_minus_one_i32(i32 %x) {
-; CHECK-LABEL: @ctlz_ult_bw_minus_one_i32(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[LZ]], 31
-; CHECK-NEXT: ret i1 [[CMP]]
+define <2 x i1> @ctlz_ult_other_multiuse_v2i32(<2 x i32> %x, <2 x i32>* %p) {
+; CHECK-LABEL: @ctlz_ult_other_multiuse_v2i32(
+; CHECK-NEXT: [[LZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: store <2 x i32> [[LZ]], <2 x i32>* [[P:%.*]], align 8
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[LZ]], <i32 16, i32 16>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
- %lz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
- %cmp = icmp ult i32 %lz, 31
- ret i1 %cmp
+ %lz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 false)
+ store <2 x i32> %lz, <2 x i32>* %p
+ %cmp = icmp ult <2 x i32> %lz, <i32 16, i32 16>
+ ret <2 x i1> %cmp
}
-define i1 @ctlz_ult_bitwidth_i32(i32 %x) {
-; CHECK-LABEL: @ctlz_ult_bitwidth_i32(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[LZ]], 32
-; CHECK-NEXT: ret i1 [[CMP]]
+define <2 x i1> @ctlz_ult_bw_minus_one_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @ctlz_ult_bw_minus_one_v2i32(
+; CHECK-NEXT: [[LZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[LZ]], <i32 31, i32 31>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
- %lz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
- %cmp = icmp ult i32 %lz, 32
- ret i1 %cmp
+ %lz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %lz, <i32 31, i32 31>
+ ret <2 x i1> %cmp
+}
+
+define <2 x i1> @ctlz_ult_bitwidth_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @ctlz_ult_bitwidth_v2i32(
+; CHECK-NEXT: [[LZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[LZ]], <i32 32, i32 32>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %lz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %lz, <i32 32, i32 32>
+ ret <2 x i1> %cmp
}
define i1 @cttz_ne_bitwidth_i33(i33 %x) {
define i1 @cttz_eq_other_i33_multiuse(i33 %x, i33* %p) {
; CHECK-LABEL: @cttz_eq_other_i33_multiuse(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
-; CHECK-NEXT: store i33 [[LZ]], i33* [[P:%.*]], align 4
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i33 [[LZ]], 4
+; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
+; CHECK-NEXT: store i33 [[TZ]], i33* [[P:%.*]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i33 [[TZ]], 4
; CHECK-NEXT: ret i1 [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- store i33 %lz, i33* %p
- %cmp = icmp eq i33 %lz, 4
+ %tz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
+ store i33 %tz, i33* %p
+ %cmp = icmp eq i33 %tz, 4
ret i1 %cmp
}
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i33 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ugt i33 %lz, 0
+ %tz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
+ %cmp = icmp ugt i33 %tz, 0
ret i1 %cmp
}
define i1 @cttz_ugt_one_i33(i33 %x) {
; CHECK-LABEL: @cttz_ugt_one_i33(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[LZ]], 1
+; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[TZ]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ugt i33 %lz, 1
+ %tz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
+ %cmp = icmp ugt i33 %tz, 1
ret i1 %cmp
}
define i1 @cttz_ugt_other_i33(i33 %x) {
; CHECK-LABEL: @cttz_ugt_other_i33(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[LZ]], 16
+; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[TZ]], 16
; CHECK-NEXT: ret i1 [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ugt i33 %lz, 16
+ %tz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
+ %cmp = icmp ugt i33 %tz, 16
ret i1 %cmp
}
-define i1 @cttz_ugt_bw_minus_one_i33(i33 %x) {
-; CHECK-LABEL: @cttz_ugt_bw_minus_one_i33(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[LZ]], 32
+define i1 @cttz_ugt_other_multiuse_i33(i33 %x, i33* %p) {
+; CHECK-LABEL: @cttz_ugt_other_multiuse_i33(
+; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
+; CHECK-NEXT: store i33 [[TZ]], i33* [[P:%.*]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[TZ]], 16
; CHECK-NEXT: ret i1 [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ugt i33 %lz, 32
+ %tz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
+ store i33 %tz, i33* %p
+ %cmp = icmp ugt i33 %tz, 16
ret i1 %cmp
}
-define i1 @cttz_ult_one_i33(i33 %x) {
-; CHECK-LABEL: @cttz_ult_one_i33(
-; CHECK-NEXT: [[TMP1:%.*]] = and i33 [[X:%.*]], 1
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i33 [[TMP1]], 0
+define i1 @cttz_ugt_bw_minus_one_i33(i33 %x) {
+; CHECK-LABEL: @cttz_ugt_bw_minus_one_i33(
+; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[TZ]], 32
; CHECK-NEXT: ret i1 [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ult i33 %lz, 1
+ %tz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
+ %cmp = icmp ugt i33 %tz, 32
ret i1 %cmp
}
-define i1 @cttz_ult_other_i33(i33 %x) {
-; CHECK-LABEL: @cttz_ult_other_i33(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i33 [[LZ]], 16
-; CHECK-NEXT: ret i1 [[CMP]]
+define <2 x i1> @cttz_ult_one_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @cttz_ult_one_v2i32(
+; CHECK-NEXT: [[CMP:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i1>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ult i33 %lz, 16
- ret i1 %cmp
+ %tz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %tz, <i32 1, i32 1>
+ ret <2 x i1> %cmp
}
-define i1 @cttz_ult_bw_minus_one_i33(i33 %x) {
-; CHECK-LABEL: @cttz_ult_bw_minus_one_i33(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i33 [[LZ]], 32
-; CHECK-NEXT: ret i1 [[CMP]]
+define <2 x i1> @cttz_ult_other_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @cttz_ult_other_v2i32(
+; CHECK-NEXT: [[TZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TZ]], <i32 16, i32 16>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ult i33 %lz, 32
- ret i1 %cmp
+ %tz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %tz, <i32 16, i32 16>
+ ret <2 x i1> %cmp
}
-define i1 @cttz_ult_bitwidth_i33(i33 %x) {
-; CHECK-LABEL: @cttz_ult_bitwidth_i33(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i33 [[LZ]], 33
-; CHECK-NEXT: ret i1 [[CMP]]
+define <2 x i1> @cttz_ult_other_multiuse_v2i32(<2 x i32> %x, <2 x i32>* %p) {
+; CHECK-LABEL: @cttz_ult_other_multiuse_v2i32(
+; CHECK-NEXT: [[TZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: store <2 x i32> [[TZ]], <2 x i32>* [[P:%.*]], align 8
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TZ]], <i32 16, i32 16>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
- %lz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
- %cmp = icmp ult i33 %lz, 33
- ret i1 %cmp
+ %tz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 false)
+ store <2 x i32> %tz, <2 x i32>* %p
+ %cmp = icmp ult <2 x i32> %tz, <i32 16, i32 16>
+ ret <2 x i1> %cmp
+}
+
+define <2 x i1> @cttz_ult_bw_minus_one_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @cttz_ult_bw_minus_one_v2i32(
+; CHECK-NEXT: [[TZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TZ]], <i32 31, i32 31>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %tz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %tz, <i32 31, i32 31>
+ ret <2 x i1> %cmp
+}
+
+define <2 x i1> @cttz_ult_bitwidth_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @cttz_ult_bitwidth_v2i32(
+; CHECK-NEXT: [[TZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false)
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TZ]], <i32 32, i32 32>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %tz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 false)
+ %cmp = icmp ult <2 x i32> %tz, <i32 32, i32 32>
+ ret <2 x i1> %cmp
}
define i1 @ctpop_eq_zero_i11(i11 %x) {