arm64: dts: imx93: add "fsl,imx8ulp-lpuart" compatible for imx93
authorSherry Sun <sherry.sun@nxp.com>
Tue, 27 Jun 2023 02:53:31 +0000 (10:53 +0800)
committerShawn Guo <shawnguo@kernel.org>
Tue, 18 Jul 2023 03:37:36 +0000 (11:37 +0800)
i.MX93 and i.MX8ULP lpuart add some new featurs based on i.MX7ULP, for
example, i.MX93 and i.MX8ULP can support EOP(end-of-packet) function
while i.MX7ULP doesn't support, so add "fsl,imx8ulp-lpuart" compatible
string for i.MX93 to support those new features.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx93.dtsi

index 285e809..16e6073 100644 (file)
                        };
 
                        lpuart1: serial@44380000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x44380000 0x1000>;
                                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART1_GATE>;
                        };
 
                        lpuart2: serial@44390000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x44390000 0x1000>;
                                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART2_GATE>;
                        };
 
                        lpuart3: serial@42570000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x42570000 0x1000>;
                                interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART3_GATE>;
                        };
 
                        lpuart4: serial@42580000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x42580000 0x1000>;
                                interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART4_GATE>;
                        };
 
                        lpuart5: serial@42590000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x42590000 0x1000>;
                                interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART5_GATE>;
                        };
 
                        lpuart6: serial@425a0000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x425a0000 0x1000>;
                                interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART6_GATE>;
                        };
 
                        lpuart7: serial@42690000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x42690000 0x1000>;
                                interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART7_GATE>;
                        };
 
                        lpuart8: serial@426a0000 {
-                               compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
+                               compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x426a0000 0x1000>;
                                interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX93_CLK_LPUART8_GATE>;