hdmitx: disable clk when vout disable hdmitx [1/1]

PD#SWPL-12382

Problem:
active hdmitx clk will cause cvbsout clk cleared by bl30 auto limitation

Solution:
disable hdmitx clk when vout disable hdmitx

Verify:
p281

Change-Id: Ie9da30173d682901e9160a0db9c775c204a770f9
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>

diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c
index fa6aaec..87cdddf 100644 (file)
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c
@@ -3761,8 +3761,7 @@ static int hdmitx_module_disable(enum vmode_e cur_vmod)
        hdev->HWOp.CntlConfig(hdev, CONF_CLR_AVI_PACKET, 0);
        hdev->HWOp.CntlConfig(hdev, CONF_CLR_VSDB_PACKET, 0);
        hdev->HWOp.CntlMisc(hdev, MISC_TMDS_PHY_OP, TMDS_PHY_DISABLE);
-       if (hdev->para->hdmitx_vinfo.viu_mux == VIU_MUX_ENCI)
-               hdmitx_disable_vclk2_enci(hdev);
+       hdmitx_disable_clk(hdev);
        hdev->para = hdmi_get_fmt_name("invalid", hdev->fmt_attr);
        hdmitx_validate_vmode("null");
        if (hdev->cedst_policy)

diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c
index d139bfb..219bcf3 100644 (file)
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c
@@ -2189,9 +2189,6 @@ static void hdmitx_set_scdc(struct hdmitx_dev *hdev)
 
 void hdmitx_set_enc_hw(struct hdmitx_dev *hdev)
 {
-       if (hdev->para->hdmitx_vinfo.viu_mux == VIU_MUX_ENCI)
-               hdmitx_set_vclk2_enci(hdev);
-
        set_vmode_enc_hw(hdev);
 
        if (hdev->flag_3dfp) {

diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
index 90f2e3a..acd2d7a 100644 (file)
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
@@ -67,35 +67,52 @@ void hdmitx_set_sys_clk(struct hdmitx_dev *hdev, unsigned char flag)
 
        if (flag&2) {
                hdmitx_set_top_pclk(hdev);
-               hdmitx_set_vclk2_encp(hdev);
+
+               hd_write_reg(P_HHI_GCLK_OTHER,
+                       hd_read_reg(P_HHI_GCLK_OTHER)|(1<<17));
        }
 }
 
-void hdmitx_set_vclk2_encp(struct hdmitx_dev *hdev)
+static void hdmitx_disable_encp_clk(struct hdmitx_dev *hdev)
 {
-       hd_write_reg(P_HHI_GCLK_OTHER,
-               hd_read_reg(P_HHI_GCLK_OTHER)|(1<<17));
+       hd_set_reg_bits(P_HHI_VID_CLK_CNTL2, 0, 2, 1);
+
+#ifdef CONFIG_AMLOGIC_VPU
+       switch_vpu_clk_gate_vmod(VPU_VENCP, VPU_CLK_GATE_OFF);
+       switch_vpu_mem_pd_vmod(VPU_VENCP, VPU_MEM_POWER_DOWN);
+#endif
 }
 
-void hdmitx_disable_vclk2_enci(struct hdmitx_dev *hdev)
+static void hdmitx_enable_encp_clk(struct hdmitx_dev *hdev)
 {
-       if (hdev->hdmitx_clk_tree.venci_top_gate)
-               clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_top_gate);
+#ifdef CONFIG_AMLOGIC_VPU
+       switch_vpu_clk_gate_vmod(VPU_VENCP, VPU_CLK_GATE_ON);
+       switch_vpu_mem_pd_vmod(VPU_VENCP, VPU_MEM_POWER_ON);
+#endif
 
-       if (hdev->hdmitx_clk_tree.venci_0_gate)
-               clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_0_gate);
+       hd_set_reg_bits(P_HHI_VID_CLK_CNTL2, 1, 2, 1);
+}
 
-       if (hdev->hdmitx_clk_tree.venci_1_gate)
-               clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_1_gate);
+static void hdmitx_disable_enci_clk(struct hdmitx_dev *hdev)
+{
+       hd_set_reg_bits(P_HHI_VID_CLK_CNTL2, 0, 0, 1);
 
 #ifdef CONFIG_AMLOGIC_VPU
        switch_vpu_clk_gate_vmod(VPU_VENCI, VPU_CLK_GATE_OFF);
        switch_vpu_mem_pd_vmod(VPU_VENCI, VPU_MEM_POWER_DOWN);
 #endif
 
+       if (hdev->hdmitx_clk_tree.venci_top_gate)
+               clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_top_gate);
+
+       if (hdev->hdmitx_clk_tree.venci_0_gate)
+               clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_0_gate);
+
+       if (hdev->hdmitx_clk_tree.venci_1_gate)
+               clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_1_gate);
 }
 
-void hdmitx_set_vclk2_enci(struct hdmitx_dev *hdev)
+static void hdmitx_enable_enci_clk(struct hdmitx_dev *hdev)
 {
        if (hdev->hdmitx_clk_tree.venci_top_gate)
                clk_prepare_enable(hdev->hdmitx_clk_tree.venci_top_gate);
@@ -111,6 +128,12 @@ void hdmitx_set_vclk2_enci(struct hdmitx_dev *hdev)
        switch_vpu_mem_pd_vmod(VPU_VENCI, VPU_MEM_POWER_ON);
 #endif
 
+       hd_set_reg_bits(P_HHI_VID_CLK_CNTL2, 1, 0, 1);
+}
+
+static void hdmitx_disable_tx_pixel_clk(struct hdmitx_dev *hdev)
+{
+       hd_set_reg_bits(P_HHI_VID_CLK_CNTL2, 0, 5, 1);
 }
 
 void hdmitx_set_cts_sys_clk(struct hdmitx_dev *hdev)
@@ -730,7 +753,6 @@ static void set_encp_div(unsigned int div)
        if (div == -1)
                return;
        hd_set_reg_bits(P_HHI_VID_CLK_DIV, div, 24, 4);
-       hd_set_reg_bits(P_HHI_VID_CLK_CNTL2, 1, 2, 1);
        hd_set_reg_bits(P_HHI_VID_CLK_CNTL, 1, 19, 1);
 }
 
@@ -740,7 +762,6 @@ static void set_enci_div(unsigned int div)
        if (div == -1)
                return;
        hd_set_reg_bits(P_HHI_VID_CLK_DIV, div, 28, 4);
-       hd_set_reg_bits(P_HHI_VID_CLK_CNTL2, 1, 0, 1);
        hd_set_reg_bits(P_HHI_VID_CLK_CNTL, 1, 19, 1);
 }
 
@@ -1079,8 +1100,14 @@ next:
        pr_info("j = %d  vid_clk_div = %d\n", j, p_enc[j].vid_clk_div);
        set_vid_clk_div(p_enc[j].vid_clk_div);
        set_hdmi_tx_pixel_div(p_enc[j].hdmi_tx_pixel_div);
-       set_encp_div(p_enc[j].encp_div);
-       set_enci_div(p_enc[j].enci_div);
+
+       if (hdev->para->hdmitx_vinfo.viu_mux == VIU_MUX_ENCI) {
+               set_enci_div(p_enc[j].enci_div);
+               hdmitx_enable_enci_clk(hdev);
+       } else {
+               set_encp_div(p_enc[j].encp_div);
+               hdmitx_enable_encp_clk(hdev);
+       }
 }
 
 static int likely_frac_rate_mode(char *m)
@@ -1116,3 +1143,15 @@ void hdmitx_set_clk(struct hdmitx_dev *hdev)
        hdmitx_set_clk_(hdev);
 }
 
+void hdmitx_disable_clk(struct hdmitx_dev *hdev)
+{
+       /* cts_encp/enci_clk */
+       if (hdev->para->hdmitx_vinfo.viu_mux == VIU_MUX_ENCI)
+               hdmitx_disable_enci_clk(hdev);
+       else
+               hdmitx_disable_encp_clk(hdev);
+
+       /* hdmi_tx_pixel_clk */
+       hdmitx_disable_tx_pixel_clk(hdev);
+}
+

diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h
index b45b4e9..90630a6 100644 (file)
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h
@@ -59,10 +59,7 @@ void hdmitx_set_top_pclk(struct hdmitx_dev *hdev);
 void hdmitx_set_hdcp_pclk(struct hdmitx_dev *hdev);
 void hdmitx_set_cts_hdcp22_clk(struct hdmitx_dev *hdev);
 void hdmitx_set_sys_clk(struct hdmitx_dev *hdev, unsigned char flag);
-void hdmitx_set_vclk2_encp(struct hdmitx_dev *hdev);
-void hdmitx_disable_vclk2_enci(struct hdmitx_dev *hdev);
-void hdmitx_set_vclk2_enci(struct hdmitx_dev *hdev);
-
+void hdmitx_disable_clk(struct hdmitx_dev *hdev);
 
 #endif