[SSE} Added tests for float4-float3 conversions (PR11580)

llvm-svn: 232324

diff --git a/llvm/test/CodeGen/X86/vec_partial.ll b/llvm/test/CodeGen/X86/vec_partial.ll
new file mode 100644 (file)
index 0000000..709f326
--- /dev/null
+++ b/llvm/test/CodeGen/X86/vec_partial.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s\r
+\r
+; PR11580\r
+define <3 x float> @addf3(<3 x float> %x) {\r
+; CHECK-LABEL: addf3\r
+; CHECK:       # BB#0:\r
+; CHECK-NEXT:  addps .LCPI0_0(%rip), %xmm0\r
+; CHECK-NEXT:  retq\r
+entry:\r
+  %add = fadd <3 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>\r
+  ret <3 x float> %add\r
+}\r
+\r
+; PR11580\r
+define <4 x float> @cvtf3_f4(<3 x float> %x) {\r
+; CHECK-LABEL: cvtf3_f4\r
+; CHECK:       # BB#0:\r
+; CHECK-NEXT:  retq\r
+entry:\r
+  %extractVec = shufflevector <3 x float> %x, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>\r
+  ret <4 x float> %extractVec\r
+}\r
+\r
+; PR11580\r
+define <3 x float> @cvtf4_f3(<4 x float> %x) {\r
+; CHECK-LABEL: cvtf4_f3\r
+; CHECK:       # BB#0:\r
+; CHECK-NEXT:  retq\r
+entry:\r
+  %extractVec = shufflevector <4 x float> %x, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>\r
+  ret <3 x float> %extractVec\r
+}\r