clk: sunxi-ng: div: Support finding closest rate

Add initalization macros for divisor clocks with mux
(SUNXI_CCU_M_WITH_MUX) to support finding the closest rate. This clock
type requires the appropriate flags to be set in the .common structure
(for the mux part of the clock) and the .div part.

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-9-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
index 948e2b0..90d49ee 100644 (file)
--- a/drivers/clk/sunxi-ng/ccu_div.h
+++ b/drivers/clk/sunxi-ng/ccu_div.h
@@ -143,6 +143,26 @@ struct ccu_div {
                },                                                      \
        }
 
+#define SUNXI_CCU_M_WITH_MUX_TABLE_GATE_CLOSEST(_struct, _name,                \
+                                               _parents, _table,       \
+                                               _reg,                   \
+                                               _mshift, _mwidth,       \
+                                               _muxshift, _muxwidth,   \
+                                               _gate, _flags)          \
+       struct ccu_div _struct = {                                      \
+               .enable = _gate,                                        \
+               .div    = _SUNXI_CCU_DIV_FLAGS(_mshift, _mwidth, CLK_DIVIDER_ROUND_CLOSEST), \
+               .mux    = _SUNXI_CCU_MUX_TABLE(_muxshift, _muxwidth, _table), \
+               .common = {                                             \
+                       .reg            = _reg,                         \
+                       .hw.init        = CLK_HW_INIT_PARENTS(_name,    \
+                                                             _parents, \
+                                                             &ccu_div_ops, \
+                                                             _flags),  \
+                       .features       = CCU_FEATURE_CLOSEST_RATE,     \
+               },                                                      \
+       }
+
 #define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,      \
                                  _mshift, _mwidth, _muxshift, _muxwidth, \
                                  _gate, _flags)                        \
@@ -152,6 +172,16 @@ struct ccu_div {
                                        _muxshift, _muxwidth,           \
                                        _gate, _flags)
 
+#define SUNXI_CCU_M_WITH_MUX_GATE_CLOSEST(_struct, _name, _parents,    \
+                                         _reg, _mshift, _mwidth,       \
+                                         _muxshift, _muxwidth,         \
+                                         _gate, _flags)                \
+       SUNXI_CCU_M_WITH_MUX_TABLE_GATE_CLOSEST(_struct, _name,         \
+                                               _parents, NULL,         \
+                                               _reg, _mshift, _mwidth, \
+                                               _muxshift, _muxwidth,   \
+                                               _gate, _flags)
+
 #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg,           \
                             _mshift, _mwidth, _muxshift, _muxwidth,    \
                             _flags)                                    \