bfd/

	* elf64-aarch64.c (elf64_aarch64_final_link_relocate): Call
	aarch64_resolve_relocation and bfd_elf_aarch64_put_addend to
	handle the relocations of R_AARCH64_JUMP26, R_AARCH64_CALL26,
	R_AARCH64_LD64_GOT_LO12_NC, R_AARCH64_ADR_GOT_PAGE and
	R_AARCH64_GOT_LD_PREL19.

ld/testsuite/

	* ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'.
	* ld-aarch64/ifunc-7c.d: New test.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 3a3c8f8..8377b35 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,11 @@
+2013-06-14  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * elf64-aarch64.c (elf64_aarch64_final_link_relocate): Call
+       aarch64_resolve_relocation and bfd_elf_aarch64_put_addend to
+       handle the relocations of R_AARCH64_JUMP26, R_AARCH64_CALL26,
+       R_AARCH64_LD64_GOT_LO12_NC, R_AARCH64_ADR_GOT_PAGE and
+       R_AARCH64_GOT_LD_PREL19.
+
 2013-06-13  Terry Guo  <terry.guo@arm.com>
 
        PR ld/15302

diff --git a/bfd/elf64-aarch64.c b/bfd/elf64-aarch64.c
index 19e18b4..d6ecbb4 100644 (file)
--- a/bfd/elf64-aarch64.c
+++ b/bfd/elf64-aarch64.c
@@ -4010,12 +4010,16 @@ elf64_aarch64_final_link_relocate (reloc_howto_type *howto,
                 internal symbol, we have updated addend.  */
              return bfd_reloc_ok;
            }
-         /* FALLTHROUGH */
-       case R_AARCH64_JUMP26:
-       case R_AARCH64_CALL26:
          return _bfd_final_link_relocate (howto, input_bfd, input_section,
                                           contents, rel->r_offset, value,
                                           signed_addend);
+
+       case R_AARCH64_JUMP26:
+       case R_AARCH64_CALL26:
+         value = aarch64_resolve_relocation (r_type, place, value,
+                                             signed_addend, weak_undef_p);
+         return bfd_elf_aarch64_put_addend (input_bfd, hit_data, howto, value);
+
        case R_AARCH64_LD64_GOT_LO12_NC:
        case R_AARCH64_ADR_GOT_PAGE:
        case R_AARCH64_GOT_LD_PREL19:
@@ -4079,9 +4083,8 @@ elf64_aarch64_final_link_relocate (reloc_howto_type *howto,
                                                     unresolved_reloc_p);
          value = aarch64_resolve_relocation (r_type, place, value,
                                              0, weak_undef_p);
-         return _bfd_final_link_relocate (howto, input_bfd, input_section,
-                                          contents, rel->r_offset, value,
-                                          signed_addend);
+         return bfd_elf_aarch64_put_addend (input_bfd, hit_data, howto, value);
+
        case R_AARCH64_ADR_PREL_PG_HI21:
        case R_AARCH64_ADD_ABS_LO12_NC:
          break;

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 202c1eb..17f74b3 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,5 +1,10 @@
 2013-06-14  Yufeng Zhang  <yufeng.zhang@arm.com>
 
+       * ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'.
+       * ld-aarch64/ifunc-7c.d: New test.
+
+2013-06-14  Yufeng Zhang  <yufeng.zhang@arm.com>
+
        * ld-aarch64/ifunc-1-local.d: Replace hard-coded immediate offset
        with regexp.
        * ld-aarch64/ifunc-1.d: Likewise.

diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index 58236e2..5c150dd 100644 (file)
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -133,6 +133,7 @@ run_dump_test "ifunc-6a"
 run_dump_test "ifunc-6b"
 run_dump_test "ifunc-7a"
 run_dump_test "ifunc-7b"
+run_dump_test "ifunc-7c"
 run_dump_test "ifunc-8"
 run_dump_test "ifunc-9"
 run_dump_test "ifunc-10"

diff --git a/ld/testsuite/ld-aarch64/ifunc-7c.d b/ld/testsuite/ld-aarch64/ifunc-7c.d
new file mode 100644 (file)
index 0000000..1967742
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/ifunc-7c.d
@@ -0,0 +1,19 @@
+#source: ifunc-7.s
+#ld: -shared
+#objdump: -dr -j .text
+#target: aarch64*-*-*
+
+# Check if adrp and ldr have been relocated correctly.
+
+.*:     file format elf.+aarch64.*
+
+
+Disassembly of section \.text:
+
+[0-9a-f]+ <foo>:
+ [0-9a-f]+:    d65f03c0        ret
+
+[0-9a-f]+ <__start>:
+ [0-9a-f]+:    [0-9a-f]+       bl      [0-9a-f]+ <\*ABS\*\+0x[0-9a-f]+@plt>
+ [0-9a-f]+:    [0-9a-f]+       adrp    x0, [0-9]+ <__start\+0x[0-9a-f]+>
+ [0-9a-f]+:    [0-9a-f]+       ldr     x0, \[x0,.+\]