The bit width check was introduced by
15afae60 (ACPI, APEI: Fix
incorrect APEI register bit width check and usage), and a fixup
for incorrect 32-bit width memory address was given by f712c71
(ACPI, APEI: Fixup common access width firmware bug). Now there
is a similar symptom:
[Firmware Bug]: APEI: Invalid bit width + offset in GAR [0x12345000/64/0/3/0]
Another bogus BIOS reports an incorrect 64-bit width in trigger table.
Thus, apply to a similar workaround for 64-bit width memory address.
Signed-off-by: Lans Zhang <jia.zhang@windriver.com>
Acked-by: Gary Hade <garyhade@us.ibm.com>
Acked-by: Myron Stowe <myron.stowe@redhat.com>
Acked-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
if (bit_width == 32 && bit_offset == 0 && (*paddr & 0x03) == 0 &&
*access_bit_width < 32)
*access_bit_width = 32;
+ else if (bit_width == 64 && bit_offset == 0 && (*paddr & 0x07) == 0 &&
+ *access_bit_width < 64)
+ *access_bit_width = 64;
if ((bit_width + bit_offset) > *access_bit_width) {
pr_warning(FW_BUG APEI_PFX