Documentation: PCI: Add configfs binding documentation for pci-ntb endpoint function
authorKishon Vijay Abraham I <kishon@ti.com>
Mon, 1 Feb 2021 19:58:08 +0000 (01:28 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 23 Feb 2021 20:14:51 +0000 (14:14 -0600)
Add binding documentation for pci-ntb endpoint function that helps in
adding and configuring pci-ntb endpoint function.

Link: https://lore.kernel.org/r/20210201195809.7342-17-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Documentation/PCI/endpoint/function/binding/pci-ntb.rst [new file with mode: 0644]
Documentation/PCI/endpoint/index.rst

diff --git a/Documentation/PCI/endpoint/function/binding/pci-ntb.rst b/Documentation/PCI/endpoint/function/binding/pci-ntb.rst
new file mode 100644 (file)
index 0000000..40253d3
--- /dev/null
@@ -0,0 +1,38 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+==========================
+PCI NTB Endpoint Function
+==========================
+
+1) Create a subdirectory to pci_epf_ntb directory in configfs.
+
+Standard EPF Configurable Fields:
+
+================   ===========================================================
+vendorid          should be 0x104c
+deviceid          should be 0xb00d for TI's J721E SoC
+revid             don't care
+progif_code       don't care
+subclass_code     should be 0x00
+baseclass_code    should be 0x5
+cache_line_size           don't care
+subsys_vendor_id   don't care
+subsys_id         don't care
+interrupt_pin     don't care
+msi_interrupts    don't care
+msix_interrupts           don't care
+================   ===========================================================
+
+2) Create a subdirectory to directory created in 1
+
+NTB EPF specific configurable fields:
+
+================   ===========================================================
+db_count          Number of doorbells; default = 4
+mw1               size of memory window1
+mw2               size of memory window2
+mw3               size of memory window3
+mw4               size of memory window4
+num_mws           Number of memory windows; max = 4
+spad_count                Number of scratchpad registers; default = 64
+================   ===========================================================
index ef68611..9cb6e5f 100644 (file)
@@ -14,3 +14,4 @@ PCI Endpoint Framework
    pci-ntb-function
 
    function/binding/pci-test
+   function/binding/pci-ntb