drm/amdgpu: add PASID mapping for GMC v9

This way we can see the PASID in VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index d280f32..e90eaaf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -34,6 +34,7 @@
 #include "vega10_enum.h"
 #include "mmhub/mmhub_1_0_offset.h"
 #include "athub/athub_1_0_offset.h"
+#include "oss/osssys_4_0_offset.h"
 
 #include "soc15.h"
 #include "soc15_common.h"
@@ -370,10 +371,12 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
                                            unsigned vmid, unsigned pasid,
                                            uint64_t pd_addr)
 {
-       struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
+       struct amdgpu_device *adev = ring->adev;
+       struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub];
        uint32_t req = gmc_v9_0_get_invalidate_req(vmid);
        uint64_t flags = AMDGPU_PTE_VALID;
        unsigned eng = ring->vm_inv_eng;
+       uint32_t reg;
 
        amdgpu_gmc_get_vm_pde(ring->adev, -1, &pd_addr, &flags);
        pd_addr |= flags;
@@ -384,6 +387,13 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
        amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),
                              upper_32_bits(pd_addr));
 
+       if (ring->funcs->vmhub == AMDGPU_GFXHUB)
+               reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid;
+       else
+               reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT_MM) + vmid;
+
+       amdgpu_ring_emit_wreg(ring, reg, pasid);
+
        amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_req + eng, req);
 
        return pd_addr;

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h
index a6b3b00..0f63ed6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.h
@@ -27,7 +27,7 @@
 #include "nbio_v6_1.h"
 #include "nbio_v7_0.h"
 
-#define SOC15_FLUSH_GPU_TLB_NUM_WREG   3
+#define SOC15_FLUSH_GPU_TLB_NUM_WREG   4
 
 extern const struct amd_ip_funcs soc15_common_ip_funcs;