--- /dev/null
+From f1a26fdf5944ff950888ae0017e546690353f85f Mon Sep 17 00:00:00 2001
+From: Darren Hart <dvhart@linux.intel.com>
+Date: Sat, 18 May 2013 14:46:00 -0700
+Subject: pch_gbe: Add MinnowBoard support
+
+From: Darren Hart <dvhart@linux.intel.com>
+
+commit f1a26fdf5944ff950888ae0017e546690353f85f upstream.
+
+The MinnowBoard uses an AR803x PHY with the PCH GBE which requires
+special handling. Use the MinnowBoard PCI Subsystem ID to detect this
+and add a pci_device_id.driver_data structure and functions to handle
+platform setup.
+
+The AR803x does not implement the RGMII 2ns TX clock delay in the trace
+routing nor via strapping. Add a detection method for the board and the
+PHY and enable the TX clock delay via the registers.
+
+This PHY will hibernate without link for 10 seconds. Ensure the PHY is
+awake for probe and then disable hibernation. A future improvement would
+be to convert pch_gbe to using PHYLIB and making sure we can wake the
+PHY at the necessary times rather than permanently disabling it.
+
+Signed-off-by: Darren Hart <dvhart@linux.intel.com>
+Cc: "David S. Miller" <davem@davemloft.net>
+Cc: "H. Peter Anvin" <hpa@zytor.com>
+Cc: Peter Waskiewicz <peter.p.waskiewicz.jr@intel.com>
+Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Cc: Joe Perches <joe@perches.com>
+Cc: netdev@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 15 ++
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 49 +++++++++
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c | 97 +++++++++++++++++++
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h | 1
+ 4 files changed, 162 insertions(+)
+
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
+@@ -582,6 +582,19 @@ struct pch_gbe_hw_stats {
+ };
+
+ /**
++ * struct pch_gbe_privdata - PCI Device ID driver data
++ * @phy_tx_clk_delay: Bool, configure the PHY TX delay in software
++ * @phy_disable_hibernate: Bool, disable PHY hibernation
++ * @platform_init: Platform initialization callback, called from
++ * probe, prior to PHY initialization.
++ */
++struct pch_gbe_privdata {
++ bool phy_tx_clk_delay;
++ bool phy_disable_hibernate;
++ int (*platform_init)(struct pci_dev *pdev);
++};
++
++/**
+ * struct pch_gbe_adapter - board specific private data structure
+ * @stats_lock: Spinlock structure for status
+ * @ethtool_lock: Spinlock structure for ethtool
+@@ -604,6 +617,7 @@ struct pch_gbe_hw_stats {
+ * @rx_buffer_len: Receive buffer length
+ * @tx_queue_len: Transmit queue length
+ * @have_msi: PCI MSI mode flag
++ * @pch_gbe_privdata: PCI Device ID driver_data
+ */
+
+ struct pch_gbe_adapter {
+@@ -631,6 +645,7 @@ struct pch_gbe_adapter {
+ int hwts_tx_en;
+ int hwts_rx_en;
+ struct pci_dev *ptp_pdev;
++ struct pch_gbe_privdata *pdata;
+ };
+
+ #define pch_gbe_hw_to_adapter(hw) container_of(hw, struct pch_gbe_adapter, hw)
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+@@ -23,6 +23,7 @@
+ #include <linux/module.h>
+ #include <linux/net_tstamp.h>
+ #include <linux/ptp_classify.h>
++#include <linux/gpio.h>
+
+ #define DRV_VERSION "1.01"
+ const char pch_driver_version[] = DRV_VERSION;
+@@ -111,6 +112,8 @@ const char pch_driver_version[] = DRV_VE
+ #define PTP_L4_MULTICAST_SA "01:00:5e:00:01:81"
+ #define PTP_L2_MULTICAST_SA "01:1b:19:00:00:00"
+
++#define MINNOW_PHY_RESET_GPIO 13
++
+ static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT;
+
+ static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg);
+@@ -2635,6 +2638,9 @@ static int pch_gbe_probe(struct pci_dev
+ adapter->pdev = pdev;
+ adapter->hw.back = adapter;
+ adapter->hw.reg = pcim_iomap_table(pdev)[PCH_GBE_PCI_BAR];
++ adapter->pdata = (struct pch_gbe_privdata *)pci_id->driver_data;
++ if (adapter->pdata && adapter->pdata->platform_init)
++ adapter->pdata->platform_init(pdev);
+
+ adapter->ptp_pdev = pci_get_bus_and_slot(adapter->pdev->bus->number,
+ PCI_DEVFN(12, 4));
+@@ -2710,6 +2716,10 @@ static int pch_gbe_probe(struct pci_dev
+
+ dev_dbg(&pdev->dev, "PCH Network Connection\n");
+
++ /* Disable hibernation on certain platforms */
++ if (adapter->pdata && adapter->pdata->phy_disable_hibernate)
++ pch_gbe_phy_disable_hibernate(&adapter->hw);
++
+ device_set_wakeup_enable(&pdev->dev, 1);
+ return 0;
+
+@@ -2720,9 +2730,48 @@ err_free_netdev:
+ return ret;
+ }
+
++/* The AR803X PHY on the MinnowBoard requires a physical pin to be toggled to
++ * ensure it is awake for probe and init. Request the line and reset the PHY.
++ */
++static int pch_gbe_minnow_platform_init(struct pci_dev *pdev)
++{
++ unsigned long flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH | GPIOF_EXPORT;
++ unsigned gpio = MINNOW_PHY_RESET_GPIO;
++ int ret;
++
++ ret = devm_gpio_request_one(&pdev->dev, gpio, flags,
++ "minnow_phy_reset");
++ if (ret) {
++ dev_err(&pdev->dev,
++ "ERR: Can't request PHY reset GPIO line '%d'\n", gpio);
++ return ret;
++ }
++
++ gpio_set_value(gpio, 0);
++ usleep_range(1250, 1500);
++ gpio_set_value(gpio, 1);
++ usleep_range(1250, 1500);
++
++ return ret;
++}
++
++static struct pch_gbe_privdata pch_gbe_minnow_privdata = {
++ .phy_tx_clk_delay = true,
++ .phy_disable_hibernate = true,
++ .platform_init = pch_gbe_minnow_platform_init,
++};
++
+ static DEFINE_PCI_DEVICE_TABLE(pch_gbe_pcidev_id) = {
+ {.vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_IOH1_GBE,
++ .subvendor = PCI_VENDOR_ID_CIRCUITCO,
++ .subdevice = PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD,
++ .class = (PCI_CLASS_NETWORK_ETHERNET << 8),
++ .class_mask = (0xFFFF00),
++ .driver_data = (kernel_ulong_t)&pch_gbe_minnow_privdata
++ },
++ {.vendor = PCI_VENDOR_ID_INTEL,
++ .device = PCI_DEVICE_ID_INTEL_IOH1_GBE,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .class = (PCI_CLASS_NETWORK_ETHERNET << 8),
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
+@@ -74,6 +74,15 @@
+ #define MII_SR_100X_FD_CAPS 0x4000 /* 100X Full Duplex Capable */
+ #define MII_SR_100T4_CAPS 0x8000 /* 100T4 Capable */
+
++/* AR8031 PHY Debug Registers */
++#define PHY_AR803X_ID 0x00001374
++#define PHY_AR8031_DBG_OFF 0x1D
++#define PHY_AR8031_DBG_DAT 0x1E
++#define PHY_AR8031_SERDES 0x05
++#define PHY_AR8031_HIBERNATE 0x0B
++#define PHY_AR8031_SERDES_TX_CLK_DLY 0x0100 /* TX clock delay of 2.0ns */
++#define PHY_AR8031_PS_HIB_EN 0x8000 /* Hibernate enable */
++
+ /* Phy Id Register (word 2) */
+ #define PHY_REVISION_MASK 0x000F
+
+@@ -249,6 +258,51 @@ inline void pch_gbe_phy_set_rgmii(struct
+ }
+
+ /**
++ * pch_gbe_phy_tx_clk_delay - Setup TX clock delay via the PHY
++ * @hw: Pointer to the HW structure
++ * Returns
++ * 0: Successful.
++ * -EINVAL: Invalid argument.
++ */
++static int pch_gbe_phy_tx_clk_delay(struct pch_gbe_hw *hw)
++{
++ /* The RGMII interface requires a ~2ns TX clock delay. This is typically
++ * done in layout with a longer trace or via PHY strapping, but can also
++ * be done via PHY configuration registers.
++ */
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++ u16 mii_reg;
++ int ret = 0;
++
++ switch (hw->phy.id) {
++ case PHY_AR803X_ID:
++ netdev_dbg(adapter->netdev,
++ "Configuring AR803X PHY for 2ns TX clock delay\n");
++ pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_OFF, &mii_reg);
++ ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_OFF,
++ PHY_AR8031_SERDES);
++ if (ret)
++ break;
++
++ pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_DAT, &mii_reg);
++ mii_reg |= PHY_AR8031_SERDES_TX_CLK_DLY;
++ ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_DAT,
++ mii_reg);
++ break;
++ default:
++ netdev_err(adapter->netdev,
++ "Unknown PHY (%x), could not set TX clock delay\n",
++ hw->phy.id);
++ return -EINVAL;
++ }
++
++ if (ret)
++ netdev_err(adapter->netdev,
++ "Could not configure tx clock delay for PHY\n");
++ return ret;
++}
++
++/**
+ * pch_gbe_phy_init_setting - PHY initial setting
+ * @hw: Pointer to the HW structure
+ */
+@@ -278,4 +332,47 @@ void pch_gbe_phy_init_setting(struct pch
+ mii_reg |= PHYSP_CTRL_ASSERT_CRS_TX;
+ pch_gbe_phy_write_reg_miic(hw, PHY_PHYSP_CONTROL, mii_reg);
+
++ /* Setup a TX clock delay on certain platforms */
++ if (adapter->pdata && adapter->pdata->phy_tx_clk_delay)
++ pch_gbe_phy_tx_clk_delay(hw);
++}
++
++/**
++ * pch_gbe_phy_disable_hibernate - Disable the PHY low power state
++ * @hw: Pointer to the HW structure
++ * Returns
++ * 0: Successful.
++ * -EINVAL: Invalid argument.
++ */
++int pch_gbe_phy_disable_hibernate(struct pch_gbe_hw *hw)
++{
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++ u16 mii_reg;
++ int ret = 0;
++
++ switch (hw->phy.id) {
++ case PHY_AR803X_ID:
++ netdev_dbg(adapter->netdev,
++ "Disabling hibernation for AR803X PHY\n");
++ ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_OFF,
++ PHY_AR8031_HIBERNATE);
++ if (ret)
++ break;
++
++ pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_DAT, &mii_reg);
++ mii_reg &= ~PHY_AR8031_PS_HIB_EN;
++ ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_DAT,
++ mii_reg);
++ break;
++ default:
++ netdev_err(adapter->netdev,
++ "Unknown PHY (%x), could not disable hibernation\n",
++ hw->phy.id);
++ return -EINVAL;
++ }
++
++ if (ret)
++ netdev_err(adapter->netdev,
++ "Could not disable PHY hibernation\n");
++ return ret;
+ }
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
+@@ -33,5 +33,6 @@ void pch_gbe_phy_power_up(struct pch_gbe
+ void pch_gbe_phy_power_down(struct pch_gbe_hw *hw);
+ void pch_gbe_phy_set_rgmii(struct pch_gbe_hw *hw);
+ void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw);
++int pch_gbe_phy_disable_hibernate(struct pch_gbe_hw *hw);
+
+ #endif /* _PCH_GBE_PHY_H_ */
--- /dev/null
+From 453ca931f515161902dbb325d7f39a992c3059ce Mon Sep 17 00:00:00 2001
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Date: Fri, 28 Jun 2013 14:02:53 +0300
+Subject: pch_gbe: convert pr_* to netdev_*
+
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+commit 453ca931f515161902dbb325d7f39a992c3059ce upstream.
+
+We may use nice macros to prefix our messages with proper device name.
+
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 49 +-
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c | 2
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 275 +++++++++-------
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 63 ++-
+ drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c | 23 -
+ 6 files changed, 250 insertions(+), 164 deletions(-)
+
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
+@@ -633,6 +633,8 @@ struct pch_gbe_adapter {
+ struct pci_dev *ptp_pdev;
+ };
+
++#define pch_gbe_hw_to_adapter(hw) container_of(hw, struct pch_gbe_adapter, hw)
++
+ extern const char pch_driver_version[];
+
+ /* pch_gbe_main.c */
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c
+@@ -70,7 +70,9 @@ static s32 pch_gbe_plat_init_hw(struct p
+
+ ret_val = pch_gbe_phy_get_id(hw);
+ if (ret_val) {
+- pr_err("pch_gbe_phy_get_id error\n");
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
+ return ret_val;
+ }
+ pch_gbe_phy_init_setting(hw);
+@@ -115,7 +117,9 @@ static void pch_gbe_plat_init_function_p
+ inline s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw)
+ {
+ if (!hw->reg) {
+- pr_err("ERROR: Registers not mapped\n");
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "ERROR: Registers not mapped\n");
+ return -ENOSYS;
+ }
+ pch_gbe_plat_init_function_pointers(hw);
+@@ -128,10 +132,13 @@ inline s32 pch_gbe_hal_setup_init_funcs(
+ */
+ inline void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw)
+ {
+- if (!hw->func->get_bus_info)
+- pr_err("ERROR: configuration\n");
+- else
+- hw->func->get_bus_info(hw);
++ if (!hw->func->get_bus_info) {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "ERROR: configuration\n");
++ return;
++ }
++ hw->func->get_bus_info(hw);
+ }
+
+ /**
+@@ -144,7 +151,9 @@ inline void pch_gbe_hal_get_bus_info(str
+ inline s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
+ {
+ if (!hw->func->init_hw) {
+- pr_err("ERROR: configuration\n");
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "ERROR: configuration\n");
+ return -ENOSYS;
+ }
+ return hw->func->init_hw(hw);
+@@ -190,10 +199,13 @@ inline s32 pch_gbe_hal_write_phy_reg(str
+ */
+ inline void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw)
+ {
+- if (!hw->func->reset_phy)
+- pr_err("ERROR: configuration\n");
+- else
+- hw->func->reset_phy(hw);
++ if (!hw->func->reset_phy) {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "ERROR: configuration\n");
++ return;
++ }
++ hw->func->reset_phy(hw);
+ }
+
+ /**
+@@ -202,10 +214,13 @@ inline void pch_gbe_hal_phy_hw_reset(str
+ */
+ inline void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw)
+ {
+- if (!hw->func->sw_reset_phy)
+- pr_err("ERROR: configuration\n");
+- else
+- hw->func->sw_reset_phy(hw);
++ if (!hw->func->sw_reset_phy) {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "ERROR: configuration\n");
++ return;
++ }
++ hw->func->sw_reset_phy(hw);
+ }
+
+ /**
+@@ -218,7 +233,9 @@ inline void pch_gbe_hal_phy_sw_reset(str
+ inline s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw)
+ {
+ if (!hw->func->read_mac_addr) {
+- pr_err("ERROR: configuration\n");
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "ERROR: configuration\n");
+ return -ENOSYS;
+ }
+ return hw->func->read_mac_addr(hw);
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
+@@ -122,7 +122,7 @@ static int pch_gbe_set_settings(struct n
+ }
+ ret = mii_ethtool_sset(&adapter->mii, ecmd);
+ if (ret) {
+- pr_err("Error: mii_ethtool_sset\n");
++ netdev_err(netdev, "Error: mii_ethtool_sset\n");
+ return ret;
+ }
+ hw->mac.link_speed = speed;
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+@@ -300,6 +300,7 @@ inline void pch_gbe_mac_load_mac_addr(st
+ */
+ s32 pch_gbe_mac_read_mac_addr(struct pch_gbe_hw *hw)
+ {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ u32 adr1a, adr1b;
+
+ adr1a = ioread32(&hw->reg->mac_adr[0].high);
+@@ -312,7 +313,7 @@ s32 pch_gbe_mac_read_mac_addr(struct pch
+ hw->mac.addr[4] = (u8)(adr1b & 0xFF);
+ hw->mac.addr[5] = (u8)((adr1b >> 8) & 0xFF);
+
+- pr_debug("hw->mac.addr : %pM\n", hw->mac.addr);
++ netdev_dbg(adapter->netdev, "hw->mac.addr : %pM\n", hw->mac.addr);
+ return 0;
+ }
+
+@@ -324,6 +325,7 @@ s32 pch_gbe_mac_read_mac_addr(struct pch
+ static void pch_gbe_wait_clr_bit(void *reg, u32 bit)
+ {
+ u32 tmp;
++
+ /* wait busy */
+ tmp = 1000;
+ while ((ioread32(reg) & bit) && --tmp)
+@@ -340,9 +342,10 @@ static void pch_gbe_wait_clr_bit(void *r
+ */
+ static void pch_gbe_mac_mar_set(struct pch_gbe_hw *hw, u8 * addr, u32 index)
+ {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ u32 mar_low, mar_high, adrmask;
+
+- pr_debug("index : 0x%x\n", index);
++ netdev_dbg(adapter->netdev, "index : 0x%x\n", index);
+
+ /*
+ * HW expects these in little endian so we reverse the byte order
+@@ -468,10 +471,11 @@ static void pch_gbe_mac_mc_addr_list_upd
+ */
+ s32 pch_gbe_mac_force_mac_fc(struct pch_gbe_hw *hw)
+ {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ struct pch_gbe_mac_info *mac = &hw->mac;
+ u32 rx_fctrl;
+
+- pr_debug("mac->fc = %u\n", mac->fc);
++ netdev_dbg(adapter->netdev, "mac->fc = %u\n", mac->fc);
+
+ rx_fctrl = ioread32(&hw->reg->RX_FCTRL);
+
+@@ -493,14 +497,16 @@ s32 pch_gbe_mac_force_mac_fc(struct pch_
+ mac->tx_fc_enable = true;
+ break;
+ default:
+- pr_err("Flow control param set incorrectly\n");
++ netdev_err(adapter->netdev,
++ "Flow control param set incorrectly\n");
+ return -EINVAL;
+ }
+ if (mac->link_duplex == DUPLEX_HALF)
+ rx_fctrl &= ~PCH_GBE_FL_CTRL_EN;
+ iowrite32(rx_fctrl, &hw->reg->RX_FCTRL);
+- pr_debug("RX_FCTRL reg : 0x%08x mac->tx_fc_enable : %d\n",
+- ioread32(&hw->reg->RX_FCTRL), mac->tx_fc_enable);
++ netdev_dbg(adapter->netdev,
++ "RX_FCTRL reg : 0x%08x mac->tx_fc_enable : %d\n",
++ ioread32(&hw->reg->RX_FCTRL), mac->tx_fc_enable);
+ return 0;
+ }
+
+@@ -511,10 +517,11 @@ s32 pch_gbe_mac_force_mac_fc(struct pch_
+ */
+ static void pch_gbe_mac_set_wol_event(struct pch_gbe_hw *hw, u32 wu_evt)
+ {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ u32 addr_mask;
+
+- pr_debug("wu_evt : 0x%08x ADDR_MASK reg : 0x%08x\n",
+- wu_evt, ioread32(&hw->reg->ADDR_MASK));
++ netdev_dbg(adapter->netdev, "wu_evt : 0x%08x ADDR_MASK reg : 0x%08x\n",
++ wu_evt, ioread32(&hw->reg->ADDR_MASK));
+
+ if (wu_evt) {
+ /* Set Wake-On-Lan address mask */
+@@ -546,6 +553,7 @@ static void pch_gbe_mac_set_wol_event(st
+ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe_hw *hw, u32 addr, u32 dir, u32 reg,
+ u16 data)
+ {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ u32 data_out = 0;
+ unsigned int i;
+ unsigned long flags;
+@@ -558,7 +566,7 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe
+ udelay(20);
+ }
+ if (i == 0) {
+- pr_err("pch-gbe.miim won't go Ready\n");
++ netdev_err(adapter->netdev, "pch-gbe.miim won't go Ready\n");
+ spin_unlock_irqrestore(&hw->miim_lock, flags);
+ return 0; /* No way to indicate timeout error */
+ }
+@@ -573,9 +581,9 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe
+ }
+ spin_unlock_irqrestore(&hw->miim_lock, flags);
+
+- pr_debug("PHY %s: reg=%d, data=0x%04X\n",
+- dir == PCH_GBE_MIIM_OPER_READ ? "READ" : "WRITE", reg,
+- dir == PCH_GBE_MIIM_OPER_READ ? data_out : data);
++ netdev_dbg(adapter->netdev, "PHY %s: reg=%d, data=0x%04X\n",
++ dir == PCH_GBE_MIIM_OPER_READ ? "READ" : "WRITE", reg,
++ dir == PCH_GBE_MIIM_OPER_READ ? data_out : data);
+ return (u16) data_out;
+ }
+
+@@ -585,6 +593,7 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe
+ */
+ static void pch_gbe_mac_set_pause_packet(struct pch_gbe_hw *hw)
+ {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ unsigned long tmp2, tmp3;
+
+ /* Set Pause packet */
+@@ -606,10 +615,13 @@ static void pch_gbe_mac_set_pause_packet
+ /* Transmit Pause Packet */
+ iowrite32(PCH_GBE_PS_PKT_RQ, &hw->reg->PAUSE_REQ);
+
+- pr_debug("PAUSE_PKT1-5 reg : 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
+- ioread32(&hw->reg->PAUSE_PKT1), ioread32(&hw->reg->PAUSE_PKT2),
+- ioread32(&hw->reg->PAUSE_PKT3), ioread32(&hw->reg->PAUSE_PKT4),
+- ioread32(&hw->reg->PAUSE_PKT5));
++ netdev_dbg(adapter->netdev,
++ "PAUSE_PKT1-5 reg : 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
++ ioread32(&hw->reg->PAUSE_PKT1),
++ ioread32(&hw->reg->PAUSE_PKT2),
++ ioread32(&hw->reg->PAUSE_PKT3),
++ ioread32(&hw->reg->PAUSE_PKT4),
++ ioread32(&hw->reg->PAUSE_PKT5));
+
+ return;
+ }
+@@ -669,7 +681,7 @@ static int pch_gbe_init_phy(struct pch_g
+ break;
+ }
+ adapter->hw.phy.addr = adapter->mii.phy_id;
+- pr_debug("phy_addr = %d\n", adapter->mii.phy_id);
++ netdev_dbg(netdev, "phy_addr = %d\n", adapter->mii.phy_id);
+ if (addr == 32)
+ return -EAGAIN;
+ /* Selected the phy and isolate the rest */
+@@ -758,13 +770,15 @@ void pch_gbe_reinit_locked(struct pch_gb
+ */
+ void pch_gbe_reset(struct pch_gbe_adapter *adapter)
+ {
++ struct net_device *netdev = adapter->netdev;
++
+ pch_gbe_mac_reset_hw(&adapter->hw);
+ /* reprogram multicast address register after reset */
+- pch_gbe_set_multi(adapter->netdev);
++ pch_gbe_set_multi(netdev);
+ /* Setup the receive address. */
+ pch_gbe_mac_init_rx_addrs(&adapter->hw, PCH_GBE_MAR_ENTRIES);
+ if (pch_gbe_hal_init_hw(&adapter->hw))
+- pr_err("Hardware Error\n");
++ netdev_err(netdev, "Hardware Error\n");
+ }
+
+ /**
+@@ -778,7 +792,7 @@ static void pch_gbe_free_irq(struct pch_
+ free_irq(adapter->pdev->irq, netdev);
+ if (adapter->have_msi) {
+ pci_disable_msi(adapter->pdev);
+- pr_debug("call pci_disable_msi\n");
++ netdev_dbg(netdev, "call pci_disable_msi\n");
+ }
+ }
+
+@@ -795,7 +809,8 @@ static void pch_gbe_irq_disable(struct p
+ ioread32(&hw->reg->INT_ST);
+ synchronize_irq(adapter->pdev->irq);
+
+- pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw->reg->INT_EN));
++ netdev_dbg(adapter->netdev, "INT_EN reg : 0x%08x\n",
++ ioread32(&hw->reg->INT_EN));
+ }
+
+ /**
+@@ -809,7 +824,8 @@ static void pch_gbe_irq_enable(struct pc
+ if (likely(atomic_dec_and_test(&adapter->irq_sem)))
+ iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN);
+ ioread32(&hw->reg->INT_ST);
+- pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw->reg->INT_EN));
++ netdev_dbg(adapter->netdev, "INT_EN reg : 0x%08x\n",
++ ioread32(&hw->reg->INT_EN));
+ }
+
+
+@@ -846,9 +862,9 @@ static void pch_gbe_configure_tx(struct
+ struct pch_gbe_hw *hw = &adapter->hw;
+ u32 tdba, tdlen, dctrl;
+
+- pr_debug("dma addr = 0x%08llx size = 0x%08x\n",
+- (unsigned long long)adapter->tx_ring->dma,
+- adapter->tx_ring->size);
++ netdev_dbg(adapter->netdev, "dma addr = 0x%08llx size = 0x%08x\n",
++ (unsigned long long)adapter->tx_ring->dma,
++ adapter->tx_ring->size);
+
+ /* Setup the HW Tx Head and Tail descriptor pointers */
+ tdba = adapter->tx_ring->dma;
+@@ -894,9 +910,9 @@ static void pch_gbe_configure_rx(struct
+ struct pch_gbe_hw *hw = &adapter->hw;
+ u32 rdba, rdlen, rxdma;
+
+- pr_debug("dma adr = 0x%08llx size = 0x%08x\n",
+- (unsigned long long)adapter->rx_ring->dma,
+- adapter->rx_ring->size);
++ netdev_dbg(adapter->netdev, "dma adr = 0x%08llx size = 0x%08x\n",
++ (unsigned long long)adapter->rx_ring->dma,
++ adapter->rx_ring->size);
+
+ pch_gbe_mac_force_mac_fc(hw);
+
+@@ -907,9 +923,10 @@ static void pch_gbe_configure_rx(struct
+ rxdma &= ~PCH_GBE_RX_DMA_EN;
+ iowrite32(rxdma, &hw->reg->DMA_CTRL);
+
+- pr_debug("MAC_RX_EN reg = 0x%08x DMA_CTRL reg = 0x%08x\n",
+- ioread32(&hw->reg->MAC_RX_EN),
+- ioread32(&hw->reg->DMA_CTRL));
++ netdev_dbg(adapter->netdev,
++ "MAC_RX_EN reg = 0x%08x DMA_CTRL reg = 0x%08x\n",
++ ioread32(&hw->reg->MAC_RX_EN),
++ ioread32(&hw->reg->DMA_CTRL));
+
+ /* Setup the HW Rx Head and Tail Descriptor Pointers and
+ * the Base and Length of the Rx Descriptor Ring */
+@@ -977,7 +994,8 @@ static void pch_gbe_clean_tx_ring(struct
+ buffer_info = &tx_ring->buffer_info[i];
+ pch_gbe_unmap_and_free_tx_resource(adapter, buffer_info);
+ }
+- pr_debug("call pch_gbe_unmap_and_free_tx_resource() %d count\n", i);
++ netdev_dbg(adapter->netdev,
++ "call pch_gbe_unmap_and_free_tx_resource() %d count\n", i);
+
+ size = (unsigned long)sizeof(struct pch_gbe_buffer) * tx_ring->count;
+ memset(tx_ring->buffer_info, 0, size);
+@@ -1009,7 +1027,8 @@ pch_gbe_clean_rx_ring(struct pch_gbe_ada
+ buffer_info = &rx_ring->buffer_info[i];
+ pch_gbe_unmap_and_free_rx_resource(adapter, buffer_info);
+ }
+- pr_debug("call pch_gbe_unmap_and_free_rx_resource() %d count\n", i);
++ netdev_dbg(adapter->netdev,
++ "call pch_gbe_unmap_and_free_rx_resource() %d count\n", i);
+ size = (unsigned long)sizeof(struct pch_gbe_buffer) * rx_ring->count;
+ memset(rx_ring->buffer_info, 0, size);
+
+@@ -1087,7 +1106,7 @@ static void pch_gbe_watchdog(unsigned lo
+ struct net_device *netdev = adapter->netdev;
+ struct pch_gbe_hw *hw = &adapter->hw;
+
+- pr_debug("right now = %ld\n", jiffies);
++ netdev_dbg(netdev, "right now = %ld\n", jiffies);
+
+ pch_gbe_update_stats(adapter);
+ if ((mii_link_ok(&adapter->mii)) && (!netif_carrier_ok(netdev))) {
+@@ -1095,7 +1114,7 @@ static void pch_gbe_watchdog(unsigned lo
+ netdev->tx_queue_len = adapter->tx_queue_len;
+ /* mii library handles link maintenance tasks */
+ if (mii_ethtool_gset(&adapter->mii, &cmd)) {
+- pr_err("ethtool get setting Error\n");
++ netdev_err(netdev, "ethtool get setting Error\n");
+ mod_timer(&adapter->watchdog_timer,
+ round_jiffies(jiffies +
+ PCH_GBE_WATCHDOG_PERIOD));
+@@ -1213,7 +1232,7 @@ static void pch_gbe_tx_queue(struct pch_
+ buffer_info->length,
+ DMA_TO_DEVICE);
+ if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) {
+- pr_err("TX DMA map failed\n");
++ netdev_err(adapter->netdev, "TX DMA map failed\n");
+ buffer_info->dma = 0;
+ buffer_info->time_stamp = 0;
+ tx_ring->next_to_use = ring_num;
+@@ -1333,13 +1352,13 @@ static irqreturn_t pch_gbe_intr(int irq,
+ /* When request status is no interruption factor */
+ if (unlikely(!int_st))
+ return IRQ_NONE; /* Not our interrupt. End processing. */
+- pr_debug("%s occur int_st = 0x%08x\n", __func__, int_st);
++ netdev_dbg(netdev, "%s occur int_st = 0x%08x\n", __func__, int_st);
+ if (int_st & PCH_GBE_INT_RX_FRAME_ERR)
+ adapter->stats.intr_rx_frame_err_count++;
+ if (int_st & PCH_GBE_INT_RX_FIFO_ERR)
+ if (!adapter->rx_stop_flag) {
+ adapter->stats.intr_rx_fifo_err_count++;
+- pr_debug("Rx fifo over run\n");
++ netdev_dbg(netdev, "Rx fifo over run\n");
+ adapter->rx_stop_flag = true;
+ int_en = ioread32(&hw->reg->INT_EN);
+ iowrite32((int_en & ~PCH_GBE_INT_RX_FIFO_ERR),
+@@ -1359,7 +1378,7 @@ static irqreturn_t pch_gbe_intr(int irq,
+ /* When Rx descriptor is empty */
+ if ((int_st & PCH_GBE_INT_RX_DSC_EMP)) {
+ adapter->stats.intr_rx_dsc_empty_count++;
+- pr_debug("Rx descriptor is empty\n");
++ netdev_dbg(netdev, "Rx descriptor is empty\n");
+ int_en = ioread32(&hw->reg->INT_EN);
+ iowrite32((int_en & ~PCH_GBE_INT_RX_DSC_EMP), &hw->reg->INT_EN);
+ if (hw->mac.tx_fc_enable) {
+@@ -1382,8 +1401,8 @@ static irqreturn_t pch_gbe_intr(int irq,
+ __napi_schedule(&adapter->napi);
+ }
+ }
+- pr_debug("return = 0x%08x INT_EN reg = 0x%08x\n",
+- IRQ_HANDLED, ioread32(&hw->reg->INT_EN));
++ netdev_dbg(netdev, "return = 0x%08x INT_EN reg = 0x%08x\n",
++ IRQ_HANDLED, ioread32(&hw->reg->INT_EN));
+ return IRQ_HANDLED;
+ }
+
+@@ -1437,9 +1456,10 @@ pch_gbe_alloc_rx_buffers(struct pch_gbe_
+ rx_desc->buffer_addr = (buffer_info->dma);
+ rx_desc->gbec_status = DSC_INIT16;
+
+- pr_debug("i = %d buffer_info->dma = 0x08%llx buffer_info->length = 0x%x\n",
+- i, (unsigned long long)buffer_info->dma,
+- buffer_info->length);
++ netdev_dbg(netdev,
++ "i = %d buffer_info->dma = 0x08%llx buffer_info->length = 0x%x\n",
++ i, (unsigned long long)buffer_info->dma,
++ buffer_info->length);
+
+ if (unlikely(++i == rx_ring->count))
+ i = 0;
+@@ -1531,12 +1551,13 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
+ bool cleaned = false;
+ int unused, thresh;
+
+- pr_debug("next_to_clean : %d\n", tx_ring->next_to_clean);
++ netdev_dbg(adapter->netdev, "next_to_clean : %d\n",
++ tx_ring->next_to_clean);
+
+ i = tx_ring->next_to_clean;
+ tx_desc = PCH_GBE_TX_DESC(*tx_ring, i);
+- pr_debug("gbec_status:0x%04x dma_status:0x%04x\n",
+- tx_desc->gbec_status, tx_desc->dma_status);
++ netdev_dbg(adapter->netdev, "gbec_status:0x%04x dma_status:0x%04x\n",
++ tx_desc->gbec_status, tx_desc->dma_status);
+
+ unused = PCH_GBE_DESC_UNUSED(tx_ring);
+ thresh = tx_ring->count - PCH_GBE_TX_WEIGHT;
+@@ -1544,8 +1565,10 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
+ { /* current marked clean, tx queue filling up, do extra clean */
+ int j, k;
+ if (unused < 8) { /* tx queue nearly full */
+- pr_debug("clean_tx: transmit queue warning (%x,%x) unused=%d\n",
+- tx_ring->next_to_clean,tx_ring->next_to_use,unused);
++ netdev_dbg(adapter->netdev,
++ "clean_tx: transmit queue warning (%x,%x) unused=%d\n",
++ tx_ring->next_to_clean, tx_ring->next_to_use,
++ unused);
+ }
+
+ /* current marked clean, scan for more that need cleaning. */
+@@ -1557,49 +1580,56 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
+ if (++k >= tx_ring->count) k = 0; /*increment, wrap*/
+ }
+ if (j < PCH_GBE_TX_WEIGHT) {
+- pr_debug("clean_tx: unused=%d loops=%d found tx_desc[%x,%x:%x].gbec_status=%04x\n",
+- unused,j, i,k, tx_ring->next_to_use, tx_desc->gbec_status);
++ netdev_dbg(adapter->netdev,
++ "clean_tx: unused=%d loops=%d found tx_desc[%x,%x:%x].gbec_status=%04x\n",
++ unused, j, i, k, tx_ring->next_to_use,
++ tx_desc->gbec_status);
+ i = k; /*found one to clean, usu gbec_status==2000.*/
+ }
+ }
+
+ while ((tx_desc->gbec_status & DSC_INIT16) == 0x0000) {
+- pr_debug("gbec_status:0x%04x\n", tx_desc->gbec_status);
++ netdev_dbg(adapter->netdev, "gbec_status:0x%04x\n",
++ tx_desc->gbec_status);
+ buffer_info = &tx_ring->buffer_info[i];
+ skb = buffer_info->skb;
+ cleaned = true;
+
+ if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_ABT)) {
+ adapter->stats.tx_aborted_errors++;
+- pr_err("Transfer Abort Error\n");
++ netdev_err(adapter->netdev, "Transfer Abort Error\n");
+ } else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_CRSER)
+ ) {
+ adapter->stats.tx_carrier_errors++;
+- pr_err("Transfer Carrier Sense Error\n");
++ netdev_err(adapter->netdev,
++ "Transfer Carrier Sense Error\n");
+ } else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_EXCOL)
+ ) {
+ adapter->stats.tx_aborted_errors++;
+- pr_err("Transfer Collision Abort Error\n");
++ netdev_err(adapter->netdev,
++ "Transfer Collision Abort Error\n");
+ } else if ((tx_desc->gbec_status &
+ (PCH_GBE_TXD_GMAC_STAT_SNGCOL |
+ PCH_GBE_TXD_GMAC_STAT_MLTCOL))) {
+ adapter->stats.collisions++;
+ adapter->stats.tx_packets++;
+ adapter->stats.tx_bytes += skb->len;
+- pr_debug("Transfer Collision\n");
++ netdev_dbg(adapter->netdev, "Transfer Collision\n");
+ } else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_CMPLT)
+ ) {
+ adapter->stats.tx_packets++;
+ adapter->stats.tx_bytes += skb->len;
+ }
+ if (buffer_info->mapped) {
+- pr_debug("unmap buffer_info->dma : %d\n", i);
++ netdev_dbg(adapter->netdev,
++ "unmap buffer_info->dma : %d\n", i);
+ dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
+ buffer_info->length, DMA_TO_DEVICE);
+ buffer_info->mapped = false;
+ }
+ if (buffer_info->skb) {
+- pr_debug("trim buffer_info->skb : %d\n", i);
++ netdev_dbg(adapter->netdev,
++ "trim buffer_info->skb : %d\n", i);
+ skb_trim(buffer_info->skb, 0);
+ }
+ tx_desc->gbec_status = DSC_INIT16;
+@@ -1613,8 +1643,9 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
+ break;
+ }
+ }
+- pr_debug("called pch_gbe_unmap_and_free_tx_resource() %d count\n",
+- cleaned_count);
++ netdev_dbg(adapter->netdev,
++ "called pch_gbe_unmap_and_free_tx_resource() %d count\n",
++ cleaned_count);
+ if (cleaned_count > 0) { /*skip this if nothing cleaned*/
+ /* Recover from running out of Tx resources in xmit_frame */
+ spin_lock(&tx_ring->tx_lock);
+@@ -1622,12 +1653,13 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
+ {
+ netif_wake_queue(adapter->netdev);
+ adapter->stats.tx_restart_count++;
+- pr_debug("Tx wake queue\n");
++ netdev_dbg(adapter->netdev, "Tx wake queue\n");
+ }
+
+ tx_ring->next_to_clean = i;
+
+- pr_debug("next_to_clean : %d\n", tx_ring->next_to_clean);
++ netdev_dbg(adapter->netdev, "next_to_clean : %d\n",
++ tx_ring->next_to_clean);
+ spin_unlock(&tx_ring->tx_lock);
+ }
+ return cleaned;
+@@ -1684,22 +1716,22 @@ pch_gbe_clean_rx(struct pch_gbe_adapter
+ buffer_info->length, DMA_FROM_DEVICE);
+ buffer_info->mapped = false;
+
+- pr_debug("RxDecNo = 0x%04x Status[DMA:0x%02x GBE:0x%04x "
+- "TCP:0x%08x] BufInf = 0x%p\n",
+- i, dma_status, gbec_status, tcp_ip_status,
+- buffer_info);
++ netdev_dbg(netdev,
++ "RxDecNo = 0x%04x Status[DMA:0x%02x GBE:0x%04x TCP:0x%08x] BufInf = 0x%p\n",
++ i, dma_status, gbec_status, tcp_ip_status,
++ buffer_info);
+ /* Error check */
+ if (unlikely(gbec_status & PCH_GBE_RXD_GMAC_STAT_NOTOCTAL)) {
+ adapter->stats.rx_frame_errors++;
+- pr_err("Receive Not Octal Error\n");
++ netdev_err(netdev, "Receive Not Octal Error\n");
+ } else if (unlikely(gbec_status &
+ PCH_GBE_RXD_GMAC_STAT_NBLERR)) {
+ adapter->stats.rx_frame_errors++;
+- pr_err("Receive Nibble Error\n");
++ netdev_err(netdev, "Receive Nibble Error\n");
+ } else if (unlikely(gbec_status &
+ PCH_GBE_RXD_GMAC_STAT_CRCERR)) {
+ adapter->stats.rx_crc_errors++;
+- pr_err("Receive CRC Error\n");
++ netdev_err(netdev, "Receive CRC Error\n");
+ } else {
+ /* get receive length */
+ /* length convert[-3], length includes FCS length */
+@@ -1730,8 +1762,9 @@ pch_gbe_clean_rx(struct pch_gbe_adapter
+
+ napi_gro_receive(&adapter->napi, skb);
+ (*work_done)++;
+- pr_debug("Receive skb->ip_summed: %d length: %d\n",
+- skb->ip_summed, length);
++ netdev_dbg(netdev,
++ "Receive skb->ip_summed: %d length: %d\n",
++ skb->ip_summed, length);
+ }
+ /* return some buffers to hardware, one at a time is too slow */
+ if (unlikely(cleaned_count >= PCH_GBE_RX_BUFFER_WRITE)) {
+@@ -1787,10 +1820,10 @@ int pch_gbe_setup_tx_resources(struct pc
+ tx_desc = PCH_GBE_TX_DESC(*tx_ring, desNo);
+ tx_desc->gbec_status = DSC_INIT16;
+ }
+- pr_debug("tx_ring->desc = 0x%p tx_ring->dma = 0x%08llx\n"
+- "next_to_clean = 0x%08x next_to_use = 0x%08x\n",
+- tx_ring->desc, (unsigned long long)tx_ring->dma,
+- tx_ring->next_to_clean, tx_ring->next_to_use);
++ netdev_dbg(adapter->netdev,
++ "tx_ring->desc = 0x%p tx_ring->dma = 0x%08llx next_to_clean = 0x%08x next_to_use = 0x%08x\n",
++ tx_ring->desc, (unsigned long long)tx_ring->dma,
++ tx_ring->next_to_clean, tx_ring->next_to_use);
+ return 0;
+ }
+
+@@ -1829,10 +1862,10 @@ int pch_gbe_setup_rx_resources(struct pc
+ rx_desc = PCH_GBE_RX_DESC(*rx_ring, desNo);
+ rx_desc->gbec_status = DSC_INIT16;
+ }
+- pr_debug("rx_ring->desc = 0x%p rx_ring->dma = 0x%08llx "
+- "next_to_clean = 0x%08x next_to_use = 0x%08x\n",
+- rx_ring->desc, (unsigned long long)rx_ring->dma,
+- rx_ring->next_to_clean, rx_ring->next_to_use);
++ netdev_dbg(adapter->netdev,
++ "rx_ring->desc = 0x%p rx_ring->dma = 0x%08llx next_to_clean = 0x%08x next_to_use = 0x%08x\n",
++ rx_ring->desc, (unsigned long long)rx_ring->dma,
++ rx_ring->next_to_clean, rx_ring->next_to_use);
+ return 0;
+ }
+
+@@ -1886,9 +1919,9 @@ static int pch_gbe_request_irq(struct pc
+ flags = IRQF_SHARED;
+ adapter->have_msi = false;
+ err = pci_enable_msi(adapter->pdev);
+- pr_debug("call pci_enable_msi\n");
++ netdev_dbg(netdev, "call pci_enable_msi\n");
+ if (err) {
+- pr_debug("call pci_enable_msi - Error: %d\n", err);
++ netdev_dbg(netdev, "call pci_enable_msi - Error: %d\n", err);
+ } else {
+ flags = 0;
+ adapter->have_msi = true;
+@@ -1896,9 +1929,11 @@ static int pch_gbe_request_irq(struct pc
+ err = request_irq(adapter->pdev->irq, &pch_gbe_intr,
+ flags, netdev->name, netdev);
+ if (err)
+- pr_err("Unable to allocate interrupt Error: %d\n", err);
+- pr_debug("adapter->have_msi : %d flags : 0x%04x return : 0x%04x\n",
+- adapter->have_msi, flags, err);
++ netdev_err(netdev, "Unable to allocate interrupt Error: %d\n",
++ err);
++ netdev_dbg(netdev,
++ "adapter->have_msi : %d flags : 0x%04x return : 0x%04x\n",
++ adapter->have_msi, flags, err);
+ return err;
+ }
+
+@@ -1919,7 +1954,7 @@ int pch_gbe_up(struct pch_gbe_adapter *a
+
+ /* Ensure we have a valid MAC */
+ if (!is_valid_ether_addr(adapter->hw.mac.addr)) {
+- pr_err("Error: Invalid MAC address\n");
++ netdev_err(netdev, "Error: Invalid MAC address\n");
+ goto out;
+ }
+
+@@ -1933,12 +1968,14 @@ int pch_gbe_up(struct pch_gbe_adapter *a
+
+ err = pch_gbe_request_irq(adapter);
+ if (err) {
+- pr_err("Error: can't bring device up - irq request failed\n");
++ netdev_err(netdev,
++ "Error: can't bring device up - irq request failed\n");
+ goto out;
+ }
+ err = pch_gbe_alloc_rx_buffers_pool(adapter, rx_ring, rx_ring->count);
+ if (err) {
+- pr_err("Error: can't bring device up - alloc rx buffers pool failed\n");
++ netdev_err(netdev,
++ "Error: can't bring device up - alloc rx buffers pool failed\n");
+ goto freeirq;
+ }
+ pch_gbe_alloc_tx_buffers(adapter, tx_ring);
+@@ -2015,11 +2052,11 @@ static int pch_gbe_sw_init(struct pch_gb
+
+ /* Initialize the hardware-specific values */
+ if (pch_gbe_hal_setup_init_funcs(hw)) {
+- pr_err("Hardware Initialization Failure\n");
++ netdev_err(netdev, "Hardware Initialization Failure\n");
+ return -EIO;
+ }
+ if (pch_gbe_alloc_queues(adapter)) {
+- pr_err("Unable to allocate memory for queues\n");
++ netdev_err(netdev, "Unable to allocate memory for queues\n");
+ return -ENOMEM;
+ }
+ spin_lock_init(&adapter->hw.miim_lock);
+@@ -2030,9 +2067,10 @@ static int pch_gbe_sw_init(struct pch_gb
+
+ pch_gbe_init_stats(adapter);
+
+- pr_debug("rx_buffer_len : %d mac.min_frame_size : %d mac.max_frame_size : %d\n",
+- (u32) adapter->rx_buffer_len,
+- hw->mac.min_frame_size, hw->mac.max_frame_size);
++ netdev_dbg(netdev,
++ "rx_buffer_len : %d mac.min_frame_size : %d mac.max_frame_size : %d\n",
++ (u32) adapter->rx_buffer_len,
++ hw->mac.min_frame_size, hw->mac.max_frame_size);
+ return 0;
+ }
+
+@@ -2061,7 +2099,7 @@ static int pch_gbe_open(struct net_devic
+ err = pch_gbe_up(adapter);
+ if (err)
+ goto err_up;
+- pr_debug("Success End\n");
++ netdev_dbg(netdev, "Success End\n");
+ return 0;
+
+ err_up:
+@@ -2072,7 +2110,7 @@ err_setup_rx:
+ pch_gbe_free_tx_resources(adapter, adapter->tx_ring);
+ err_setup_tx:
+ pch_gbe_reset(adapter);
+- pr_err("Error End\n");
++ netdev_err(netdev, "Error End\n");
+ return err;
+ }
+
+@@ -2116,8 +2154,9 @@ static int pch_gbe_xmit_frame(struct sk_
+ if (unlikely(!PCH_GBE_DESC_UNUSED(tx_ring))) {
+ netif_stop_queue(netdev);
+ spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
+- pr_debug("Return : BUSY next_to use : 0x%08x next_to clean : 0x%08x\n",
+- tx_ring->next_to_use, tx_ring->next_to_clean);
++ netdev_dbg(netdev,
++ "Return : BUSY next_to use : 0x%08x next_to clean : 0x%08x\n",
++ tx_ring->next_to_use, tx_ring->next_to_clean);
+ return NETDEV_TX_BUSY;
+ }
+
+@@ -2152,7 +2191,7 @@ static void pch_gbe_set_multi(struct net
+ int i;
+ int mc_count;
+
+- pr_debug("netdev->flags : 0x%08x\n", netdev->flags);
++ netdev_dbg(netdev, "netdev->flags : 0x%08x\n", netdev->flags);
+
+ /* Check for Promiscuous and All Multicast modes */
+ rctl = ioread32(&hw->reg->RX_MODE);
+@@ -2192,7 +2231,8 @@ static void pch_gbe_set_multi(struct net
+ PCH_GBE_MAR_ENTRIES);
+ kfree(mta_list);
+
+- pr_debug("RX_MODE reg(check bit31,30 ADD,MLT) : 0x%08x netdev->mc_count : 0x%08x\n",
++ netdev_dbg(netdev,
++ "RX_MODE reg(check bit31,30 ADD,MLT) : 0x%08x netdev->mc_count : 0x%08x\n",
+ ioread32(&hw->reg->RX_MODE), mc_count);
+ }
+
+@@ -2218,12 +2258,12 @@ static int pch_gbe_set_mac(struct net_de
+ pch_gbe_mac_mar_set(&adapter->hw, adapter->hw.mac.addr, 0);
+ ret_val = 0;
+ }
+- pr_debug("ret_val : 0x%08x\n", ret_val);
+- pr_debug("dev_addr : %pM\n", netdev->dev_addr);
+- pr_debug("mac_addr : %pM\n", adapter->hw.mac.addr);
+- pr_debug("MAC_ADR1AB reg : 0x%08x 0x%08x\n",
+- ioread32(&adapter->hw.reg->mac_adr[0].high),
+- ioread32(&adapter->hw.reg->mac_adr[0].low));
++ netdev_dbg(netdev, "ret_val : 0x%08x\n", ret_val);
++ netdev_dbg(netdev, "dev_addr : %pM\n", netdev->dev_addr);
++ netdev_dbg(netdev, "mac_addr : %pM\n", adapter->hw.mac.addr);
++ netdev_dbg(netdev, "MAC_ADR1AB reg : 0x%08x 0x%08x\n",
++ ioread32(&adapter->hw.reg->mac_adr[0].high),
++ ioread32(&adapter->hw.reg->mac_adr[0].low));
+ return ret_val;
+ }
+
+@@ -2245,7 +2285,7 @@ static int pch_gbe_change_mtu(struct net
+ max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
+ if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
+ (max_frame > PCH_GBE_MAX_JUMBO_FRAME_SIZE)) {
+- pr_err("Invalid MTU setting\n");
++ netdev_err(netdev, "Invalid MTU setting\n");
+ return -EINVAL;
+ }
+ if (max_frame <= PCH_GBE_FRAME_SIZE_2048)
+@@ -2274,9 +2314,10 @@ static int pch_gbe_change_mtu(struct net
+ adapter->hw.mac.max_frame_size = max_frame;
+ }
+
+- pr_debug("max_frame : %d rx_buffer_len : %d mtu : %d max_frame_size : %d\n",
+- max_frame, (u32) adapter->rx_buffer_len, netdev->mtu,
+- adapter->hw.mac.max_frame_size);
++ netdev_dbg(netdev,
++ "max_frame : %d rx_buffer_len : %d mtu : %d max_frame_size : %d\n",
++ max_frame, (u32) adapter->rx_buffer_len, netdev->mtu,
++ adapter->hw.mac.max_frame_size);
+ return 0;
+ }
+
+@@ -2317,7 +2358,7 @@ static int pch_gbe_ioctl(struct net_devi
+ {
+ struct pch_gbe_adapter *adapter = netdev_priv(netdev);
+
+- pr_debug("cmd : 0x%04x\n", cmd);
++ netdev_dbg(netdev, "cmd : 0x%04x\n", cmd);
+
+ if (cmd == SIOCSHWTSTAMP)
+ return hwtstamp_ioctl(netdev, ifr, cmd);
+@@ -2354,7 +2395,7 @@ static int pch_gbe_napi_poll(struct napi
+ bool poll_end_flag = false;
+ bool cleaned = false;
+
+- pr_debug("budget : %d\n", budget);
++ netdev_dbg(adapter->netdev, "budget : %d\n", budget);
+
+ pch_gbe_clean_rx(adapter, adapter->rx_ring, &work_done, budget);
+ cleaned = pch_gbe_clean_tx(adapter, adapter->tx_ring);
+@@ -2377,8 +2418,9 @@ static int pch_gbe_napi_poll(struct napi
+ pch_gbe_enable_dma_rx(&adapter->hw);
+ }
+
+- pr_debug("poll_end_flag : %d work_done : %d budget : %d\n",
+- poll_end_flag, work_done, budget);
++ netdev_dbg(adapter->netdev,
++ "poll_end_flag : %d work_done : %d budget : %d\n",
++ poll_end_flag, work_done, budget);
+
+ return work_done;
+ }
+@@ -2435,7 +2477,7 @@ static pci_ers_result_t pch_gbe_io_slot_
+ struct pch_gbe_hw *hw = &adapter->hw;
+
+ if (pci_enable_device(pdev)) {
+- pr_err("Cannot re-enable PCI device after reset\n");
++ netdev_err(netdev, "Cannot re-enable PCI device after reset\n");
+ return PCI_ERS_RESULT_DISCONNECT;
+ }
+ pci_set_master(pdev);
+@@ -2455,7 +2497,8 @@ static void pch_gbe_io_resume(struct pci
+
+ if (netif_running(netdev)) {
+ if (pch_gbe_up(adapter)) {
+- pr_debug("can't bring device back up after reset\n");
++ netdev_dbg(netdev,
++ "can't bring device back up after reset\n");
+ return;
+ }
+ }
+@@ -2509,7 +2552,7 @@ static int pch_gbe_resume(struct device
+
+ err = pci_enable_device(pdev);
+ if (err) {
+- pr_err("Cannot enable PCI device from suspend\n");
++ netdev_err(netdev, "Cannot enable PCI device from suspend\n");
+ return err;
+ }
+ pci_set_master(pdev);
+@@ -2609,7 +2652,7 @@ static int pch_gbe_probe(struct pci_dev
+ adapter->ptp_pdev = pci_get_bus_and_slot(adapter->pdev->bus->number,
+ PCI_DEVFN(12, 4));
+ if (ptp_filter_init(ptp_filter, ARRAY_SIZE(ptp_filter))) {
+- pr_err("Bad ptp filter\n");
++ dev_err(&pdev->dev, "Bad ptp filter\n");
+ return -EINVAL;
+ }
+
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c
+@@ -237,16 +237,17 @@ static int pch_gbe_validate_option(int *
+ case enable_option:
+ switch (*value) {
+ case OPTION_ENABLED:
+- pr_debug("%s Enabled\n", opt->name);
++ netdev_dbg(adapter->netdev, "%s Enabled\n", opt->name);
+ return 0;
+ case OPTION_DISABLED:
+- pr_debug("%s Disabled\n", opt->name);
++ netdev_dbg(adapter->netdev, "%s Disabled\n", opt->name);
+ return 0;
+ }
+ break;
+ case range_option:
+ if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
+- pr_debug("%s set to %i\n", opt->name, *value);
++ netdev_dbg(adapter->netdev, "%s set to %i\n",
++ opt->name, *value);
+ return 0;
+ }
+ break;
+@@ -258,7 +259,8 @@ static int pch_gbe_validate_option(int *
+ ent = &opt->arg.l.p[i];
+ if (*value == ent->i) {
+ if (ent->str[0] != '\0')
+- pr_debug("%s\n", ent->str);
++ netdev_dbg(adapter->netdev, "%s\n",
++ ent->str);
+ return 0;
+ }
+ }
+@@ -268,8 +270,8 @@ static int pch_gbe_validate_option(int *
+ BUG();
+ }
+
+- pr_debug("Invalid %s value specified (%i) %s\n",
+- opt->name, *value, opt->err);
++ netdev_dbg(adapter->netdev, "Invalid %s value specified (%i) %s\n",
++ opt->name, *value, opt->err);
+ *value = opt->def;
+ return -1;
+ }
+@@ -318,7 +320,8 @@ static void pch_gbe_check_copper_options
+ .p = an_list} }
+ };
+ if (speed || dplx) {
+- pr_debug("AutoNeg specified along with Speed or Duplex, AutoNeg parameter ignored\n");
++ netdev_dbg(adapter->netdev,
++ "AutoNeg specified along with Speed or Duplex, AutoNeg parameter ignored\n");
+ hw->phy.autoneg_advertised = opt.def;
+ } else {
+ int tmp = AutoNeg;
+@@ -332,13 +335,16 @@ static void pch_gbe_check_copper_options
+ case 0:
+ hw->mac.autoneg = hw->mac.fc_autoneg = 1;
+ if ((speed || dplx))
+- pr_debug("Speed and duplex autonegotiation enabled\n");
++ netdev_dbg(adapter->netdev,
++ "Speed and duplex autonegotiation enabled\n");
+ hw->mac.link_speed = SPEED_10;
+ hw->mac.link_duplex = DUPLEX_HALF;
+ break;
+ case HALF_DUPLEX:
+- pr_debug("Half Duplex specified without Speed\n");
+- pr_debug("Using Autonegotiation at Half Duplex only\n");
++ netdev_dbg(adapter->netdev,
++ "Half Duplex specified without Speed\n");
++ netdev_dbg(adapter->netdev,
++ "Using Autonegotiation at Half Duplex only\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 1;
+ hw->phy.autoneg_advertised = PHY_ADVERTISE_10_HALF |
+ PHY_ADVERTISE_100_HALF;
+@@ -346,8 +352,10 @@ static void pch_gbe_check_copper_options
+ hw->mac.link_duplex = DUPLEX_HALF;
+ break;
+ case FULL_DUPLEX:
+- pr_debug("Full Duplex specified without Speed\n");
+- pr_debug("Using Autonegotiation at Full Duplex only\n");
++ netdev_dbg(adapter->netdev,
++ "Full Duplex specified without Speed\n");
++ netdev_dbg(adapter->netdev,
++ "Using Autonegotiation at Full Duplex only\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 1;
+ hw->phy.autoneg_advertised = PHY_ADVERTISE_10_FULL |
+ PHY_ADVERTISE_100_FULL |
+@@ -356,8 +364,10 @@ static void pch_gbe_check_copper_options
+ hw->mac.link_duplex = DUPLEX_FULL;
+ break;
+ case SPEED_10:
+- pr_debug("10 Mbps Speed specified without Duplex\n");
+- pr_debug("Using Autonegotiation at 10 Mbps only\n");
++ netdev_dbg(adapter->netdev,
++ "10 Mbps Speed specified without Duplex\n");
++ netdev_dbg(adapter->netdev,
++ "Using Autonegotiation at 10 Mbps only\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 1;
+ hw->phy.autoneg_advertised = PHY_ADVERTISE_10_HALF |
+ PHY_ADVERTISE_10_FULL;
+@@ -365,22 +375,24 @@ static void pch_gbe_check_copper_options
+ hw->mac.link_duplex = DUPLEX_HALF;
+ break;
+ case SPEED_10 + HALF_DUPLEX:
+- pr_debug("Forcing to 10 Mbps Half Duplex\n");
++ netdev_dbg(adapter->netdev, "Forcing to 10 Mbps Half Duplex\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 0;
+ hw->phy.autoneg_advertised = 0;
+ hw->mac.link_speed = SPEED_10;
+ hw->mac.link_duplex = DUPLEX_HALF;
+ break;
+ case SPEED_10 + FULL_DUPLEX:
+- pr_debug("Forcing to 10 Mbps Full Duplex\n");
++ netdev_dbg(adapter->netdev, "Forcing to 10 Mbps Full Duplex\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 0;
+ hw->phy.autoneg_advertised = 0;
+ hw->mac.link_speed = SPEED_10;
+ hw->mac.link_duplex = DUPLEX_FULL;
+ break;
+ case SPEED_100:
+- pr_debug("100 Mbps Speed specified without Duplex\n");
+- pr_debug("Using Autonegotiation at 100 Mbps only\n");
++ netdev_dbg(adapter->netdev,
++ "100 Mbps Speed specified without Duplex\n");
++ netdev_dbg(adapter->netdev,
++ "Using Autonegotiation at 100 Mbps only\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 1;
+ hw->phy.autoneg_advertised = PHY_ADVERTISE_100_HALF |
+ PHY_ADVERTISE_100_FULL;
+@@ -388,28 +400,33 @@ static void pch_gbe_check_copper_options
+ hw->mac.link_duplex = DUPLEX_HALF;
+ break;
+ case SPEED_100 + HALF_DUPLEX:
+- pr_debug("Forcing to 100 Mbps Half Duplex\n");
++ netdev_dbg(adapter->netdev,
++ "Forcing to 100 Mbps Half Duplex\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 0;
+ hw->phy.autoneg_advertised = 0;
+ hw->mac.link_speed = SPEED_100;
+ hw->mac.link_duplex = DUPLEX_HALF;
+ break;
+ case SPEED_100 + FULL_DUPLEX:
+- pr_debug("Forcing to 100 Mbps Full Duplex\n");
++ netdev_dbg(adapter->netdev,
++ "Forcing to 100 Mbps Full Duplex\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 0;
+ hw->phy.autoneg_advertised = 0;
+ hw->mac.link_speed = SPEED_100;
+ hw->mac.link_duplex = DUPLEX_FULL;
+ break;
+ case SPEED_1000:
+- pr_debug("1000 Mbps Speed specified without Duplex\n");
++ netdev_dbg(adapter->netdev,
++ "1000 Mbps Speed specified without Duplex\n");
+ goto full_duplex_only;
+ case SPEED_1000 + HALF_DUPLEX:
+- pr_debug("Half Duplex is not supported at 1000 Mbps\n");
++ netdev_dbg(adapter->netdev,
++ "Half Duplex is not supported at 1000 Mbps\n");
+ /* fall through */
+ case SPEED_1000 + FULL_DUPLEX:
+ full_duplex_only:
+- pr_debug("Using Autonegotiation at 1000 Mbps Full Duplex only\n");
++ netdev_dbg(adapter->netdev,
++ "Using Autonegotiation at 1000 Mbps Full Duplex only\n");
+ hw->mac.autoneg = hw->mac.fc_autoneg = 1;
+ hw->phy.autoneg_advertised = PHY_ADVERTISE_1000_FULL;
+ hw->mac.link_speed = SPEED_1000;
+--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
++++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
+@@ -97,6 +97,7 @@
+ */
+ s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw)
+ {
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ struct pch_gbe_phy_info *phy = &hw->phy;
+ s32 ret;
+ u16 phy_id1;
+@@ -115,8 +116,9 @@ s32 pch_gbe_phy_get_id(struct pch_gbe_hw
+ phy->id = (u32)phy_id1;
+ phy->id = ((phy->id << 6) | ((phy_id2 & 0xFC00) >> 10));
+ phy->revision = (u32) (phy_id2 & 0x000F);
+- pr_debug("phy->id : 0x%08x phy->revision : 0x%08x\n",
+- phy->id, phy->revision);
++ netdev_dbg(adapter->netdev,
++ "phy->id : 0x%08x phy->revision : 0x%08x\n",
++ phy->id, phy->revision);
+ return 0;
+ }
+
+@@ -134,7 +136,10 @@ s32 pch_gbe_phy_read_reg_miic(struct pch
+ struct pch_gbe_phy_info *phy = &hw->phy;
+
+ if (offset > PHY_MAX_REG_ADDRESS) {
+- pr_err("PHY Address %d is out of range\n", offset);
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "PHY Address %d is out of range\n",
++ offset);
+ return -EINVAL;
+ }
+ *data = pch_gbe_mac_ctrl_miim(hw, phy->addr, PCH_GBE_HAL_MIIM_READ,
+@@ -156,7 +161,10 @@ s32 pch_gbe_phy_write_reg_miic(struct pc
+ struct pch_gbe_phy_info *phy = &hw->phy;
+
+ if (offset > PHY_MAX_REG_ADDRESS) {
+- pr_err("PHY Address %d is out of range\n", offset);
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
++
++ netdev_err(adapter->netdev, "PHY Address %d is out of range\n",
++ offset);
+ return -EINVAL;
+ }
+ pch_gbe_mac_ctrl_miim(hw, phy->addr, PCH_GBE_HAL_MIIM_WRITE,
+@@ -246,15 +254,14 @@ inline void pch_gbe_phy_set_rgmii(struct
+ */
+ void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw)
+ {
+- struct pch_gbe_adapter *adapter;
++ struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
+ struct ethtool_cmd cmd = { .cmd = ETHTOOL_GSET };
+ int ret;
+ u16 mii_reg;
+
+- adapter = container_of(hw, struct pch_gbe_adapter, hw);
+ ret = mii_ethtool_gset(&adapter->mii, &cmd);
+ if (ret)
+- pr_err("Error: mii_ethtool_gset\n");
++ netdev_err(adapter->netdev, "Error: mii_ethtool_gset\n");
+
+ ethtool_cmd_speed_set(&cmd, hw->mac.link_speed);
+ cmd.duplex = hw->mac.link_duplex;
+@@ -263,7 +270,7 @@ void pch_gbe_phy_init_setting(struct pch
+ pch_gbe_phy_write_reg_miic(hw, MII_BMCR, BMCR_RESET);
+ ret = mii_ethtool_sset(&adapter->mii, &cmd);
+ if (ret)
+- pr_err("Error: mii_ethtool_sset\n");
++ netdev_err(adapter->netdev, "Error: mii_ethtool_sset\n");
+
+ pch_gbe_phy_sw_reset(hw);
+
projects / platform / kernel / linux-stable.git / commitdiff