#include <config.h>
#include <version.h>
#include <asm/arch/cpu.h>
-#include <asm/arch/mem.h>
#include <asm/arch/clock.h>
#include <asm/arch/power.h>
-#include <asm/arch/watchdog.h>
-#include <asm/arch/interrupt.h>
#define DEBUG_PM_C110
#undef DEBUG_PM_C110
/* Disable all interrupts (VIC0, VIC1 and VIC2) */
mvn r3, #0x0
- str r3, [r0, #VIC_INTENCLEAR_OFFSET]
- str r3, [r1, #VIC_INTENCLEAR_OFFSET]
- str r3, [r2, #VIC_INTENCLEAR_OFFSET]
+ str r3, [r0, #0x14] @INTENCLEAR
+ str r3, [r1, #0x14] @INTENCLEAR
+ str r3, [r2, #0x14] @INTENCLEAR
#ifndef CONFIG_ONENAND_IPL
/* Set all interrupts as IRQ */
- str r5, [r0, #VIC_INTSELECT_OFFSET]
- str r5, [r1, #VIC_INTSELECT_OFFSET]
- str r5, [r2, #VIC_INTSELECT_OFFSET]
+ str r5, [r0, #0xc] @INTSELECT
+ str r5, [r1, #0xc] @INTSELECT
+ str r5, [r2, #0xc] @INTSELECT
/* Pending Interrupt Clear */
- str r5, [r0, #VIC_INTADDRESS_OFFSET]
- str r5, [r1, #VIC_INTADDRESS_OFFSET]
- str r5, [r2, #VIC_INTADDRESS_OFFSET]
+ str r5, [r0, #0xf00] @INTADDRESS
+ str r5, [r1, #0xf00] @INTADDRESS
+ str r5, [r2, #0xf00] @INTADDRESS
#endif
#ifndef CONFIG_ONENAND_IPL
*/
#include <config.h>
-#include <asm/arch/mem.h>
.globl mem_ctrl_asm_init
mem_ctrl_asm_init:
* [ 3:0 ] 2: 4 banks
*/
eoreq r3, r3, #0x08000000
- streq r3, [r0, #MEMCONFIG1_OFFSET]
+ streq r3, [r0, #0xc] @ MEMCONFIG1_OFFSET
ldr r1, =0x20000000
str r1, [r0, #0x014] @ PRECHCONFIG_OFFSET
#include <asm/io.h>
#include <asm/byteorder.h>
-#include <asm/arch/hardware.h>
#include <asm/arch/usb-hs-otg.h>
#define make_word_c(w) __constant_cpu_to_le16(w)
+++ /dev/null
-/*
- * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _ARCH_HARDWARE_H_
-#define _ARCH_HARDWARE_H_
-
-#include <asm/sizes.h>
-
-#ifndef __ASSEMBLY__
-#define UData(Data) ((unsigned long) (Data))
-
-#define __REG(x) (*(vu_long *)(x))
-#define __REGl(x) (*(vu_long *)(x))
-#define __REGw(x) (*(vu_short *)(x))
-#define __REGb(x) (*(vu_char *)(x))
-#define __REG2(x, y) (*(vu_long *)((x) + (y)))
-#else
-#define UData(Data) (Data)
-
-#define __REG(x) (x)
-#define __REGl(x) (x)
-#define __REGw(x) (x)
-#define __REGb(x) (x)
-#define __REG2(x, y) ((x) + (y))
-#endif
-
-#define Fld(Size, Shft) (((Size) << 16) + (Shft))
-
-#define FSize(Field) ((Field) >> 16)
-#define FShft(Field) ((Field) & 0x0000FFFF)
-#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field))
-#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1)
-#define F1stBit(Field) (UData (1) << FShft (Field))
-
-#define FClrBit(Data, Bit) (Data = (Data & ~(Bit)))
-#define FClrFld(Data, Field) (Data = (Data & ~FMsk(Field)))
-
-#define FInsrt(Value, Field) \
- (UData (Value) << FShft (Field))
-
-#define FExtr(Data, Field) \
- ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
-
-#endif /* _ARCH_HARDWARE_H_ */
+++ /dev/null
-/*
- * (C) Copyright 2009
- * Samsung Electronics, <www.samsung.com/sec>
- * Heungjun Kim <riverful.kim@samsung.com>
- * Minkyu Kang <mk7.kang@samsung.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#ifndef __ASM_ARM_ARCH_INTERRUPT_H_
-#define __ASM_ARM_ARCH_INTERRUPT_H_
-
-/* Vector Interrupt Offset */
-#define VIC_IRQSTATUS_OFFSET 0x0
-#define VIC_FIQSTATUS_OFFSET 0x4
-#define VIC_RAWINTR_OFFSET 0x8
-#define VIC_INTSELECT_OFFSET 0xc
-#define VIC_INTENABLE_OFFSET 0x10
-#define VIC_INTENCLEAR_OFFSET 0x14
-#define VIC_SOFTINT_OFFSET 0x18
-#define VIC_SOFTINTCLEAR_OFFSET 0x1c
-#define VIC_PROTECTION_OFFSET 0x20
-#define VIC_SWPRIORITYMASK_OFFSET 0x24
-#define VIC_PRIORITYDAISY_OFFSET 0x28
-#define VIC_INTADDRESS_OFFSET 0xf00
-
-#endif
#ifndef __ASM_ARM_ARCH_MEM_H_
#define __ASM_ARM_ARCH_MEM_H_
-/*
- * SROMC Controller
- */
/* DRAM Memory Controller */
-
-#define S5PC100_DMC_BASE 0xE6000000
-#define S5PC110_DMC0_BASE 0xF0000000
-#define S5PC110_DMC1_BASE 0xF1400000
-
-/* DMC offset */
#define CONCONTROL_OFFSET 0x00
#define MEMCONTROL_OFFSET 0x04
#define MEMCONFIG0_OFFSET 0x08
+++ /dev/null
-
-/*
- * Watchdog
- */
-#define S5P_WATCHDOG_BASE(x) (S5P_PA_WATCHDOG + (x))
-
-#define WTCON_OFFSET 0x0
-#define WTDAT_OFFSET 0x4
-#define WTCNT_OFFSET 0x8
-#define WTCLRINT_OFFSET 0xc
-
-#define S5P_WTCON S5P_WATCHDOG_BASE(WTCON_OFFSET)
-#define S5P_WTDAT S5P_WATCHDOG_BASE(WTDAT_OFFSET)
-#define S5P_WTCNT S5P_WATCHDOG_BASE(WTCNT_OFFSET)
-#define S5P_WTCLRINT S5P_WATCHDOG_BASE(WTCLRINT_OFFSET)
-