/* Codec*/
#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0)
+#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0)
+
+/* PMIC */
+#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0)
#endif /* __ASM_MACH_MFP_MMP2_H */
#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
+static struct mfp_addr_map mmp2_addr_map[] __initdata = {
+ MFP_ADDR(PMIC_INT, 0x2c4),
+
+ MFP_ADDR_END,
+};
+
/* APB peripheral clocks */
static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
{
if (cpu_is_mmp2()) {
mfp_init_base(MFPR_VIRT_BASE);
+ mfp_init_addr(mmp2_addr_map);
clks_register(ARRAY_AND_SIZE(mmp2_clkregs));
}